Triscend E5 Development Platform User Manual...Figure 3. Diagram of TE520 Pin Connections to 7-Segment Displays. Table 1 presents the same connection information, but in tabular form

®

Triscend E5 Hardware Development Platform

User Manual

November 2001 Version 1.0

Contents INTRODUCTION ............................................................................................................................................ 3 TRISCEND E5 EVALUATION BOARD.............................................................................................................. 4

Board Overview ................................................................................................................................................ 4 Major Components ........................................................................................................................................... 4 Connecting Power ............................................................................................................................................ 5 7-Segment LED Displays.................................................................................................................................. 5

Lighting a Segment ....................................................................................................................................... 5 Pin Connections from TE520 ........................................................................................................................ 5 Reclaiming PIO Pins..................................................................................................................................... 7

8-Position DIP Switch (SW5) ............................................................................................................................ 7 Pin Connections from TE520 ........................................................................................................................ 7 Reclaiming PIO Pins..................................................................................................................................... 8

Pushbutton Switches (PB1, PB2) ..................................................................................................................... 8 Reset Pushbutton (SW2) .................................................................................................................................. 9 Connection Options Settings Switch (SW6).................................................................................................... 10 Parallel Port .................................................................................................................................................... 12

Connection Options .................................................................................................................................... 12 Pin Connections.......................................................................................................................................... 12 Downloading Application and Using Parallel Port in Application................................................................. 13

RS-232 Driver ................................................................................................................................................. 14 Pin Connections.......................................................................................................................................... 14 Connecting TE520 to RS-232 Driver .......................................................................................................... 14 Reclaiming PIO Pins................................................................................................................................... 14 Disconnecting Driver from Bus Connector .................................................................................................. 14

128Kx8 Flash.................................................................................................................................................. 15 Downloading to the E5 Evaluation Board........................................................................................................ 15

Using the Parallel Port ................................................................................................................................ 15 Using the 14-Pin JTAG Header .................................................................................................................. 16 FastChip Device Link (FDL) Configuration Settings.................................................................................... 16

TRISCEND DEVELOPMENT BASE BOARD..................................................................................................... 18 Board Overview .............................................................................................................................................. 18 Major Components ......................................................................................................................................... 18 Board Option Switch Settings (SW2) .............................................................................................................. 20 LCD Character Display ................................................................................................................................... 21

Pin Connections.......................................................................................................................................... 22 Supporting IP Modules................................................................................................................................ 22 Reclaiming PIO Pins................................................................................................................................... 24 Contrast Adjustment ................................................................................................................................... 24

LED Display Bar (LED1) ................................................................................................................................. 24 8-Position DIP-Switches (SW1, SW3)............................................................................................................. 25 Four Pushbutton Switches (SW6, SW7, SW8, SW9)...................................................................................... 25 Reset Pushbutton (SW5) ................................................................................................................................ 26 RS-232 Ports with Connectors (RS232-1, RS232-2) ...................................................................................... 27

Pin Connections to TE520 .......................................................................................................................... 27 RS-232 Port Connectors............................................................................................................................. 27 Cabling Requirements ................................................................................................................................ 28

512Kx8 Base Board Flash and SRAM Memory .............................................................................................. 29 Memory Jumper Settings ............................................................................................................................ 29 Using External SRAM to Store Application Data......................................................................................... 31

© 2001 by Triscend Corporation. All rights reserved. www.triscend.com

Triscend Part Number TCH001-0002-001


Auxiliary Connector (AUX, JP1)...................................................................................................................... 32 Expansion Bus................................................................................................................................................ 33 Probe Pins ...................................................................................................................................................... 34

TRISCEND E5 DEVELOPMENT PLATFORM ................................................................................................... 35 Downloading to the E5 Development Platform ............................................................................................... 35

Using the Parallel Port ................................................................................................................................ 35 FastChip Device Link (FDL) Configuration Settings.................................................................................... 36

Connecting the E5 Evaluation Board to the Base Board ................................................................................ 38 Removing the E5 Evaluation Board from the Base Board .............................................................................. 40

TROUBLESHOOTING GUIDE ........................................................................................................................ 42 Evaluation Board ............................................................................................................................................ 42

Power-on LED doesnt light up ................................................................................................................... 42 7-segment LEDs dont light up.................................................................................................................... 42 7-segment LEDs momentarily glow slightly and then light up ..................................................................... 42 FDL: Unable to reset and halt CSoC. Command Halted ......................................................................... 42 FDL: No Communication With Target...................................................................................................... 42

Development Platform (E5 Evaluation Board + Base Board).......................................................................... 42 Power-on LED doesnt light up ................................................................................................................... 42 LCD display: No characters visible ............................................................................................................ 43 FDL Download: The MIU size setting (256KB) is not large enough......................................................... 43 7-segment LEDs on evaluation board flicker but not being used ................................................................ 43

General ........................................................................................................................................................... 43 Unable to create a precise UART baud rate using the 40.000 MHz oscillator ............................................ 43

TE520 DEVICE PIN CONNECTIONS TO BOARD RESOURCES ........................................................................ 44 BASE BOARD EXPANSION BUS CONNECTIONS ........................................................................................... 51 E5 EVALUATION BOARD SCHEMATIC ......................................................................................................... 54 BASE BOARD SCHEMATIC ......................................................................................................................... 58 PROTOTYPE CARD SCHEMATIC .................................................................................................................. 68

2 Triscend Part Number TCH001-0002-001

Introduction The Triscend E5 Hardware Development Platform, shown in Figure 1, provides embedded system designer with a convenient environment to quickly create and evaluate applications for a Triscend E5 Configurable System-on-Chip (CSoC) device. The development platform contains a variety of I/O devices and interfaces for testing designs, all supported using the Triscend FastChip development system. This document provides information on how to use, connect, download, and debug applications on the board.

Figure 1. The Triscend E5 Development Platform consists of an E5 Evaluation Board that

operates either stand-alone or when mounted on the Triscend Base Board, providing a richer set of capabilities.

The board provides a variety of connectors for attaching serial, parallel, JTAG, and power supply interfaces. Ample probe pins and expansion connectors provide nearly complete access to the pins of the CSoC device, either for a logic analyzer or for other prototype circuitry. Triscend TE520 CSoC applications are downloaded and debugged using a standard PC parallel port. Simply connect the included parallel port cable between your computer and the parallel port connector on the E5 Evaluation Board.

The complete E5 Hardware Development Platform consists of two separate pieces, as illustrated in Figure 1.

1. The E5 Evaluation Board functions as a stand-alone system for evaluating the Triscend E5 CSoC device. In conjunction with the FastChip Device Link (FDL) software and the included parallel printer cable for downloads, the board runs and tests code and CSL configurations. It includes its own power supply and Flash memory. For I/O, the evaluation board includes two seven-segment LED displays, an eight-position DIP-switch, and two pushbutton switches. All



of the E5s PIO pins are accessible from two 96-pin DIN connectors located along the left and right edges of the board.

2. For a more complete development environment, the E5 Evaluation Board plugs into the Triscend Development Base Board via the two 96-pin DIN connectors. The base board also includes its own Flash and SRAM memories, additional LEDs, and an LCD character display. The base board always requires that the evaluation board be installed. It does not function as a stand-alone system.

Triscend E5 Evaluation Board

BBooaarrdd OOvveerrvviieeww Figure 2 shows the major functions on the Triscend E5 Evaluation Board. When connected to the included 5-volt regulated supply, the evaluation board functions as a stand-alone application complete with its own configuration Flash memory, pushbuttons, switches, and DIP switches.

40.0MHz

128Kx8Flash

U7

PB1

PB2

Reset

SW6JP4

JP5 JP6

JP1 JP3

OFF

ON

SW5CBA

1

32

CBA1

32

JTA

GH

eade

rPower On LED

Parallel Port

Oscillator

Figure 2. The Triscend E5 Evaluation Board.

MMaajjoorr CCoommppoonneennttss The Triscend E5 Evaluation Board kit contains the following functions.

• A Triscend TE520S40-40Q Configurable System-on-Chip (CSoC) device with 2,048 Configurable System Logic (CSL) cells and 40K-bytes of internal SRAM.

• An Am29LV001BB- 90JC 1M-bit (128Kx8) Flash memory device.

• A 40.000 MHz socketed oscillator.


http://www.triscend.com/products/dse5csoc.pdf

• Two 7-segment LED displays.

• An 8-position DIP-switch (SW5).

• Two pushbutton switches (PB1, PB2).

• A pushbutton reset switch.

• A 25-pin D-shell parallel port connector. Ideal for downloading and debugging applications via your PC parallel port.

• A regulated +5VDC, 2.5A wall mount power supply (not shown).

• A parallel printer cable (not shown).

• A Triscend FastChip Development System CD-ROM including a full license (not shown).

• A Keil Software Evaluation Tools CD-ROM that includes a limited C-language compiler, debugger, simulator, and assembler for the E5s embedded, accelerated 8051 microcontroller (not shown).

• An OrCAD Capture Lite Edition CD-ROM including an evaluation version of the OrCAD schematic editor. The schematic libraries are included on the Triscend FastChip CD-ROM (not shown).

CCoonnnneeccttiinngg PPoowweerr Connect the evaluation board to +5VDC using the included regulated AC power adaptor. An on-board regulator generates the +3.3VDC supply required by the Triscend TE520 device.

When using the E5 Evaluation Board in stand-alone mode without the base board, ensure that jumpers JP1 and JP3 are installed.

When valid power is applied to the board, the Power-On LED indicatorlocated next to the power switch and below the adaptor connectwill light.

If this is the first time that the board is powered, the E5 boots from the on-board Flash and executes a simple application. The application increments a value displayed on the two 7-segment LEDs about once per second.

77--SSeeggmmeenntt LLEEDD DDiissppllaayyss The E5 Evaluation Board has two common-cathode 7-segment LEDs, as shown in Figure 3. The displays are located along the bottom edge of the evaluation board, toward the center. Each display has a separate jumper connecting the displays common-cathode to VCC, optionally allowing each segment to be independently disconnected from the TE520 in order to reclaim PIO pins.

Lighting a Segment Each segment on the LED displays is active-Low. In order to light a segment, the TE520 must drive the appropriate pin to a logic Low. The TE520 has sufficient drive capability to drive the LED segments directly.

Pin Connections from TE520 Figure 3 shows the pin connections to the two 7-segment LED displays. The number shown in parentheses is the TE520 pin that connects the respective segment. Though it may appear that there is a left decimal point on both displays, neither is connected. The decimal points on the right, however, do connect to TE520 pins.


http://www.triscend.com/products/IndexFCintro.html

http://www.keil.com/demo/cdrom.htm

http://portal.knowledgebase.net/article.asp?article=9367&p=171


a

g

f

e

b

c

d

(206)

(207)(204)

(200)

(103)

(190)(199)

(205)

a

g

f

e

b

c

d

(106)

(194)(128)

(193)

(162)

(144)(125)

(135)

(xxx) = TE520Q pin number.

JP5 JP6

Figure 3. Diagram of TE520 Pin Connections to 7-Segment Displays.

Table 1 presents the same connection information, but in tabular form.

Table 1. TE520 Pin Connections to 7-Segment Displays.

Segment Left Display(TE520 PIO)

Right Display(TE520 PIO)

a 206 106 b 200 193 c 207 194 d 204 128 e 103 162 f 190 144 g 199 125 dp 205 135

Enable Jumper JP5 JP6

When the evaluation board is installed on the base board, the left-most display shares connections with LCD character display. The LCD character display has its own enable switch on the base board. There is no signal contention between both functions because both are output devices. You may leave the JP5 jumper installed when using the LCD display. However, you may notice some flickering on the LED display when the application software writes to the LCD character display.

Similarly, the right-most display shares connections with the SW1 8-position DIP-switch on the base board. The SW1 switch has its own enable switch on the base board. There is possible contention if the evaluation board is installed on the base board, switch SW1 is enabled on the base board, one of the SW1 DIP switches is in the DOWN position (on), and the application is writing a 1 to the associated LED segment.


WARNING:

! POTENTIAL CONTENTION IF INSTALLED ON BASE BOARD If the evaluation board is installed on base board, and the base board switch SW2.2 is in the DOWN (on) position, then do not drive a PIO connected to the right-most 7-segment display High while the connected switch from switch block SW1 it is the DOWN (on) position! This condition causes contention as the TE520 attempts to drive a logic High while PIO is connected to ground through the switch. This condition will cause excessive power consumption and may damage the TE520 after a long period of time.

Reclaiming PIO Pins The connections to the two 7-segment displays consume up to 16 PIO pins. Some applications may wish to use these pins for other functions. To reclaim the PIOs connected to a specific 7-segment display, remove its associated jumper. Removing the jumper disconnects the common cathode from VCC.

The jumper for each display is located immediately above the display, as shown in Figure 3. Jumper JP5 controls the left display while JP6 controls the right display, as shown in Table 2.

Table 2. Jumpers JP5 and JP6 Control 7-Segment Displays.

Jumper JP5

(Left Display) JP6

(Right Display)

Removed Disabled

(PIOs available to user application)

Disabled (PIOs available to user application)

Installed Enabled

(PIOs connected to 7-segment LED)

Enabled (PIOs connected to

7-segment LED)

88--PPoossiittiioonn DDIIPP SSwwiittcchh ((SSWW55)) The Triscend E5 Evaluation Board has an eight-position DIP-switch block located in the lower right corner of the board, labeled SW5.

Pin Connections from TE520 Figure 4 and Table 3 show the pin connections between the TE520 CSoC device and the evaluation boards 8-position DIP-switch.

When an individual switch is switched DOWN (on), the associated TE520 PIO pin connects directly to ground (GND). If the individual switch is switched UP (off), the TE520 PIO pin is completely disconnected, i.e. floating.

12345678

(85)(86)(89)(90)(91)(92)(94)

ON (Low)

(95)OFF (High)


Pull-up resistor inPIO pin required!

Figure 4. Diagram of PIO Connections to the 8-position DIP Switch (SW5).



Consequently, the optional pull-up resistor inside the associated TE520 pin must be used so that the switch indicates a logic High. Switching from Low to High will not be instantaneous as the E5s pull-up resistor has a relatively high resistor value, ranging between 50kΩ and 150kΩ.

The 8-position DIP-switches are not debounced but can be using resources inside the CSoC device.

When the evaluation board is installed on the base board, the evaluation boards SW5 switches are wired in parallel with the base boards SW3 switches, if switch SW2.3 is DOWN (on).

Table 3. PIO Connections to the 8-position DIP Switch (SW5). Switch Position TE520 PIO

SW5.1 85 SW5.2 86 SW5.3 89 SW5.4 90 SW5.5 91 SW5.6 92 SW5.7 94 SW5.8 95

Reclaiming PIO Pins To reclaim any of the eight PIO pins that connect to the 8-position DIP switch, simply switch the indicated switch position to OFF. While OFF, the PIO is completely disconnected, i.e. floating.

WARNING:

! Do not drive a PIO High into a switch while it is the ON position! This condition causes contention as the TE520 attempts to drive a logic High while PIO is connected to ground through the switch. This condition will cause excessive power consumption and may damage the TE520 after a long period of time.

PPuusshhbbuuttttoonn SSwwiittcchheess ((PPBB11,, PPBB22)) The E5 Evaluation Board has two normally open, momentary contact pushbutton switches, located to the left of the 7-segment LED displays, as shown in Figure 5.

PB1

PB2

Reset


(186)

(147)

(154,RST-)

Pull-up resistor in TE520 PIO pin required!Figure 5. Pushbutton Switches.


These switches are normally open. When one of these switches in pressed, the associated TE520 PIO pin is connected to ground (GND). When the switch is released, the connection is again open, i.e. floating.

Consequently, the optional pull-up resistor inside the associated TE520 pin must be used so that the switch indicates a logic High Switching from Low to High will not be instantaneous as the E5s pull-up resistor has a relatively high resistor value, ranging between 50kΩ and 150kΩ.

The pushbutton switches are not debounced but can be using resources inside the CSoC device.

Table 4 shows the pushbutton connections to the TE520, including the reset button.

Table 4. Evaluation Board Pushbutton Switches. Pushbutton TE520 PIO

PB1 186 PB2 147

Reset 154, RST-

When the evaluation board is installed on the base board, and switch SW2.8 is in the DOWN (on) position, the pushbutton PB1 is wired in parallel with pushbutton SW6 on the base board and pushbutton PB2 is wired in parallel with pushbutton SW7 on the base board. There are no potential contention issues unless one of the pushbuttons is held Low for long periods of time while the associated PIO pin drives High.

RReesseett PPuusshhbbuuttttoonn ((SSWW22)) When pressed, the Reset pushbutton switch directly resets the TE520 device using the RST- input, pin 154. Holding down the button holds the TE520 in reset. When released, the TE520 begins its boot sequence.

Table 4 shows the pushbutton connections to the TE520, including the reset button.

The Reset button on the evaluation board is wired in parallel with the RST button on the base board.

If the evaluation boards Flash is enabled jumper JP4 is installed then the TE520 loads the configuration from Flash, regardless of the previously downloaded configuration. If Flash is disabled or holds invalid configuration data, the E5 attempts to boot itself and then automatically enters power-down mode because the TE520 VSYS pin is pulled to VCC.



CCoonnnneeccttiioonn OOppttiioonnss SSeettttiinnggss SSwwiittcchh ((SSWW66)) Figure 6 shows the connection options provided on the E5 Evaluation Board via the SW6 4-position DIP-switch block. Isolation buffers connect or disconnect the TE520 from the parallel port or serial port or connect the TE520s JTAG download/debug port to the parallel port.

The RS-232 drivers on the evaluation board do not attached to any serial connectors, though are available on the auxiliary bus pins.

43 2 1

DISCONNECT

CONNECTConnect to RS-232 driver

Partially connect TE520 to parallelport (shared with JTAG pins)

Partially connect TE520 toremainder of parallel port

Connect TE520 JTAG to parallelport

Figure 6. Diagram of the Default Option Switch Settings, SW6.

Table 5 shows how each individual switch controls the configuration of the board. The default switch settings are highlighted in capital letters.

Table 5. Connection Options to Parallel Port, Serial Port. (default switch positions highlighted)

Switch Switch

Position Function

UP Disconnects TE520 PIO pins associated with RS-232 driver, reclaims PIO pins SW6.1

(RS-232) Down Connects TE520 PIO pins to the RS-232 driver (U10).

UP Disconnects TE520 PIO pins associated with part of parallel port, reclaims PIO pins SW6.2

(Remainder Parallel Port) Down Partially connects TE520 PIO pins to the remainder of the parallel port.

Additional control provided by SW6.3. See Figure 7.

UP Disconnects TE520 PIO pins associated with part of parallel port, reclaims PIO pins SW6.3

(Partial Parallel Port) Down Connects TE520 PIO pins, not TE520 JTAG pins, to parallel port

signal Data[3:0], Busy. See Figure 7.

Up Disconnects parallel port from TE520 JTAG pins, allows error-free use of 14-pin JTAG header SW6.4

(JTAG via Parallel Port) DOWN Connects part of parallel port to the TE520 JTAG pins, not general-

purpose PIO pins. See Figure 7.


33ΩTMSTCKTDITDO

SW6.4

SW6.3

579

11

SW6.2

7645

169170171174168

117

637984

175180181185109107

113

196

Data 0

Data 2Data 3Busy

Data 1

nError

SelectPaper-EndnAckData 4Data 5Data 6Data 7nStrobenAuto-Linefeed

nInitialize

nSelect-Printer

J3.2

J3.3

J3.4

J3.5

J3.11

J3.15

J3.13

J3.12

J3.10

J3.6

J3.7

J3.8

J3.9

J3.1

J3.14

J3.16

J3.17

154RST- J2.A21

J1.A15

J1.B15

J1.B16

J1.A16

J1.C31

J1.B31

J1.A31

J1.C30

J1.A32

J2.C26

J2.B6

J2.B10

J2.B12

J1.B30

J1.A30

J1.A23

J1.C22

J2.A25

J2.C18

J2.B25

J1.A20

Parallel PortConnector

TE520Pin

DINConnector

14-Pin JTAGHeader

+5V

1.2kΩ

+5V

4.7kΩ

+5V

4.7kΩ

Figure 7. Isolation Switches Connect/Disconnect the TE520 to/from the Parallel Port and JTAG.



PPaarraalllleell PPoorrtt The evaluation board has a 25-pin D-shell male parallel printer port connector. The primary purpose of this connector is for downloading and debugging applications on the TE520 device. However, the parallel port can also be used by the application as an I/O device.

Connection Options Three switches in switch block SW6 control the TE520 connections to the parallel port, as shown in Table 6. Figure 7 illustrates how the various option switches connect the parallel port signals to the TE520.

Table 6. Parallel Port Options Controlled by Switch Block SW6. Function SW6.4 SW6.3 SW6.2

Download/debug TE520 using standard parallel port cable DOWN UP Dont Care Download/debug TE520 using JTAG emulator connected to 14-pin JTAG header Up Up Dont Care

Connect TE520 to parallel port so that it can send/receive data Up Down Down Reclaim all TE520 PIO pins associated with parallel port Up Up Up

Pin Connections Figure 8 and Table 7 show the connections between the 25-pin parallel port connector and the TE520 device. The specific connectivity also depends on the SW6 switch settings.

In a typical PC application, an IBM-compatible printer port is controlled via three consecutive I/O ports in the processors I/O space, as shown in Figure 8.

113 23456789101112

25 1415161718192021222324

S3S4S5S6S7

D0D1D2D3D4D5D6D7

C0C1C2C3

Data

Status

Control Figure 8. The Signals on a Standard PC Parallel Port Connector are Generally Controlled by

Three Byte-Wide I/O Registers (viewed looking into socket from top edge of board).


Table 7. TE520 Connections to the Parallel Port , Depending on SW6 Settings.

DB-25 Pin Signal Name Direction from PC

PC Register Bit

JTAG Download SW6.4=DOWN

SW6.3=UP

Parallel Port SW6.4=UP

SW6.3=DOWNSW6.2=DOWN

1 nStrobe In/Out C0 109 2 Data 0 Out D0 RST-, 154 169 3 Data 1 Out D1 TMS, 7 170 4 Data 2 Out D2 TCK, 6 171 5 Data 3 Out D3 TDI, 4 174 6 Data 4 Out D4 175 7 Data 5 Out D5 180 8 Data 6 Out D6 181 9 Data 7 Out D7 185

10 nAck In S6 84 11 Busy In S7 TDO, 5 168

12 Paper-Out/ Paper-End In S5 79

13 Select In S4 63 14 nAuto-Linefeed In/Out C1 107

15 nError/ nFault In S3 117

16 nInitialize In/Out C2 113

17 nSelect-Printer/ nSelect-In In/Out C3 196

18-25 Ground Ground

Downloading Application and Using Parallel Port in Application It is possible to download an application to the TE520 via the parallel port and then use the parallel port as part of the application by modifying the SW6 configuration switches after downloading. However, you will not be able to debug the application via the parallel port in the case.



RRSS--223322 DDrriivveerr The E5 Evaluation Board has an RS-232 driver (component U10), located above the red 8-position DIP-switch. The board does not have its own serial connectors. The driver optionally connects to TE520 PIO pins, controlled by switch SW6.1 as shown in Figure 9.

SW6.1

0Ω

0Ω

0Ω

0Ω

AUX1

AUX2

AUX3

AUX4

R18R22

R20R24

RS-232 Driver

T1IN

T2IN

R1OUT

R2OUT

T1OUT

T2OUT

R1IN

R2IN

TXD1RXD1

TXD2RXD2

99

100

115

101

TE520Pin

Figure 9. The TE520 Optionally Connects to an On-board RS-232 Driver.

Pin Connections Table 8 shows the TE520 PIO connection to the evaluation boards RS-232 driver. The associated physical interface connections attach to the auxiliary bus signal AUX1 through AUX4. When the evaluation board is installed on the base board, these auxiliary signals are available on the Auxiliary Connector.

Table 8. Optional RS-232 Connections, Controlled by SW6.1. RS-232 Signal TE520 PIO AUX Bus

Transmit Data 1 (TXD1) 99 AUX1 Receive Data 1 (RXD1) 115 AUX2 Transmit Data 2 (TXD2) 100 AUX3 Receive Data 2 (RXD2) 101 AUX4

Connecting TE520 to RS-232 Driver The TE520 optionally connects to the RS-232 driver via isolation switches. To connect the TE520, switch SW6.1 to the DOWN position. See Table 5 for more information.

Reclaiming PIO Pins If not using the RS-232 driver, switch SW6.1 to the UP position. This allows the four PIO pins associated with the RS-232 to be used as PIO pins in the application.

Disconnecting Driver from Bus Connector The RS-232 driver itself connects to the auxiliary bus signals that connect to the J2 96-pin DIN connector. To disconnect an individual signal from the DIN connector, remove the associated surface-mount 0Ω resistor from the backside of the board. The resistor reference designators are shown in Figure 9.

When the E5 Evaluation Board is plugged into the base board, these RS-232 connections appear on the 26-pin auxiliary connector.


112288KKxx88 FFllaasshh The E5 Evaluation Board has its own 128Kx8 (1M-bit) boot Flash memory, as shown in Figure 10, that optionally holds the configuration and application code for the TE520 device.

128Kx8Flash

SW6JP4

Figure 10. Jumper JP4 on the Evaluation Board Connects the TE520 to Flash Memory.

Jumper JP4 connects the TE520s CE- output pin to chip-enable input on the Flash memory. This jumper must be removed when the evaluation board is installed on the base board.

FastChip Device Link (FDL) can download directly to the TE520s internal SRAM, even if Flash is enabled.

DDoowwnnllooaaddiinngg ttoo tthhee EE55 EEvvaalluuaattiioonn BBooaarrdd The E5 Evaluation Board can be configured and debugged using a standard parallel printer cable connected to your computers parallel printer port. For future expansion, the evaluation board also has a separate 14-pin JTAG header, JP7.

Using the Parallel Port To download and debug a design on the E5 Evaluation Board using the parallel port, please follow these steps, as shown in Figure 11.

40.0MHz

128Kx8Flash

U7

PB1

PB2

Reset

SW6JP4

JP5 JP6

JP1 JP3

OFF

ON

SW5CBA

1

32

CBA1

32

JTA

GH

eade

rPower On LED

Parallel Port

Oscillator

1 2

3

4

Figure 11. Preparing to Download to the E5 Evaluation Board.

Switch the evaluation boards power switch to the OFF position.



Connect a standard 25-pin PC parallel port cable to your computers parallel port. Connect the other end of the cable to E5 Evaluation Board using the parallel port connector.

Enable the parallel port connections to the TE520 JTAG pins by switching SW6.4 to the DOWN position. Disconnect other TE520 PIO ports from the same parallel port signals by switching SW6.3 to the UP position. The positions of switches SW6.2 and SW6.1 do not matter.

43

2 1

DISCONNECT

CONNECT

Switch the evaluation boards power switch to the ON position. If there was a previous application stored in Flash, the board will boot from Flash. However, the JTAG interface is able to overwrite any currently-loaded application.

Using the 14-Pin JTAG Header The 14-pin JTAG header, JP7, provides future expansion capabilities for the E5 Evaluation Board. It is not currently supported.

This 14-pin header does not support the E5 JTAG download/debug cable, also called the Wiggler cable.

FastChip Device Link (FDL) Configuration Settings The FastChip Device Link (FDL) utility creates a configuration image for your application that you then download to the E5 Evaluation Board. The following configuration options are available, shown in Figure 12.

Select Target Memory Type Choose the target memory where FDL will download the configuration image. When the E5 Evaluation Board operates stand-alone, the available options are as listed below.

• CSoC internal RAM

• Flash Memory

Select Memory Part Number If downloading to CSoC internal RAM, no memory part number is required. If downloading to Flash, select the Flash part number from your E5 Evaluation Board. The specific part number may vary, depending on when your board was manufactured.

At introduction, the E5 Evaluation Board includes an AMD 1M-bit Flash with 90 ns access time, or AM29LV001B-90 from the part drop list.


Figure 12. Typical FastChip Device Link (FDL) Settings for Downloading to the E5 Evaluation

Board's Flash Memory.

Choose the CSI Bus Clock Source There are two potential CSI bus clock sources available on the E5 Evaluation Board. The internal ring oscillator is available within each E5 CSoC device. Its frequency ranges between 5 MHz and 20 MHz.

Typically, however, most applications will use the external crystal clock oscillator provided on the board as it supplies a known, constant frequency.

At introduction, the E5 Evaluation Board includes a 40.000 MHz clock oscillator. Allow 5 ms for the oscillator to settle after power-on.

Disable Security Options for Easier Debugging

By default, always choose the No Security option when downloading, especially to Flash. If any of the security options are set, you will not be able to debug your application.



Triscend Development Base Board

BBooaarrdd OOvveerrvviieeww Figure 13 shows the major features of the Triscend Development Base Board. When partnered with the E5 Evaluation Board, the base board provides extended capabilities, including additional switches, LEDs, a LCD character display, and three expansion slots for prototype cards.

JP4

JP3

ON

CBA1

32

CBA1

32

FUSE

PLUG IN MODULE

512Kx8

SRAM

512Kx8

Flash

PowerOn LED

J1 J2 J3 J4 J5

Contrast

SW6 SW7 SW8 SW9

CFGSW3RST

SW5

SW1

LED1

RS232-1 RS232-2 OFF JP2

J11 J12 J13

J10

SW2

Figure 13. The Triscend Development Base Board.

MMaajjoorr CCoommppoonneennttss • Two 96-pin DIN connections to the E5 Evaluation Board

• Two RS232 drivers including connectors

• LCD character display (2x16) with contrast potentiometer

• Two user 8-position DIP-switches (SW1, SW3) with pull-up resistors

• Eight-LED bar display with current limiting resistors (LED1)

• Four pushbutton switches (SW6, SW7, SW8, SW9) with pull up resistors

• 4-Mbit (512Kx8) 90ns Flash memory

• 4-Mbit (512Kx8) 20ns SRAM memory with switches to configure as download memory or as stand-alone application RAM

• 5V to 3.3V regulator, rated at 2.5A over 0-40° C with heat sink

• 5VDC power input jack with reversal protection diode, over voltage protection diode, fuse, on-off slide switch and power indicator


• Reset voltage-monitor circuit with reset button and LED

• Configuration DIP switch (SW2) to connect or disconnect the LCD display, DIP switches, LEDs, pushbutton switches, RS-232 driver, and Flash and SRAM memories from PIO pins

• AUX 26-pin connector (digital and analog power pins, AUX1-AUX16 pins, Reset/Manual Reset signals)

• 14-pin JTAG connector

• Prototyping expansion board

• Three 96-pin expansion slots

• A replacement fuse



BBooaarrdd OOppttiioonn SSwwiittcchh SSeettttiinnggss ((SSWW22)) The base board supports a variety of options, all controlled via the SW2 8-position DIP-switch. Figure 14 graphically shows the options provided by the SW2 switch, while Table 9 describes the switch settings in more detail.

12345678

ENABLE

DISABLE

PB LED

2

LED

1

RS2

32-2

RS2

32-1

SW2

SW1

LCD

Figure 14. Baseboard Switch SW2 Configures Various Board Options.

Table 9. Base Board Configuration Options.

Switch Switch

Position Function Up Disconnects TE520 PIO pins from the LCD character display.

SW2.1 (LCD) Down

Connects TE520 pins to the LCD character display. The connections are in parallel with the left-most 7-segment LED display. Remove jumper JP6 on the evaluation board.

Up Disconnects TE520 PIO pins from the 8-position DIP-switch SW1 on the baseboard. SW2.2

(Switch SW1) Down Connects TE520 pins to the 8-position DIP-switch SW1 on the baseboard. The connections are in parallel with DIP-switch SW5 on the evaluation board. All SW5 DIP-switches should be OFF, the up position.

Up Disconnects TE520 PIO pins from the 8-position DIP-switch SW3 on the baseboard.

SW2.3 (Switch SW3) Down

Connects TE520 pins to the 8-position DIP-switch SW3 on the baseboard. The connections are in parallel with the right-most 7-segment LED display. Remove jumper JP5 on the evaluation board. Switches SW3.7 and SW3.8 may also be shared with pushbutton switches SW8 and SW9.

Up Disconnects TE520 PIO pins from RS-232 port P1. SW2.4

(RS232-1) Down Connects TE520 pins to RS-232 port P1 on the baseboard. The connections may be in parallel with the nError and Select signals from the parallel port if SW6.2 is in the DOWN position. SW6.2 should be in the UP position.

Up Disconnects TE520 PIO pins from RS-232 port P2. SW2.5

(RS232-2) Down Connects TE520 pins to RS-232 port P2 on the baseboard. The connections may be in parallel with the nAck and Paper-Out/Paper-End signals from the parallel port if SW6.2 is in the DOWN position. SW6.2 should be in the UP position.

Up Disconnects TE520 PIO pins from right side of LED bar, LED1. SW2.6 (Right side

LED1) Down Connects TE520 pins to right four LEDs on LED bar, LED1. The connections may be in parallel with the Data[7:4] signals from the parallel port if SW6.2 is in the DOWN position. SW6.2 should be in the UP position.

Up Disconnects TE520 PIO pins from left side of LED bar, LED1. SW2.7

(Left side LED1) Down

Connects TE520 pins to left four LEDs on LED bar, LED1. The connections may be in parallel with the nStrobe, nAuto-Linefeed, nInitialize, and nSelect-Printer signals from the parallel port if SW6.2 is in the DOWN position. SW6.2 should be in the UP position.


Switch Switch

Position Function Up Disconnects TE520 PIO pins from the four large pushbutton switches on the

baseboard, SW6, SW7, SW8, and SW9.

SW2.8 (PB) Down

Connects TE520 pins to the four large pushbutton switches on the baseboard, SW6, SW7, SW8, and SW9. SW6 on the baseboard is in parallel with PB2 on the evaluation board. SW7 on the baseboard is in parallel with PB1 on the evaluation board. Pushbutton SW8 on the baseboard is in parallel with segment g on the right-most 7-segment LED display on the evaluation board. SW9 on the baseboard is in parallel with the decimal point segment on the right-most 7-segment LED display on the evaluation board. Remove jumper JP6 on the evaluation board.

LLCCDD CChhaarraacctteerr DDiissppllaayy The base board includes a 2x16 character LCD display, located in the lower right-hand corner as shown in Figure 15. The LCD data inputs are shared with the left-most 7-segment LED display on the evaluation board.

Contrast

SW6 SW7 SW8 SW9

(12)(102)(195)(206)(200)(207)(204)(103)(190)(199)(205)

LCD

_D7

LCD

_D6

LCD

_D5

LCD

_D4

LCD

_D3

LCD

_D2

LCD

_D1

LCD

_D0

E RS

RW


SW2.1=DOWN to enable LCD display

Shared connections with left-most 7-segment display

Figure 15. Character LCD Display.

To use the 2x16 character LCD display in an application, follow these steps.

• SW2.1 must be in the DOWN position to connect the TE520 to the LCD display.

• Ideally, remove jumper JP6 on the evaluation board, which controls the left-most 7-segment display. This step is not required but writing to the LCD display may cause strange flickering on the left-most 7-segment display.



Pin Connections Table 10 shows the TE520 PIO connections to the LCD display. Some of the LCD connections are also shared with the left-most 7-segment display on the evaluation board if jumper JP6 is installed.

Table 10. Character LCD Display Pin Connections.

LCD Signal TE520 PIO Left-Most LED

Segment LCD_D0 206 a LCD_D1 200 b LCD_D2 207 c LCD_D3 204 d LCD_D4 103 e LCD_D5 190 f LCD_D6 199 g LCD_D7 205 Decimal point

E 195 RS 102 RW 12

Supporting IP Modules The FastChip LCD Char Driver module easily connects your application to the base boards LCD character display. To locate this module, simply type LCD in the Find text box, as shown in Figure 16.

Figure 16. Find the "LCD Char Driver" by Typing "LCD".

The LCD character display driver has few options, as shown in Figure 17. All the connections to I/O pins are embedded within the module. It is possible to change the symbolic names for the two LCD registers, though Triscend recommends leaving them set to the default value, shown in Table 11, to be compatible with the various sample applications provided.

Table 11. LCD Character Display Symbolic Addresses. Symbolic Address Function

LCD_CTR LCD Command Register LCD_DATA LCD Data Register

For additional information on the module, click the Help button at the bottom of the dialog box.


Figure 17. FastChip's LCD Character Display Driver Module.

Use FastChips I/O Editor, shown in Figure 18, to assign the LCD driver pins to the appropriate TE520 PIO pins, according to Figure 15 and Table 10.

Figure 18. FastChip I/O Editor Displays the LCD Driver Module Pins.

NOTE:

Applications originally created for the iKit 2000 development board also operate on the E5 Development Platform with minimal modifications. Be sure to re-assign PIO locations.



Reclaiming PIO Pins To reclaim all the PIO connections to the LCD display, simply flip switch SW2.1 to the UP (off) position.

Contrast Adjustment The character LCD display has an associated contract adjustment potentiometer R17, located immediately to the right of the display, as shown in Figure 15. If you expect to see characters on the display and none appear, try adjusting the potentiometer.

LLEEDD DDiissppllaayy BBaarr ((LLEEDD11)) The base board includes an eight-LED bar display, located immediately above the 8-position DIP-switches along the bottom edge of the board.

The display is split into two groups of four LEDs, as shown in Figure 19. To enable the four left LEDs, flip switch SW2.7 to the DOWN (on) position. To enabled the four right LEDs, flip switch SW2.6 to the DOWN (on) position.

The LED outputs are also shared with some signals from the E5 Evaluation Boards parallel port, as shown in Table 12. If using the LED bar then switch SW6.2 on the evaluation board should be in the UP (off) position to disable the parallel port connections.

(185)(181)

(180)(175)

(196)(113)

(107)(109)

8 7 6 5 4 3 2 1

SW2.6=DOWN toenable right LEDs

SW2.7=DOWN toenable left LEDs

Shared connections with parallelport on evaluation board

Figure 19. Eight-LED Bar Display.

Table 12 shows the connections to the LED bar display from the TE520. The connections could be shared with some of the parallel port connection if switch SW6.3 is in the DOWN position.

Table 12. LED Bar Pin Connections.

Group LED TE520 PIO Enable Switch

Shared Parallel Port Connection

8 196 nSelect-Printer/ nSelect-In

7 113 nInitialize 6 107 nAuto-Linefeed

Left

5 109

SW2.7=DOWN (Left Group)

nStrobe 4 185 Data 7 3 181 Data 6 2 180 Data 5

Right

1 175

SW2.6=DOWN (Right Group)

Data 4


88--PPoossiittiioonn DDIIPP--SSwwiittcchheess ((SSWW11,, SSWW33)) The base board has two 8-position DIP-switch blocks, as shown in Figure 20. Each individual switch is pulled to VCC through a 10kΩ pull-up resistor. Closing a switch, turning it ON, creates a logic Low. Opening a switch, turning it OFF, opens the connection. The connection is then pulled high via a 10 kΩ pull-up resistor, creating a logic High.

To enable SW1, set switch SW2.2 on the baseboard to the DOWN position.

To enable SW3, set switch SW2.3 to the baseboard to the DOWN position.

Baseboard switch SW1 shares TE520 PIO pins with the right-most LED display on the evaluation board. To disconnect the right-most LED display, remove the JP6 jumper from the E5 Evaluation Board.

Baseboard switch SW3 shares TE520 PIO pins with the 8-position DIP-switch on the evaluation board, SW5. To disconnect SW5, position each switch to the UP position.

ON (Low)

OFF (High)


12345678

(106)(193)(194)(128)(162)(144)(125)(135)

12345678

(85)(86)(89)(90)(91)(92)(94)(95)SW1 SW3

SW5

a

g

f

e

b

c

d

(106)

(194)(128)

(193)

(162)

(144)(125)

(135)

JP6Remove jumper JP6

All switches to UP position

E5 Evaluation Board

Base Board

SW2.2=DOWN to enable SW1 SW2.3=DOWN to enable SW3

Right-most LED display

Figure 20. User Switches on Baseboard (SW1, SW3) Share Connections with Evaluation Board.

FFoouurr PPuusshhbbuuttttoonn SSwwiittcchheess ((SSWW66,, SSWW77,, SSWW88,, SSWW99)) The base board has four black, momentary contact pushbutton switches located immediately below the LCD character display, as shown in Figure 21.

To enable the pushbutton switches, flip switch SW2.8 to the DOWN position. When pressed, the pushbutton switch is shorted to ground, creating a logic Low. When released, the PIO is disconnected and pulled to VCC via a pull-up resistor, creating a logic High.

The two left-most switches, SW6 and SW7, are wired in parallel with the two pushbutton switches on the evaluation board, PB2 and PB1 respectively.

The two right-most switches, SW8 and SW9 share some connections with the right-most 7-segment LED display on the evaluation board.



SW6 SW7 SW8 SW9

(135)(125)(147)(186)


Shared connections with right-most 7-segment display

In parallel with PB2, PB1pushbuttons on evaluation board

SW2.8=DOWN to enable pushbuttons

Figure 21. Four Pushbutton Switches.

Table 13 shows the TE520 PIOs that connect to each pushbutton switch.

Table 13. Pushbutton Switch Pin Connections. Pushbutton TE520 PIO

SW6 186 SW7 147 SW8 125 SW9 135

RReesseett PPuusshhbbuuttttoonn ((SSWW55)) When pressed, the RST pushbutton switch directly resets the TE520 device using the RST- input, pin 154. Holding down the button holds the TE520 in reset. When released, the TE520 begins its boot sequence.

CFG

RST

SW5

Figure 22. The Base Board Reset Pushbutton is Located in the Lower Left Corner.

The RST pushbutton on the base board is wired in parallel with the Reset pushbutton on the evaluation board.

If the on-board Flash or SRAM is properly enabled using jumpers JP3 and JP4, then the TE520 loads the configuration from Flash or SRAM, regardless of the previously downloaded configuration. If Flash or SRAM is disabled or holds invalid configuration data, the E5 attempts to boot itself and then automatically enter power-down mode because the TE520 VSYS pin is pulled to VCC.


RRSS--223322 PPoorrttss wwiitthh CCoonnnneeccttoorrss ((RRSS223322--11,, RRSS223322--22)) The base board has two DB9 male serial port connectors, as shown in Figure 23, located in the upper left-hand corner near the AC power connector. The RS-232 ports on the base board are completely independent of the RS-232 drivers available on the evaluation board.

RS232-1 RS232-2TX

D1

RXD

1

(117) (63)

TXD

2

RXD

2

(79) (84)

SW2.4=DOWN toenable RS232-1

SW2.5=DOWN toenable RS232-2

Shared connections with parallelport on evaluation board

(xxx) = TE520Q pinnumber.

Figure 23. Connections to Two RS-232 Port Connectors.

Pin Connections to TE520 The serial port signals are also shared with some signals from the E5 Evaluation Boards parallel port, as shown in Table 12. If using either serial port, then switch SW6.2 on the evaluation board should be in the UP (off) position to disable the parallel port connections.

Table 14. Base Board RS-232 Port Connections.

RS-232 Port Signal TE520 PIO Enable Switch

Shared Parallel Port Connection

TXD1 117 nError/ nFault RS232-1

RXD1 63 SW2.4=DOWN

Select

TXD2 79 Paper-Out/ Paper-End RS232-2

RXD2 84 SW2.5=DOWN

nAck

RS-232 Port Connectors Both serial ports provide a Data Terminal Equipment (DTE) interface, shown in Figure 24, similar to the serial interface found on a PC computer. Typically, a UART within the TE520 drives the serial port. An application uses either the embedded 8051s UART or uses a UART soft IP module from the FastChip library. The data transmit and receive signals must be connected to the PIOs indicated in both Figure 23 and Table 14.

Each 9-pin serial connector is wired for basic loopback handshaking, in case the other end of the connection requires hardware flow control.



12345

678

TE520

RS-232 Driver

RXDTXD

9

Figure 24. Each Base Board RS-232 Port is a DTE Connection with Loopback Handshaking (view

looking into connector from top edge of base board).

Table 15 shows the signals connected to each 9-pin D shell connector. The signals to and from the TE520 are buffered through an RS-232 driver before appearing on the connector.

Table 15. RS-232 Port Signals on 9-Pin Connector. Pin RS-232 Function Connection 1 Data Carrier Detect (DCD) Connected to DTR, DSR (loopback)

2 Receive Data (RXD) RS-232 receive data. Buffered receive data arrives as input to TE520. See Table 14.

3 Transmit Data (TXD) RS-232 transmit data. Transmit data is an output from TE520 to RS-232 driver. See Table 14.

4 Data Terminal Ready (DTR) Connected to DCD, DSR (loopback) 5 Ground Ground 6 Data Set Ready (DSR) Connected to DCD, DTR (loopback) 7 Request to Send (RTS) Connected to CTS (loopback) 8 Clear to Send (CTS) Connected to RTS (loopback) 9 Ring Indicator (RI) No Connect

Cabling Requirements The base boards RS-232 ports are on the Data Terminal Equipment (DTE) side of the connection. Consequently, to connect the base board to a PC computer, which is another DTE device, you must use a null modem connection.

If connecting the base board to a Data Communications Equipment (DCE) device, like a modem, then you may use a standard, straight-through serial cable.


551122KKxx88 BBaassee BBooaarrdd FFllaasshh aanndd SSRRAAMM MMeemmoorryy The base board has its own separate external Flash and SRAM, as shown in Figure 25. These are primarily used to hold the TE520s configuration and application program.

Flash memory is non-volatile and holds its contents, even while power is removed from the board. However, reprogramming a Flash memory requires many minutes.

To aid in faster debugging, the base board also includes a large SRAM memory, large enough to simulate Flash. Downloading to SRAM usually takes less than a minute, significantly faster than programming a Flash device. However, SRAM is volatile and loses its contents if you remove power from the board.

The SRAM is also available as a separate memory to store application data. In this mode, the SRAMs enable, read, and write control signals are provided by user-defined logic in the TE520s configurable system logic (CSL) and supplied on three PIO pins.

Memory Jumper Settings Two jumpers, JP3 and JP4, select the download target memory on the base board. The jumpers are located in the upper right-hand corner of the board, below the 14-page JTAG header, as shown in Figure 25.

JP4

JP3

ON

32512K

x8SRAM

512Kx8

Flash

J5

JP2

Figure 25. Jumpers JP3 and JP4 Select the Download Target Memory.

NOTE:

Be sure to disconnect jumper JP4 on the E5 Evaluation Board before attempting to download a design to the base board.

Table 16 shows the jumper settings required to select a specific download target memory.

Applications can always be downloaded to and executed from the TE520s internal SRAM, regardless of the Jumper J3 and J4 settings.

Jumper JP3 must always be installed in order to download to and execute from Flash.



Table 16. Modify Jumpers JP3 and JP4 to Select the Download Target Memory. Download Target Diagram Jumper JP3 Jumper JP4

Internal SRAM JP4

JP3

Dont Care Dont Care

External SRAM JP4

JP3

REMOVED Dont Care

External Flash (disable SRAM) JP4

JP3

INSTALLED REMOVED

External Flash (enable SRAM for use by application as data storage via separate

PIO pins)

JP4

JP3

INSTALLED INSTALLED


Using External SRAM to Store Application Data The large, single-cycle 512Kx8 SRAM can optionally be used to store application data. To use the external SRAM in an application, jumpers JP3 and JP4 must both be installed. Installing both jumpers connects the external SRAMs control signals to TE520 PIO pins, instead of the usual Memory Interface Unit (MIU) dedicated outputs, as shown in Figure 26. The data and address signals are still provided by the MIU, however.

DQ[7:0]

A[18:0]

CE-

OE-

WE-

DQ[7:0]

A[20:0]

CE-

OE-

WE-

VCC0 0

0 1

1 0

1 1

Jumper JP3Jumper JP4

SRAM_CE-

SRAM_OE-

SRAM_WE-

S1S0


(122)

(108)

(118)

TE520External SRAM

MIU

PIO

Figure 26. Installing Jumper JP3 and JP4 Allows External SRAM for Application Data.

Table 17 shows the PIO pins that connect to the external SRAM when jumpers JP3 and JP4 are both installed, allowing the application to store data in the SRAM.

Table 17. TE520 Connections to External SRAM when Used for Application Data. External SRAM Control Signal TE520 PIO Chip Enable (CE-) 122 Output Enable (OE-) 108 Write Enable (WE-) 118

The SRAM control signals are supplied by logic in the TE520s Configurable System Logic (CSL). A Chip Select module in the CSL matrix supplies the chip enable control signal to the external SRAM. In The Chip Select module must be configured to drive the MIU when the 8051 or one of the DMA controllers accesses the external SRAM.

For more information on connecting a large external memory to the TE520s Memory Interface Unit (MIU), see application note, AN10: Setting Up a Secondary External Memory, available from the Triscend web site.


http://www.triscend.com/products/an10.pdf


AAuuxxiilliiaarryy CCoonnnneeccttoorr ((AAUUXX,, JJPP11)) The development board has a 26-pin male auxiliary socket, located near the power switch. This optional socket is used to distribute analog and other special signals to off-board connections. Figure 27 shows the pin layout of the socket. All pins are on 0.1-inch centers.

1

2

35791113151719212325

468101214161820222426

26-pin AUX Connector

(154)(83)(66)(81)(64)(77)(61)(70)(58)(3)


RST-BCLK

(99)(115)(100)(101)

E5 Eval. Board RS-232 Driver

TXD1RXD1TXD2RXD2

SW6.1=DOWN

Figure 27. Layout of the Auxiliary Connector, Looking from Top Edge of the Board.

The E5 Evaluation Board optionally uses four pins on the connectorpins 14, 16, 18, and 20that connect to the RS-232 driver on the evaluation board, when the evaluation board is plugged into the base board and switch SW6.1 is in the DOWN position.

Table 18. Auxiliary Connector Signals. Socket Pin Signal Name TE520 PIO

1 RST- 154 2 +5 3 RST- button 4 VCC 5 AUX16 83 6 GND 7 AUX15 66 8 V+ 9 AUX14 81

10 V- 11 AUX13 64 12 Analog ground 13 AUX12 77

Socket Pin Signal Name TE520 PIO 14 AUX1 (TX1) 99 15 AUX11 61 16 AUX2 (RX1) 115 17 AUX10 70 18 AUX3 (TX2) 100 19 AUX9 58 20 AUX4 (RX2) 101 21 AUX8 22 AUX5 23 AUX7 24 AUX6 25 BCLK 3 26 GND


EExxppaannssiioonn BBuuss The base board provides three 96-pin DIN expansion connectors, as shown in Figure 28. Labeled and J1, J2, and J3, these sockets allow easy expansion and prototyping of designs based around the Triscend E5 family.

BA1

32

PowOn

J1 J2 J3 J4

RS232-1 RS232-2

J11 J12 J13

J10

BA1

32

SW5Figure 28. Expansion Bus Connectors and Probe Pins on the Base Board.

The included prototype card plugs into any of the three expansion sockets. Adding special circuitry to the prototype card minimized any disruption to the remainder of the development platform.

A complete connection listing for each expansion socket is provided in Table 20.



PPrroobbee PPiinnss The base board also provides easy-to-use probe point connections, also shown in Figure 28.

The probe pins, shown in their relative locations in Figure 29, provide convenient connections to an oscilloscope, logic analyzer, or to other prototype circuitry.

Signals on connector J11 correspond to signals found on the J1 96-pin DIN expansion bus connector. Similarly, J12 signals correspond to the J2 connector and J13 signals to the J3 connector.

Signals on the J10 connector correspond to a majority of the TE520 system signals, including address, data, and control signals.

The underlined signals connect to one or more I/O devices on the development platform. In the electronic version of this document, these signals are hyperlinked to the TE520 pin description.

J11 J12 J13 93 GND GND GND GND GND

LCD_D2:207 98 93 GND 93 GND 127 206:LCD_D0 LCD_D7:205 96 LCD_D1:200 162 119 123 A30:46 204:LCD_D3 168 199,LCD_D6

LCD_E:195 118:SRAM_WE A28:39 40:A29 170 169 189 190:LCD_D5 A26:29 30:A27 174 171 62 36 193 195 106 186

129 56 143 145 LED_2:180 175:LED_1 AUX14:81 126 A25:27 136 LED_4:185 181:LED_3 GBUF3:75 77:AUX12 82 26:A24 147 196:LED_8 AUX15:66 70:AUX10 76 146 144 79:GBUF2 AUX11:61 64:AUX13 67 71 128 135

55 58:AUX9 124 65 GBUF4:63 125 49 51 116 60 GBUF1:84 117 42 44 A22:20 21:A23 114 115

LCD_D4:103 83:AUX16 A20:13 14:A21 A20:13 113:LED_7 34 102:LCD_RS 35 80 LED_6:107 109:LED_5 23 32 31 33 99 100 15 17 16 22 95 101 50 11 43 74 92 94: GBUF0

GBUF5:57 48 54 41 90 91 LCD_RW:12 122:SRAM_CE 85 108 86 89

GN

D

3:BC

LK

9:PI

O/A

19

203:

A17

A15,

198

188:

A13

184:

A11

179:

A9

167:

A7

165:

A5

161:

A3

159:

A1

142:

D7

138:

D5

132:

D3

111:

D1

152:

OE-

15

3:C

E-

MAN

RST

B 14

8:PI

O/X

DO

NE

155:

VSYS

XB

US1

J10

GN

D

PIO

/A20

: 13

PIO

/A18

: 8

A16:

202

A14:

197

A12:

187

A10:

183

A8:1

78

A6:1

66

A4:1

64

A2:1

60

A0:1

58

D6:

141

D4:

137

D2:

131

D0/

SDIN

:110

W

E-:1

50

PMO

D/P

IO/A

31:4

7 R

ST-:1

54

SLAV

E-:1

51

XBU

S2

XBU

S0

Figure 29. Probe Pins on the Base Board.


Triscend E5 Development Platform Mounting the E5 Evaluation Board on the Base Board creates the Triscend E5 Development Platform. This section describes how to download to the development platform and how to mount and unmount the evaluation board form the base board.

DDoowwnnllooaaddiinngg ttoo tthhee EE55 DDeevveellooppmmeenntt PPllaattffoorrmm The E5 Development Platform can be configured and debugged using a standard parallel printer cable connected to your computers parallel printer port. For future expansion, the base board also has a separate 14-pin JTAG header, JP2.

Using the Parallel Port To download and debug a design on the E5 Development Platform using the parallel port, please follow these steps, as outlined in Figure 30.

JP4

JP3

ON

CBA1

32

CBA1

32

FUSE

PLUG IN MODULE

512Kx8

SRAM

512Kx8

Flash

PowerOn LED

J1 J2 J3 J4 J5

Contrast

SW6 SW7 SW8 SW9

CFGSW3RST

SW5

SW1

LED1

RS232-1 RS232-2 OFF JP2

J11 J12 J13

J10

SW2

40.0MHz

128Kx8Flash

U7

PB1

PB2

Reset

SW6JP4

JP5 JP6

JP1 JP3

OFF

ON

SW5JT

AG

Hea

derPower On LED

Parallel Port

Oscillator

1

5

4 3

2

6

Figure 30. Preparing to Download to the E5 Development Platform.

Switch the base boards power switch to the OFF position.

Connect a standard 25-pin PC parallel port cable to your computers parallel port. Connect the other end of the cable to the E5 Evaluation Board using the parallel port connector.

Using jumper JP3 and JP4 on the base board, select the desired download target memory.



Enable the parallel port connections to the TE520 JTAG pins by switching SW6.4 to the DOWN position. Disconnect other TE520 PIO ports from the same parallel port signals by switching SW6.3 to the UP position. The positions of switches SW6.2 and SW6.1 do not matter.

43

2 1

DISCONNECT

CONNECT

Configure the base board to enable the desired I/O devices using switch SW2.

Switch the base boards power switch to the ON position. If there was a previous application stored in Flash, the board will boot from Flash. However, the JTAG interface is able to overwrite any currently-loaded application.

FastChip Device Link (FDL) Configuration Settings The FastChip Device Link (FDL) utility creates a configuration image for your application that you then download to the development platform. The following configuration options are available, as shown in Figure 31.

Figure 31. Typical FastChip Device Link (FDL) Settings for Downloading to the Base Boards

Flash Memory.


Select Target Memory Type Choose where FDL will download the configuration image. For the E5 Development Platform with the E5 Evaluation Board installed, the available options are as listed below.

• CSoC internal RAM (any JP3, JP4 jumper settings will work)

• Flash Memory (jumper JP3 must be installed)

• External SRAM (jumper JP3 must be removed)

• If downloading to CSoC internal RAM, no memory part number is required.

• If downloading to Flash Memory, select the Flash part number from your base board. The specific part number may vary, depending on when your board was manufactured. At introduction, the base board includes an AMD 512Kx8 (4M-bit) Flash device with 90 ns access time, or AM29LV004B-90 from the part drop list.

• If downloading to External SRAM, select the SRAM device part number from your base board. The specific part number may vary, depending on when your board was manufactured. At introduction, the base board includes a Cypress Semiconductor 512Kx8 (4M-bit) SRAM device with 15 ns access time, or CY7C1046BV33-20 from the part drop list.

Choose the CSI Bus Clock Source There are two potential CSI bus clock sources available. The internal ring oscillator is available within each E5 CSoC device. Its frequency ranges between 5 MHz and 20 MHz.

Typically, however, most applications will use the external crystal clock oscillator provided on the board as it supplies a known, constant frequency.

At introduction, the E5 Evaluation Board includes a 40.000 MHz clock oscillator. Allow 5 ms for the oscillator to settle after power-on.

Disable Security Options for Easier Debugging

By default, always choose the No Security option when downloading, especially to Flash. If any of the security options are set, you will not be able to debug your application.

Select Memory Part Number



CCoonnnneeccttiinngg tthhee EE55 EEvvaalluuaattiioonn BBooaarrdd ttoo tthhee BBaassee BBooaarrdd The E5 Evaluation Board functions as a low-cost stand-alone development platform. However, the evaluation board plugs into the baseboard to provide a richer set of capabilities including a LCD character display, two serial port connectors, and an expansion bus suitable for prototype cards.

Before attaching the evaluation board to the baseboard, please follow these steps.

40.0MHz

128Kx8Flash

U7

PB1

PB2

Reset

SW6JP4

JP5 JP6

JP1 JP3

OFF

ON

SW5CBA

1

32

CBA1

32

JTA

GH

eade

rPower On LED

Parallel Port

Oscillator

1

2

3

4

5

6

Figure 32. Preparing the Evaluation Board Before Installation on Base Board.

Switch the evaluation boards power switch to the OFF position.

Unplug the power adaptor from the JP2 barrel connector on the E5 Evaluation Board.

Remove jumpers JP1 and JP3. This disconnects the power adaptor connection from the E5 Evaluation Board circuitry. The Base Board will provide all required power.

Flip all switches on switch block SW5 to the UP position (all switches off).

Remove jumper JP4 to disable the Flash memory on the evaluation board.

If reclaiming PIO pins connected to the 7-segment LED display, remove jumpers JP5 and JP6.


JP4

JP3

ON

CBA1

32

CBA1

32

FUSE

PLUG IN MODULE

512Kx8

SRAM

512Kx8

Flash

PowerOn LED

J1 J2 J3 J4 J5

Contrast

SW6 SW7 SW8 SW9

CFGSW3RST

SW5

SW1

LED1

RS232-1 RS232-2 OFF JP2

J11 J12 J13

J10

SW2

40.0MHz

128Kx8Flash

U7

PB1

PB2

Reset

SW6JP4

JP5 JP6

JP1 JP3

OFF

ON

SW5

JTAG

Hea

derPower On LED

Parallel Port

Oscillator

7

9

7

8

10 11

Figure 33. The E5 Evaluation Board Mounted on the Base Board.

Insert the E5 Evaluation Board into location on the two 96-pin DIN-connectors above the character LCD display.

Modify jumpers JP3 and JP4 on the base board for your preferred download method.

Configure the base board to enable the desired I/O devices using switch SW2.

Insert the +5VDC/AC power adaptor into the JP6 barrel connector on the base board.

Switch the base boards power switch to the ON position.



RReemmoovviinngg tthhee EE55 EEvvaalluuaattiioonn BBooaarrdd ffrroomm tthhee BBaassee BBooaarrdd If the E5 Evaluation Board is already installed on the Base Board and you wish to use the evaluation board in a stand-alone application, follow these steps to remove and prepare the evaluation board.

JP4

JP3

ON

CBA1

32

CBA1

32

FUSE

PLUG IN MODULE

512Kx8

SRAM

512Kx8

Flash

PowerOn LED

J1 J2 J3 J4 J5

Contrast

SW6 SW7 SW8 SW9

CFGSW3RST

SW5

SW1

LED1

RS232-1 RS232-2 OFF JP2

J11 J12 J13

J10

SW2

40.0MHz

128Kx8Flash

U7

PB1

PB2

Reset

SW6JP4

JP5 JP6

JP1 JP3

OFF

ON

SW5

JTA

GH

eade

rPower On LED

Parallel Port

Oscillator

12

3

Figure 34. Preparing to Remove the E5 Evaluation Board from the Base Board.

Switch the base boards power switch to the OFF position.

Unplug the power adaptor from the barrel connector on the base board.

Firmly grasp the E5 Evaluation Board by the edges and gently rock it to separate the board from the base boards DIN connectors.


40.0MHz

128Kx8Flash

U7

PB1

PB2

Reset

SW6JP4

JP5 JP6

JP1 JP3

OFF

ON

SW5CBA

1

32

CBA1

32

JTA

GH

eade

rPower On LED

Parallel Port

Oscillator

8

7

4

6

5

Figure 35. Preparing the Evaluation Board for Stand-Alone Operation.

Re-install jumper JP4 to enable the evaluation boards Flash memory.

Re-install jumpers JP1 and JP3 to enable the on-board power supply.

If previously removed, re-install jumper JP5 and JP6 to enable the two 7-segment LED displays.

Insert the +5VDC/AC power adaptor into the JP2 barrel connector on the evaluation board.

Switch the evaluation boards power switch to the ON position.



Troubleshooting Guide

EEvvaalluuaattiioonn BBooaarrdd Power-on LED doesnt light up

• Check that the +5VDC power adaptor is connected to the power jack and to AC wall power.

• Check that the power switch is turned ON. The Power-On LED should be lit.

• Check the integrity of the fuse. The fuse is designated at component F1 and is located on the bottom side of the board, near the power adaptor, the parallel port connector, and the +3.3V regulator. Using an ohmmeter or connectivity tester, check to see if there is a connection between both sides of the fuse.

7-segment LEDs dont light up

• Observe the Power-On LED. Check that power is applied to the board.

• If using the evaluation board stand-alone, without the base board, check that jumpers JP1 and JP3 are installed.

• Check that jumpers JP5 and JP6 are installed.

• Check that the application inside the Triscend E5 CSoC device drives the selected segment Low to light the segment.

7-segment LEDs momentarily glow slightly and then light up

• If driven by signals controlled by the pushbutton switches or the DIP switches, this condition might be caused because pull-ups are required in PIO pins, in order to create a logic High.

FDL: Unable to reset and halt CSoC. Command Halted

• Press the Reset pushbutton.

• Try downloading again.

• If still unable to connect, quit and restart FDL.

FDL: No Communication With Target

• Check Option Switch Settings (SW6). Check that the settings match your intended download method.

• Check that the security options are not set in your FDL configuration options. If the security options were set and your application is downloaded into Flash, please follow these steps.

• Turn off power to the board.

• Remove jumper JP4, near switch SW6.

• Re-apply power to the board.

• Download any design to internal SRAM.

• Replace jumper JP4. There is no need to disconnect power.

• Download your application to Flash.

DDeevveellooppmmeenntt PPllaattffoorrmm ((EE55 EEvvaalluuaattiioonn BBooaarrdd ++ BBaassee BBooaarrdd)) Power-on LED doesnt light up

• Check that the +5VDC power adaptor is connected to the power jack and to AC wall power.

• Check that the power switch is turned ON. The Power-On LED should be lit.


• Check the integrity of the fuse, located adjacent to the base boards power switch. Using an ohmmeter or connectivity tester, check to see if there is a connection between both sides of the fuse.

• If there is no continuity, remove the socketed fuse from the base board and insert the replacement fuse shipped with the base board.

LCD display: No characters visible

• Switch SW2.1 must be in the DOWN position to enable the display.

• Characters may not display if the contrast is set too low. Adjust potentiometer R17 to see if text appears.

FDL Download: The MIU size setting (256KB) is not large enough

• Change MIU settings. The size settings are available within FastChip by selecting Constraints ! I/O Editor.

• Click the MIU button and select the proper size settings for your target download memory.

• Click the Bind button to create a new CSoC design.

• Within FDL, Configure and Download the new design.

7-segment LEDs on evaluation board flicker but not being used

• Some of the 7-segment LED connections are shared with resources on the base board

• If the 7-segment LED is not being used in the application, remove either jumper JP5 or JP6 on the evaluation board.

GGeenneerraall Unable to create a precise UART baud rate using the 40.000 MHz oscillator

• If you are using the E5s dedicated UART, please visit the following web link. How Do I Set the Baud-Rate for the 8051s Dedicated UART? http://portal.knowledgebase.net/article.asp?article=9661&p=171

• If you are using a CSL-based UART, please visit the following web link. How Do I Set the Baud-Rate for the Full UART Soft IP Module? http://portal.knowledgebase.net/article.asp?article=9576&p=171

• Both web links have an associated Excel spreadsheet for calculating baud rates for any input frequency.

• The crystal oscillator component is socketed on the evaluation board. You can remove the 40.000 MHz component and replace it with the one of your choice.





TE520 Device Pin Connections to Board Resources Table 19 lists the connections for every pin on the TE520 device, including connections to the

• J1 and J2 connectors on the evaluation board, which are identical to the base boards J4 and J5 connector footprints

• J1, J2, and J3 expansion bus connectors on the base board

• J10, J11, J12, and J13 probe point stake pins on the base board

AUX: Auxiliary connector on the base board, (x) indicates connector pin number.

JTAG: TE520 JTAG connections. Signal name indicated. Used to download and debug a CSoC application.

LCD: LCD character display on the base board. Signal name indicated. Enabled by SW2.1=DOWN. Shares connections with left-most 7-segment LED display on evaluation board.

L7S: Left 7-segment LED display on the E5 Evaluation Board, segment name indicated. Enabled when evaluation board jumper JP5 is installed. Shares connections with LCD character display.

R7S: Right 7-segment LED display on the E5 Evaluation Board, segment name indicated. Enabled when evaluation board jumper JP6 is installed. Shares connections with 8-position DIP-switch SW1 on the base board.

PP: Parallel Port. Signal name indicated, (x) indicates connector pin number. Configuration switch SW6 on the evaluation board optionally connects parallel port signals to the TE520s JTAG pins or to user-defined PIO pins.

SRAM: SRAM on base board. Controlled by jumpers JP3 and JP4 on the base board.

Flash: Flash on both evaluation and base board. When using the evaluation board in stand-alone mode, install jumper JP4 on the evaluation board. When using the evaluation board mounted on the base board, remove jumper JP4 on the evaluation board, use base board jumpers JP3 and JP4 to control Flash as a download target.

PB: Pushbutton switches on the evaluation board.

SWx.y: Switch. The value of x identifies the specific switch. If the location is a switch block, the value of y indicates the specific switch within the block.

LED: LED bar display. LED segment number indiated. The left and right sides of the display are separately enabled. Switch SW2.7 controls the left side. Switch SW2.6 controls the right side.

SP: RS-232 serial ports on base board. Transmit (TXD) or receive (RXD) indicated, along with port number.

ED: RS-232 drivers on evaluation board. Transmit (TXD) or receive (RXD) indicated, along with port number. There are no associated connectors.

Note: The evaluation board connects to the base board via the J1 and J2 96-pin DIN connectors. Consequently, the J1 96-pin DIN connector footprint on the evaluation board is identical to the J4 connector on the base board. Similarly, the J2 connector is identical to the J5 connector on the base board.


Table 19. Complete TE520 Pin Connections List. E5 Eval. Base Board

96-pin DIN 96-pin DIN Probe Pins Pin Name Connections J1 J2 J1 J2 J3 J10 J11 J12 J13 Notes

1 GNDIO 2 XTALIN

3 BCLK/ XTAL AUX: (25) A17 41

4 TDI JTAG: TDI B16 5 TDO JTAG: TDO A16 6 TCK JTAG: TCK B15 7 TMS JTAG: TMS A15 8 PIO/A18 A12 A32 A32 A32 40 9 PIO/A19 C11 A12 A12 A12 39

10 GNDIO 11 PIO 12 PIO LCD: RW B14 A1 2 13 PIO/A20 B11 A20 A20 A20 42 14 14 14 PIO/A21 A11 C7 13 15 PIO 16 PIO 17 PIO 18 VCCIO 19 GNDIO 20 PIO/A22 C10 A8 16 21 PIO/A13 B10 B8 15 22 PIO 23 PIO 24 VCC 25 GND 26 PIO/A24 A10 B12 25 27 PIO/A25 C9 C12 28 28 GNDIO 29 PIO/A26 B9 A19 34 30 PIO/A27 A9 B19 33 31 PIO 32 PIO 33 PIO 34 PIO 35 PIO 36 PIO 37 VCCIO 38 GNDIO 39 PIO/A28 B8 C19 36 40 PIO/A29 A8 A20 35 41 PIO 42 PIO 43 PIO 44 PIO 45 GNDIO 46 PIO/A30 C7 B20 38

47 PMOD/ PIO/A31 B7 C18 C18 C18 10 4.7K pull-up

resistor



E5 Eval. Base Board 96-pin DIN 96-pin DIN Probe Pins

Pin Name Connections J1 J2 J1 J2 J3 J10 J11 J12 J13 Notes 48 PIO 49 PIO 50 PIO 51 PIO 52 VCCIO 53 GNDIO 54 PIO 55 PIO 56 PIO

57 PIO/ GBUF5

58 PIO AUX: AUX9, (19) A5 A9 19 59 GNDIO 60 PIO 61 PIO AUX: AUX11, (15) C5 B9 22 62 PIO

63 PIO/ GBUF4

SP: RXD1 PP: Select, (13) B6 B9 20

64 PIO AUX: AUX13, (11) C6 C9 21 65 PIO 66 PIO AUX: AUX15, (7) B7 A10 24 67 PIO 68 VCCIO 69 GNDIO 70 PIO AUX: AUX10, (17) B5 C10 23 71 PIO 72 VCC 73 GND 74 PIO

75 PIO/ GBUF3

76 PIO 77 PIO AUX: AUX12, (13) A6 B11 25 78 GNDIO

79 PIO/ GBUF2

SP: TXD2 PP: Paper End, (12) B10 B11 23

80 PIO 81 PIO AUX: AUX14, (9) A7 C11 28 82 PIO 83 PIO AUX: AUX16, (5) C7 A7 13

84 PIO/ GBUF1

SP: RXD2 PP: nAck, (10) B12 C8 18

85 PIO SW1.1 SW5.1 C12 A1 2

86 PIO SW1.2 SW5.2 A13 A1 2

87 VCCIO 88 GNDIO

89 PIO SW1.3 SW5.3 B13 A2 1

90 PIO SW1.4 SW5.4 C13 B2 4



Pin Name Connections J1 J2 J1 J2 J3 J10 J11 J12 J13 Notes SW191 PIO .5 SW5 A14 .5 A3 3

92 PIO SW1.6 SW5.6 B3 6

93 PIO C14 C32 C32 44 42

B14

C32 42 PIO/ SW194 GBUF0

.7 A15 A4 5 SW5.7 SW195 PIO .8 SW5.8 B15 B4 8

96 PIO GNDIO

98 PIO

97

ED99 PIO : TXD1 C16 A5 10 AUX: AUX1, (14) ED100 PIO : TXD2 AUX: AUX3, (18) A17 B5 9

101

EDAUX: AUX4, (20) PIO : RXD2 B17 C4 7

102 PIO LCD: RS C17 B6

103 PIO LCD: LCD_D4 L7S: e A18 C6

104 VCCIO 105

106 SW3.1 R7S: a B18 A15 32

107 LED: 6 PP: AutoLineFeed, (14)

C18 C5 12

108 SRAM: OE- C24 A2 1

109 LED: 5 PP A25 A7 11

110 SDIN D0

11

14

GNDIO

PIO

PIO

PIO

PIO : nStrobe, (1) D0/ C21 C25 C25 C25 14

111 D1/PIO D1 A22 A26 A26 A26 13 112 GNDIO

PIO LED: 7 PP: nInitialize, (16) 113 B25 C7 13

114 PIO A8 16

115 PIO EDAUX: AUX2, (16) A26 B8 15

116 PIO

117 PIO : TXD1 PP: Error, (15) C26 A9 17

118 PIO : WE- A27 B19 35 119 PIO 120 VCCIO 121 GNDIO 122 PIO : CE- C27 A2 1 123 PIO 124 PIO

125 PIO SW3.7 R7S: g SW8

A29 C9 19

126 PIO 127 PIO

128 PIO SW3.4 R7S: d A30 A10 22

C25 : RXD1

SP

SRAM

SRAM


http://www.triscend.com/products/an10.pdf



Pin Name Connections J1 J2 J2 J3 J10 J11 J12 J13 Notes 129 PIO 130 GNDIO 131 D2/PIO D2 B22 B26 B26 B26 16 132 D3/PIO D3 C22 C26 C26 C26 15 133 VCC 134 GND

135 PIO SW3.8 R7S: dp SW9

C30 C10 21

136 PIO 137 D4/PIO D4 A23 A28 A28 A28 18 138 D5/PIO D5 B23 B28 B28 B28 17 139 VCCIO 140 GNDIO 141 D6/PIO D6 C23 C28 C28 C28 20 142 D7/PIO D7 B24 A29 A29 A29 19 143 PIO

144 PIO SW3.6 R7S: f C31 A11 24

145 PIO 146 PIO

147 PIO PB2 SW7 C32 C11 26

148 PIO/ XDONE C32 C14 C14 C14 5

149 GNDIO

150 WE-/ SEN-

Flash: WE- (eval) Flash: WE- (base) SRAM: WE-

B19 C23 C23 C23 10

151 SLAVE- SLAVE- C19 B13 B13 B13 6 4.7K pull-up resistor

152 OE-/ SRST

Flash: OE- (eval) Flash: OE- (base) SRAM: OE-

B20 A24 A24 A24 11

153 CE- Flash: CE- (eval) Flash: CE- (base) SRAM: OE-

C20 A23 A23 A23 9

154 RST- Reset button (eval) Reset button (base) AUX: (1) Reset circuit (base)

A21 A18 A18 A18 8

155 VSYS VSYS B21 A13 A13 A13 3 4.7K pull-up resistor

156 VCCIO 157 GNDIO

158 A0/ SCLK A0 C29 C20 C20 C20 22

159 A1/PIO A1 B29 A21 A21 A21 21 160 A2/PIO A2 A29 B21 B21 B21 24 161 A3/PIO A3 B28 C21 C21 C21 23

162 PIO SW3.5 R7S: e B32 C31 39

163 GNDIO 164 A4/PIO A4 A28 A22 A22 A22 26 165 A5/PIO A5 C27 B22 B22 B22 25

J1



Pin Name Connections J1 J2 J2 J3 J10 J11 J12 J13 Notes 166 A6/PIO A6 B27 C22 C22 C22 28 167 A7/PIO A7 A27 B24 B24 B24 27

168 PIO PP: Busy, (11) JTAG: TDO A16 B20 38 *

169 PIO PP: Data 0, (2) A21 A20 35 *

170 PIO PP: Data 1, (3) JTAG: TMS A15 C19 36

171 PIO PP: Data 2, (4) JTAG: TCK B15 B19 33

172 VCCIO 173 GNDIO

174 PIO PP: Data 3 (5) JTAG: TDI B16 A19 34

175 PIO LED: 1 PP: Data 4, (6) B30 B14 29

176 VCC 177 GND 178 A8/PIO A8 C26 C24 C24 C24 30 179 A9/PIO A9 B26 A25 A25 A25 29

180 PIO LED: 2 PP: Data 5, (7) A30 A14 30

181 PIO LED: 3 PP: Data 6, (8) A23 C13 27

182 GNDIO 183 A10/PIO A10 A26 B25 B25 B25 32 184 A11/PIO A11 C26 B29 B29 B29 31

185 PIO LED: 4 PP: Data 7, (9) C22 C12 28

186 PIO PB1 SW6 B22 B13 31

187 A12/PIO A12 B26 C29 C29 C29 34 188 A13/PIO A13 A26 A30 A30 A30 33 189 PIO C22 A15 34

190 PIO LCD: LCD_D5 L7S: f C21 B15 33

191 VCCIO 192 GNDIO

193 PIO SW3.2 R7S: b B21 A15 32

194 PIO SW3.3 R7S: c A21 B15 31

195 PIO LCD: E B20 A19 36

196 PIO LED: 8 PP: nSelect, (17) A20 B12 25

197 A14/PIO A14 B24 B30 B30 B30 36 198 A15/PIO A15 A24 C30 C30 C30 35

199 PIO LCD: LCD_D6 L7S: g B19 B27 37

200 PIO LCD: LCD_D1 L7S: b A19 C27 40

201 GNDIO 202 A16/PIO A16 C23 A31 A31 A31 38 203 A17/PIO A17 B23 B31 B31 B31 37

204 PIO LCD: LCD_D3 L7S: d B18 B27 37

205 PIO LCD: LCD_D7 A18 C27 40

J1




Pin Name Connections J1 J2 J2 J3 J10 J11 J12 J13 Notes L7S: dp

206 PIO LCD: LCD_D0 L7S: a C17 B27 39

207 PIO LCD: LCD_D2 L7S: c B17 C27 42

208 VCCIO

J1


Base Board Expansion Bus Connections Table 20 provides a complete connection list for the J1, J2, and J3 expansion connectors on the base board. The signals are color coded according to function as shown below.

Legend

Analog power and ground

Unique to J1 only

Unique to J2 only

Unique to J3 only

E520 bussed pins

+5VDC

Digital GND

+3.3VDC

Other bussed pins Total Active Pins: 161

Table 20. Detailed Connection List for the J1, J2, and J3 Expansion Connectors on the Base Board.

J1 J2 J3 Pin Description TE520 Pin Description TE520 Pin Description TE520

A1 PIO 12 A1 PIO 85 A1 PIO 86 B1 XBUS0 NC B1 XBUS0 NC B1 XBUS0 NC C1 AGND C1 AGND C1 AGND A2 PIO 122 A2 PIO 108 A2 PIO 89 B2 PIO/GBUF5 57 B2 PIO 54 B2 PIO 90 C2 V+ C2 V+ C2 V+ A3 PIO 48 A3 PIO 41 A3 PIO 91 B3 PIO 50 B3 PIO 43 B3 PIO 92 C3 V- C3 V- C3 V- A4 PIO 11 A4 PIO 74 A4 PIO/GBUF0 94 B4 PIO 15 B4 PIO 16 PIO 95 C4 17 C4 PIO 22 C4 PIO 101 A5 PIO 23 A5 PIO 31 PIO 99 B5 B5 PIO B5 PIO 100 C5 PIO 34 C5 PIO 35 C5 PIO 107

A6 DGND A6 DGND B6 PIO 102 B6 XBUS1 NC B6 XBUS1 NC C6 PIO C6 XBUS2 NC C6 XBUS2 NC

PIO/AUX16 83 A7 PIO 80 A7 PIO B7 PIO 42 B7 PIO/A20 13 PIO/A20 13 C7 PIO 44 C7 PIO/A21 14 C7 PIO 113 A8 PIO 49 A8 PIO/A22 20 A8 PIO 114

PIO 51 B8 PIO/A23 21 B8 PIO 115 C8 PIO 55 C8 PIO 116 C8 PIO/GBUF1 84

PIO/AUX9 58 A9 PIO 60 PIO 117 B9 PIO/AUX11 B9 PIO 124 B9 PIO/GBUF4 63 C9 PIO/AUX13 C9 PIO PIO 125

A10 PIO/AUX15 67 A10 PIO 128 B10 B10 DGND DGND C10 PIO/AUX10 70 PIO 71 C10 PIO 135

B4PIO

A5PIO 32 33

A6 DGND

103 A7 109

B7

B8

A9 A961 64 65 C966 A10 PIO

DGND B10C10



J1 J2 J3 Pin Description TE520 Pin Description TE520 Pin Description TE520 A11 PIO/GBUF3 75 PIO 76 A11 PIO B11 PIO/AUX12 77 B11 PIO 146 B11 PIO/GBUF2 C11 PIO/AUX14 81 C11 PIO 82 C11 PIO 147 A12 9 A12 PIO/A19 9 A12 PIO/A19 9 B12 126 B12 PIO/A24 26 B12 PIO 196 C12 C12 PIO/A25 27 C12 PIO 185 A13 VSYS 155 A13 VSYS 155 A13 VSYS 155 B13 SLAVEB 151 B13 SLAVEB 151 B13 SLAVEB 151

PIO 56 C13 PIO C13 PIO 181 A14 PIO 62 A14 PIO 143 A14 PIO 180 B14 PIO 36 B14 PIO 145 B14 PIO 175 C14 DONE/PIO 148 C14 DONE/PIO 148 C14 DONE/PIO 148 A15 PIO 189 A15 PIO 193 A15 PIO 106 B15 PIO 190 B15 PIO 194 B15 PIO 186 C15 5V 5V 5V C15 5V A16 DGND A16 DGND A16 DGND B16 DGND B16 DGND B16 DGND

DGND C16 DGND C16 DGND A17 3.3V A17 3. 3.3V B17 3.3V B17 3.3V B17 3.3V C17 3.3V C17 3.3V C17 3.3V A18 RSTB 154 A18 RSTB 154 A18 RSTB 154 B18 MAN_RSTB B18 MAN_RSTB B18 MAN_RSTB C18 A31/PMOD 47 C18 A31/PMOD 47 C18 A31/PMOD 47 A19 PIO 195 A19 PIO/A26 A19 PIO 174

PIO 118 PIO/A27 30 B19 PIO 171 C19 119 C19 PIO/A28 39 PIO 170

PIO 123 A20 PIO/A29 40 A20 PIO 169 B20 PIO 127 B20 PIO/A30 46 B20 PIO C20 A0/SCLK C20 A0/SCLK 158 C20 A0/SCLK 158 A21 PIO/A1 159 A21 PIO/A1 159 A21 PIO/A1 159 B21 PIO/A2 160 B21 PIO/A2 160 B21 PIO/A2 160 C21 PIO/A3 161 C21 PIO/A3 161 C21 PIO/A3 161 A22 PIO/A4 164 PIO/A4 164 PIO/A4 164 B22 PIO/A5 165 165 B22 PIO/A5 165

PIO/A6 166 C22 PIO/A6 166 C22 PIO/A6 166 CEB 153 A23 CEB 153 CEB 153

B23 DGND C23 WEB 150 C23 WEB 150

A24 OEB 152 A24 OEB 152 A24 OEB 152 B24 PIO/A7 167 B24 PIO/A7 167 B24 PIO/A7 167

PIO/A8 178 C24 PIO/A8 C24 PIO/A8 178 A25 PIO/A9 179 A25 PIO/A9 179 PIO/A9 B25 PIO/A10 B25 PIO/A10 B25 PIO/A10 183 C25 D0/SDIN C25 D0/SDIN 110 C25 D0/SDIN 110 A26 PIO/D1 A26 PIO/D1 111 A26 PIO/D1 111

PIO/D2 131 B26 PIO/D2 131 B26 PIO/D2 131 PIO/D3 132 C26 PIO/D3 132 PIO/D3 132 DGND A27 DGND A27 DGND PIO 206 B27 PIO 204 PIO 199

C27 PIO 207 C27 PIO 205 PIO 200 A28 PIO/D4 A28 PIO/D4 137 A28 PIO/D4 137

A11 144 79

PIO/A19 PIO PIO 129

C13 136

C15

C163V A17

29 B19 B19

PIO C19A20

168 158

A22 A22B22 PIO/A5

C22A23 A23

B23 DGND B23 DGND C23 WEB 150

C24 178 A25 179

183 183 110 111

B26C26 C26A27B27 B27

C27137


J1 J2 J3 Pin Description TE520 Pin Description TE520 Pin Description TE520 B28 PIO/D5 138 B28 PIO/D5 138 B28 PIO/D5 138

PIO/D6 141 C28 141 C28 PIO/D6 141 A29 PIO/D7 A29 PIO/D7 142 A29 PIO/D7

PIO/A11 184 B29 PIO/A11 184 B29 PIO/A11 184 PIO/A12 187 C29 PIO/A12 187 C29 PIO/A12

A30 PIO/A13 188 A30 PIO/A13 188 A30 PIO/A13 188 PIO/A14 197 B30 PIO/A14 197

C30 PIO/A15 198 198 202

203 B31 PIO/A17 203 B31 PIO/A17 203 C31 PIO C31 PIO PIO 162 A32 PIO/A18 8 PIO/A18 8 A32 PIO/A18 B32 DGND DGND B32 DGND

PIO/UCLK 93 C32 PIO/UCLK 93 PIO/UCLK 93

C28 PIO/D6 142 142

B29C29 187

B30 PIO/A14 197 B30C30 PIO/A15 198 C30 PIO/A15

A31 PIO/A16 202 A31 PIO/A16 202 A31 PIO/A16 B31 PIO/A17

98 96 C31A32 8

B32C32 C32



E5 Evaluation Board Schematic

P118PIO

P11PIO

P84GBUF1

P138D5

P99PIO

P106PIO

P75GBUF3

P144PIO

VCC

P9A19

P125PIO

AUX3

P42PIO

P50PIO

P86PIO

P152OEB

GND

P84GBUF1

P94GBUF0

P62PIO

P198A15

P124PIO

P6TCK

P5TDO

P56PIO

P22PIO

P34PIO

P93PIO

P99PIO

P202A16

P117PIO

P5TDO

P189PIO

P66PIO

P113PIO

P82PIO

P207PIO

P12PIO

P79GBUF2

PV5N

P60PIO

P111D1

P67PIO

P32PIO

P125PIO

P129PIO

P190PIO

P77PIO

AUX4

P169PIO

P181PIO

P17PIO

P118PIO

P171PIO

P49PIO

P114PIO

P119PIO

P89PIO

P51PIO

P41PIO

V5N

P8A18

P158A0

REF3P3V

P79GBUF2

P100PIO

P141D6

P107PIO

P76PIO

P183A10

P7TMS

P145PIO

P43PIO

P51PIO

P106PIO

P153CEB

P199PIOP89PIO

P63GBUF4

P178A8

P107PIO

P125PIO

P62PIO

P23PIO

P94GBUF0

P194PIO

P166A6

P4TDI

P57GBUF5

P35PIO

P67PIO

P14A21

P15PIO

P103PIO

AUX1

P43PIO

P106PIO

P114PIO

P205PIO

P15PIO

P83PIO

P63GBUF4

P109PIO

P80PIO

P95PIO

P70PIO

P46A30

P4TDI

P135PIO

P126PIO

P100PIO

P81PIO

P187A12

P29A26

FV5N

8PIO

P160A2

P12PIO

P115PIO

P119PIO

P44PIO

P40A29

P122PIO

P90PIO

P200PIO

P93PIO

P131D2

P142D7

P101PIO

P77PIO

P146PIO

BCLK

P206PIO

P44PIO

P107PIO

P54PIO

P90PIO

P30A27

P64PIO

P162PIO

P126PIO

P185PIO

P31PIO

P36PIO

P95PIO

P168PIO

P148DONE

P99PIO

P70PIO

AUX1

P108PIO

P84GBUF1

P101PIO

P154RSTB

P83PIO

P61PIO

P96PIO

P204PIO

P154RSTB

P71PIO

P23PIO

P35PIO

P74PIO

P136PIO

P56PIO

P101PIOP79GBUF2

P7TMS

P60PIO

P184A11

P196PIO

P36PIO

P115PIO

P122PIO

P197A14

P16PIO

P116PIO

P91PIO

P27A25

AUX4

P63GBUF4

P132D3

P54PIO

P102PIO

P165A5

P3P3V

P80PIO

P147PIO

P47A31

P48PIO

P55PIO

P82PIO

P150WEB

P7TMS

P91PIO

P180PIO

BCLK

P100PIO

P31PIO

P32PIO

P123PIO

P96PIO

P179A9

P71PIO

P108PIO

P20A22

P109PIO

P21A23

P85PIO

P154RSTB

P64PIO

P155VSYS

P155VSYS

P188A13

P65PIO

P74PIO

P186PIO

TCRST

P127PIO

P143PIO

P41PIO

P102PIO

AUX2

P167A7

P39A28

TX1AUX2

P116PIO

P164A4

P117PIO

P175PIO

P17PIO

P92PIO

P195PIO

P13A20

P114PIO

P75GBUF3

P98PIO

P137D4

P159A1

P103PIO

P113PIO

P6TCK

P33PIO

RX1

P49PIO

P151SLVB

P85PIO

P92PIO

P61PIO

P57GBUF5

P5TDO

P193PIO

P123PIO P124PIO

P34PIO

P22PIO

P33PIO

P98PIO

P76PIO

P115PIO

P109PIO

P16PIO

P11PIO

P65PIO

P81PIO

P86PIO

TX2

P6TCK

P58PIO

P110D0

P55PIO

P66PIO

P48PIO

P174PIO

P128PIO

P50PIO

P203A17

P42PIO

P103PIO

AUX3

P170PIO

P161A3

P4TDI

P26A24

RX2

P113PIO

P117PIO

LEDRIGHT G

D51N4735A

A

RESET

ABC1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

MTG HOLES

J2

96 PIN VERTICAL DIN CONNHIROSE PCN10-96P-2.54DSA/H6096-ND

A1B1C1A2B2C2A3B3C3A4B4C4A5B5C5A6B6C6A7B7C7A8B8C8A9B9C9A10B10C10A11B11C11A12B12C12A13B13C13A14B14C14A15B15C15A16B16C16A17B17C17A18B18C18A19B19C19A20B20C20A21B21C21A22B22C22A23B23C23A24B24C24A25B25C25A26B26C26A27B27C27A28B28C28A29B29C29A30B30C30A31B31C31A32B32C32

97

98

A1B1C1A2B2C2A3B3C3A4B4C4A5B5C5A6B6C6A7B7C7A8B8C8A9B9C9

A10B10C10A11B11C11A12B12C12A13B13C13A14B14C14A15B15C15A16B16C16A17B17C17A18B18C18A19B19C19A20B20C20A21B21C21A22B22C22A23B23C23A24B24C24A25B25C25A26B26C26A27B27C27A28B28C28A29B29C29A30B30C30A31B31C31A32B32C32

HTOP

HBOT

TOP VIEW

VCC

R94.7K

TOP VIEW

D2

1N4148

31

2

3.3V

C80.1UF

C100.1UF

PP AF

VP

C2

10UF/10V

R4392 1%

VCC

JP3JPR1X2

D6

REDLED

C710UF/10V

SW1

PP ERR

VN

C110UF/10V

R5

33

OFF

SW2

C410UF/10V

R43

470

AUX5

PUT GROUND PLATEUNDERNEATH OSCILLATORSOCKET

C160.1UF

ON

P5

C170.1UF

C120.1UF

SW3

5V

AUX6

VCC

C140.1UF

PP INIT

VCC

SW4

AUX7

PP PE

D1

1N4001

VCC

5V

R3243 1%

SW5

AUX8

R10

PP SLCT

3/4A

C130.1UF

SW6

TE520S40SQFP208

4567

11121516172223313233343536414243444849505154

56

55575860

62

61636465666770

74

71757677

80

7981

83

82848586899091

93

9495

92

969899

100101102103106107108109113114115116117118119122123124125

154

155

126

PP STROBE

R11100

PP ACK

C150.1UF

R847K

TX1TTL

SW1SW_SLIDE_DPDT8

7

1

2

3 6

5

4

SW2

SW-MOM-SPST_NO

1

2

3

4

A

AA

B

BB

C180.1UF

PUT SHUNTS ONJP1 AND JP3

ABC1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

MTG HOLES

J1

96 PIN VERTICAL DIN CONNHIROSE PCN10-96P-2.54DSA/H6096-ND


97

98



HTOP

HBOT

F1

1 Amp FUSE

C190.1UF

LEDRIGHT LDP

TX2TTL

SW7

Ke1U5

RX1TTL

C90.1UF SW8

C30.1UF

U5

OSC

1

4 5

8NC

GND OUT

VCC

U4NJM317F3

1

2VIN

GN

D

VOUT

JP2PWR_JACK

3

2 1c

B A

RX2TTL

VCC

5V

JP1JPR1X2

LEDLEFT ELEDRIGHT A

C110.1UF

Put labels on componentside of board for bothconnectors


Triscend Corporation

Use the Adobe Acrobat " Zoom In Tool" to magnify specific sections. Click 'X' to minimize this window.

P166A6

P118PIO

P111D1

P204PIO

DO NOT LOAD

P199PIO

P194PIO

P84GBUF1

SERCEB

P99PIO

P106PIO

P186PIO

P158A0

VCCOSC

P189PIO

P125PIO

P181PIO

P110D0

P50PIO

P86PIO84GBUF1

P174PIO

P94GBUF0

CEFB

P162PIO

P171PIO

P188A13

LEDRIGHT D

P5TDO

P56PIO

P22PIO

P34PIO

P86PIO

LEDLEFT LDP

P117PIO

P5TDO

P3BCLK

P194PIO

P152OEB

P167A7

P203A17

P66PIO

P21A23

P12PIO

P184A11

P188A13

P60PIO

LEDRIGHT RDP

P162PIO

P128PIO

P30A27

LEDLEFT F

P178A8

P125PIO

P132D3

P94GBUF0

P185PIO

P77PIO

P197A14

P114PIO

P119PIO

P198A15

P110D0

P79GBUF2

P200PIO

LEDRIGHT B

P100PIO

LEDLEFT A

P107PIO

P153CEBP152OEB

P205PIO

P43PIO

P51PIO P179A9

P171PIO

P143PIO

P89PIO

P132

D3

P107PIO

P200PIO

P193PIO

P62PIO

P23PIO

LEDRIGHT C

P4TDI

P57GBUF5

P35PIO

P67PIO

P89PIO

P159A1

LEDLEFT B

P103PIOP180PIO

P203

A17

P106PIO

P20A22

P15PIO

P170PIO

63GBUF4

P109PIO

P207PIO

P184A11

P158A0

P164A4

P80PIO

P147PIO

P127PIO

P95PIO

P4TDI

7

PP BUSY

P47A31

P126PIO

LEDLEFT G

P193PIO

P81PIO

P187

A12

P181PIO

P115PIO

P165A5

P122PIO

P137D4

P199PIO

P150

WEB

P93PIO

PP DATA 0

P29A26

P101PIO

LEDLEFT C

P159A1

BCLK

P167A7

P44PIO

P95PIO

P54PIO

P90PIO

P138

D5

P136PIO

P31PIO

P36PIO

P90PIO

P99PIO

P70PIO

P202

A16

PP DATA 1

P204PIO LEDLEFT D

P14A21

P108PIO

P183A10

P152OEB

P165A5

P206PIO

P135PIO

P101PIO

P83PIO

P170PIO

P61PIO

P96PIO

P146PIO

P46A30

P144PIO

P175PIO

P148DONE

P74PIO

LEDLEFT RDP

79GBUF2

P7TMS

P190PIO

P180PIO

P147PIOP1

11D

1

P169PIO

P16PIO

P116PIO

P160A2

P141D6

P206PIO

P161A3

P63GBUF4

P9A19

P196PIO

P102PIO

P164A4

P27A25

P183A10

LEDRIGHT E

PP DATA 2

P48PIO

P55PIO

P82PIO

P7TMS

P91PIO

P131

D2

P100PIO

P150WEB

P32PIO

P123PIO

P71PIO

P91PIO

P158A0

PP SLCTIN

P109PIOPP DATA 3

P202A16

P13A20

P154RSTB

P64PIO

P155VSYS

P110D0

P169PIO

P145PIO

P135PIO

P40A29

P131D2

P154

RST

B

P207PIO

P168PIO

P151SLVB

P41PIO

P189PIO

P137

D4

P185PIO

P175PIO

CEFB

PP DATA 4

P190PIO

P128PIO

P117PIO

P187A12

P17PIO

P114PIO

P174PIO

P196PIO

P75GBUF3

P205PIO

P198

A15

P8A18

P98PIO

P103PIO

P113PIO

P6TCK

P161A3

P49PIO

PP DATA 5

P85PIO

P92PIO

P141

D6

LEDRIGHT F

P153CEB

P124PIO

P197A14

P142D7

P33PIO

P85PIO

P92PIO

P195PIO

P76PIO

P166A6

P160A2

P115PIO

P26A24

P11PIO

P65PIO

P6TCK

P179A9P178A8

PP DATA 6

P58PIO

P168PIO

P129PIO

P144PIO

P39A28

P138D5

P42PIO

P186PIO

P142D7

P113PIO

PP DATA 7

ZERO OHMRESISTORR12

VCC

PBUT2

R94.7K

USR SW

PBUT1

VCC

R120

1M or 2M

R7

4.7K

F

SW1

R5

33

C50.1UF

R64.7K

SW2

R104.7K

SW5

8 POS DIP SW

123456

8

161514131211109

GROUND PLATERNEATH OSCILLATORET

C170.1UF

SW3

U7

XC1701LPD8C

1234 5

678DATA

CLKRSTOEBCEB GND

CEOBVPPVCC

MOUNT FLASHPART U2ONLY

TIE EACH CAPACITOR TO THE GROUNDAND VCC PLANES DIRECTLY ... NODAISY CHAINS!

R20

VCC

SW4

REQUIRES E5XX PULLUPS

5V

THESE (12) 0.1UF CAPS GO CLOSE TO THE TE520 DEVICE VCC'S, 3 CAPS TOA SIDE

SW5

U2

29LV00XX-JC

56789

10111213

4 3 2 1 32 31 30

292827262524232221

14 15 16 17 18 19 20

A7A6A5A4A3A2A1A0IO0

A12

A15

A16

RE

SE

TBV

CC

WE

BA

17 A14A13A8A9

A11OEBA10CEBIO7IO

1IO

2G

ND

IO3

IO4

IO5

IO6

R10

DO NOT LOADSERIAL FLASH U7

VCC

SW6

U6

TE520S40SQFP208

1

23

4567

89

10

1112

1314

151617

2021

2223

24

25

2627

28

2930

313233343536

37

38

3940

414243

45

4647

44484950

52

53

5154

56

5557

59

5860

62

6163646566

68

69

6770

7273

74

717576

78

77

80

7981

83

828485

87

88

86899091

93

9495

92

97

969899

100101102103106107108

110111

109113114115116117118119122123124125

127128129

131132

135136

137138141142

143144145146147

148

150

151

152153

104

120

133

139

105

112

121

130

134

140

149

154

155

158159160161

162

164165166167

168169170171174175

178179

180181

183184

185186

187188

189190193194195196

197198

199200

202203

156

172

176

191

157

163

173

177

182

201

204205206

208

126

207

18

19 192

GN

D

XTA

LIN

XTA

LOU

T

TDITDOTCKTMS

A18/PIOA19/PIO

GN

D

PIO1PIO2

A20/PIOA21/PIO

PIO3/(NC)PIO4PIO5

A22/PIOA23/PIO

PIO6/(NC)PIO7/(NC)

CV

CC

CG

ND

A24/PIOA25/PIO

GN

D

A26/PIOA27/PIO

PIO8PIO9PIO10PIO11PIO12PIO13

VC

C

GN

D

A28/PIOA29/PIO

PIO14PIO15PIO16

GN

D

A30/PIOA31/PMOD

PIO17PIO18PIO19PIO20

VC

C

GN

D

PIO21PIO22

PIO106

PIO23PIO24

GN

D

PIO25/(NC)PIO26

PIO107

PIO27PIO28PIO29PIO30PIO31/(NC)

VC

C

GN

D

PIO32/(NC)PIO33/(NC)

CV

CC

CG

ND

PIO108

PIO34(NC)PIO35PIO36(NC)

GN

D

PIO37(NC)

PIO109

PIO38PIO39

PIO110

PIO40PIO41PIO42

VC

C

GN

D

PIO43PIO44PIO45PIO46/(NC)

PIO111

PIO48PIO49

PIO47/(NC)

GN

D

PIO50PIO51PIO52PIO53PIO54PIO55PIO56PIO57PIO58PIO59

D0/SDIN/PIOD1/PIO

PIO60PIO61PIO62PIO63PIO64PIO65/(NC)PIO66PIO67PIO68PIO69PIO70PIO71

PIO73PIO74PIO75

D2/PIOD3/PIO


D4/PIOD5/PIOD6/PIOD7/PIO


PIO80PIO81PIO82

XDONE/PIO

WE/SEN

SLAVE

OE/SRSTCE

VC

CV

CC

CV

CC

VC

C

GN

DG

ND

GN

DG

ND

CG

ND

GN

DG

ND

RST

VSYS

A0/SCLKA1/PIOA2/PIOA3/PIO

PIO83/(NC)

A4/PIOA5/PIOA6/PIOA7/PIO

PIO84PIO85

PIO86/(NC)PIO87/(NC)PIO88/(NC)PIO89/(NC)

A8/PIOA9/PIO

PIO90/(NC)PIO91(NC)

A10/PIOA11/PIO

PIO92PIO93

A12/PIOA13/PIO

PIO94PIO95PIO96PIO97


A14/PIOA15/PIO

PIO100PIO101

A16/PIOA17/PIO

VC

CV

CC

CV

CC

VC

C

GN

DG

ND

GN

D

CG

ND

GN

D

GN

D

PIO102PIO103PIO104

VC

C

PIO72

PIO105

VC

C

GN

D

GN

D

E

VCC

SW4

SW-MOM-SPST_NO

1

2

3

4

A

AA

B

BB

O

C180.1UF

C190.1UF

P

C200.1UF

PBUT1

SW7

JP4JPR1X2

R134.7K

Keep lead length less than1.5" and R5 very close toU5 pin 5

LOAD R1OR R2 BUTNOT BOTH

VCC

iPS-EVALE520dm 1.10

Evaluation E520 Module

C

1 2Saturday, September 29, 2001

Title

Size Document Number Rev

Date: Sheet of

PBUT2

SW8

C30.1UF

U5

OSC

1

4 5

8NC

GND OUT

VCC

VCC

Mount C3 veryclose to U5pin 8

C210.1UF

VCC

C60.1UF

E

REQUIRES E5XX PULLUPS

SW3

SW-MOM-SPST_NO

1

2

3

4

A

AA

B

BB



(Evaluation Board, Page 2)

PPINITN

PPDAT6

PP STRBP109PIO

P185PIO

PPDAT4

AUX2

PP SLCTIN

P100PIO

CTERM

3

SELPPHB

TX2D

PPACK

PPDAT2

PPRSTB

P189PIO

SELJTGB

CVN

P180PIO

HLRX1D

RX2D

P200PIO

AUX1

P204PIO

PPERR

PPDAT7

P99PIO

HLRX2D

SPPDAT1

PDAT2

P101PIO

PPDAT4

PBSYNPINIT

P103PIO

P206PIO

PPDAT2N

C1VN

RX1D

PPINIT

P175PIO

TX1D

P205PIO

PPDAT7

HLTX1D

PPDAT5

PPSLCT

HLTX2D

PPDAT0

AUX3

PPBSY

P196PIO

RX2DTTLAUX4P115PIO

PPSLCTN

P199PIO

PBSY

PPDAT5

RX1DTTL

TX1DTTL

C1P

P190PIO

TX2DTTL

PPAFPPSTRB

P113PIO

P181PIOPPPE

SELRS232

CVP

PPDAT3

PPDAT6

P207PIO

C2P

R3133

5V

5V

RS1A4701 21 2

5V

5V

U14F

74LS14

13 12

RS1B4703 41 2

U14B

74LS14

4

C230.1UF

5V

CFG SW

C2VN

R39

10K

U10

MAX202CSESO16NAR

12

3

4

56

8

7

9

1011

12 13

14

15

16C1+V+

C1-

C2+

C2-V-

R2IN

T2OUT

R2OUT

T2INT1IN

R1OUT R1IN

T1OUT

GND

VCC

V

U14C

74LS14

56

U14E

74LS14

11 10

RS2C4705 61 2

R18 0

RS1C4705 61 2

RS1D4707 81 2

C270.1UF

RS2E4709 101 2

5V

R364.7K

U14A

74LS14

1 2

7 SEG LEDIP14

LEFTMOS

RS232 SELPPH SELPPL SELJTAG SEL

C24

0.1UF

C220.1UF

R354.7K

C300.1UF

C25

0.1UF

RS2D4707 81 2

U16

SN74CBT3384APWR

123456789

101112 13

1415161718192021222324BEA

B0A0A1B1B2A2A3B3B4A4GND BEB

A5B5B6A6A7B7B8A8A9B9

VCC

C260.1UF

U15

SN74CBT3384APWR

123456789

101112 13

1415161718192021222324BEA



VCC

JTAG

R3810K

VCC

RS2B4703 41 2

R341.2K

SW6

4 POS DIP SW

1234

8765

Next Revision: Putswitch in todisconnect 14Pin JTAGconnector

PP INIT

J3

DB25M

13251224112310229218207196185174163152141

2627

U14D

74LS14

98

PP DATA 4

JP7

JTAG HDR 7X2

1 23 45 67 89 1011 1213 14

U13

SN74CBT3384APWR

123456789

101112 13

1415161718192021222324BEA



VCC

PP DATA 5

PLACE R31 VERY CLOSE TOU14 PIN 4

5V

R2810K

5V

R22 0

PP DATA 6

R24 0

RS2A4701 21 2

PP DATA 7

R20 0


P63GBUF4

P114PIO DP

P5TDO

P7TMS

P193PIO

P135PIO

PPRSTB

RMVCC

P170PIO

P168PIO

PPAF

PPPEP79GBUF2

P117PIO

P162PIO

SELPPLB

LME

P6TCK

P106PIO

LMC P194PIO

RMG

P169PIO

LMRDP

RMC

P174PIO

LMVCC

RMF

RMB

P84GBUF1

LMD

P107PIO

RMD

P144PIO

P4TDI

P125PIO

LMLDP

P128PIO

LMG

P154RSTB

P171PIO

LMF

PPACK

PPDAT2

PPERR

PPSLCT

PP DATA 2

R3310K

RS1A47021 2

LMB

RML

PP DATA 3

RMRDP

RS1B4703 41 2

RS4A4701 21 2

RS3B4703 41 2

PP PBSY

RS4E4709 101 2

R290

R4010K

PP ACK

Place Shunt on JP5

JP5JPR1X2

VCC

RS4B4703 41 2

LMA

R4110K

RS1E

470

910

12

PP PE

RS4C4705 61 2

RS2C4705 61 2

RME

RS1C4705 61 2

RS1D4707 81 2

PP SLCT

RS3C4705 61 2 Place Shunt on JP6

RS2E4709 101 2

D3

7 SEG LEDDIP14

1 2 3 4 5 6 7

14 910 8111213A F

CA

3N

C4

NC

5LD

P E

CA

14

RD

PC DGN

C12

B

LEFTMOST

PP AF

iPS-EVALE520dm 1.10

Evaluation E520 Module: MISC

C

1 2Saturday, September 29, 2001

Title


Date: Sheet of

5V

RS2D4707 81 2

U15

SN74CBT3384APWR

123456789

101112 13

1415161718192021222324BEA



VCC

JP6JPR1X2

R4210K

RMA

PP ERR

RS2B4703 41 2

RS3A4701 21 2

RIGHTMOSTRS3E

470

910

12

5V

JP7

JTAG HDR 7X2

1 23 45 67 89 1011 1213 14

U13

SN74CBT3384APWR

123456789

101112 13

1415161718192021222324BEA



VCC

C280.1UF

5V

PP DATA 0

C290.1UF

RS3D4707 81 2

D4

7 SEG LEDDIP14

1 2 3 4 5 6 7

14 910 8111213A F

CA

3N

C4

NC

5LD

P E

CA

14

RD

PC DGN

C12

B

RS2A4701 21 2

PP DATA 1

5V

RS4D4707 81 2



Base Board Schematic

TOP VIEW

VCC

5V

TOP VIEW

C5

22 pF

5V

VCC

DIN DIN

ABC1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

J2

HIROSE PCN13-96S-2.54DSA




E

Do not mount R10,C5

ABC1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

J1





Expansion Slots J1-J3

R10

2.2K

TOP VIEW

VCC

ABC1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

J3





P144PIO

P169PIO

P55PIO

P183A10

P150WEB

P46A30

P100PIO

XBUS1

SROEB

P63GBUF4

P186PIO

P126PIO

P179A9

V+

P125PIO

P181PIO

P21A23

P206PIO

P181PIO

P165A5

P51PIO

P83PIO

P180PIO

P183A10

P11PIO P95PIO

P71PIO

P203A17P96PIO

P190PIO

P83PIO

P77PIO

P70PIO

P154RSTBMANRSTB

P122PIO

P183A10

P143PIO

P184A11

P62PIO

P158A0

V+

P16PIO

P35PIO

P132D3

P198A15

P32PIO

P64PIO

P164A4

P152OEB

P141D6

P115PIO

P160A2

P137D4

P89PIO

P129PIO

P123PIO

P118PIO

P65PIO

P62PIO

P188A13

P154RSTB

P118PIO

P164A4

P206PIO

P203A17

P74PIO

P21A23

P32PIO

P29A26

P158A0

AGND

P26A24

P197A14

P142D7

XBUS0

P188A13

P85PIO

P80PIO

P146PIO

P40A29

P58PIO

P196PIO

P160A2

XBUS2

P135PIO

P179A9

P117PIO

V-

P33PIO

P65PIO

P194PIO

P89PIO

P128PIO

P150WEB

P113PIO

P196PIO

P162PIO

P116PIO

P129PIO

P119PIO

P183A10

P136PIO

P96PIO P8A18

P207PIO

P42PIO

P99PIO

P135PIO

P170PIO

P101PIO

P76PIO

P152OEB

P110D0

P153CEB

P98PIO

RSTB

P75GBUF3

P167A7

P8A18

P106PIO

P145PIO

P164A4

P80PIO

P166A6

P142D7

P138D5

P84GBUF1

P50PIO

P49PIO

P67PIO

P36PIO

P165A5

P159A1

P142D7

P202A16

P75GBUF3

P189PIO

P34PIO

P175PIO

XBUS0

P103PIO

P122PIO

P27A25

MANRSTB

P30A27

P57GBUF5

MANRSTB

P179A9

P54PIO

P188A13

P61PIO

P56PIO

P61PIO

P23PIO

P109PIO

P144PIO

P185PIO

PMOD

P119PIO

P153CEB

P138D5

P93PIO

P22PIO

P161A3

P111D1

P126PIO

P152OEB

P132D3

P11PIO

P90PIO

P161A3

P202A16

P43PIO

P20A22

P60PIO

P155VSYS

P152OEB

P110D0

P187A12

XBUS2

P76PIO

P39A28

P44PIO

P159A1

P93PIO

P108PIO

P99PIO

P146PIO

P184A11

P153CEB

P167A7

P31PIO

P124PIO

P193PIO

P92PIO

P84GBUF1

P77PIO

P111D1

P148DONE

P8A18

P93PIO

XBUS0

P200PIO

P13A20

P27A25

P205PIO

P109PIO

P147PIO

P47A31

P158A0

AGND

P117PIO

P187A12

SRWEB

P128PIO

P171PIO

XBUS1

P148DONE

P123PIO

P141D6

P101PIO

P166A6

P102PIO

P198A15

P175PIO

P90PIOP48PIO

P155VSYS

P41PIO

P148DONE

P47A31

P154RSTB

P150WEB

P17PIO

P64PIO

P39A28

P198A15

P124PIO

P13A20

P187A12

P44PIO

P9A19

P79GBUF2

P48PIO

P155VSYS

P127PIO

P164A4

P148DON

P160A2

P15PIO

P110D0

P178A8

P102PIO

P70PIO

P151SLVB

P168PIO

P91PIO

P12PIO

P178A8

P184A11

P12PIO

P151SLVB

P47A31

P49PIO

P167A7

P187A12

P58PIO

P100PIO

P82PIO

P111D1

P166A6

P137D4

P22PIO

P204PIO

P86PIO

P195PIO

P8A18

P81PIO

P31PIO

P193PIO

P178A8

P131D2

5V

P111D1

P198A15

P41PIO

P14A21

P26A24

P14A21

P93PIO

AGND

P203A17

P108PIO

P161A3

MAN_RSTB

P131D2

XBUS1

P71PIO

P30A27

P95PIO

XBUS2

P189PIO

P137D4

P115PIO

P180PIO

P160A2

P60PIO

P145PIO

P91PIO

P151SLVB

P153CEB

P197A14

P43PIO

P184A11

P107PIO

P79GBUF2

P199PIO

P106PIO

P204PIO

P113PIO

P195PIO

MANRSTB

P40A29

SRCEB

P200PIO

P63GBUF4

P138D5P137D4

P125PIO

P174PIOP170PIO

P17PIO

P147PIO

P151SLVB

P158A0 P168PIO

P103PIO

P165A5

P132D3

P188A13

P50PIO

P131D2

P15PIO

P199PIO

P51PIO

P92PIO

P66PIO

P81PIO

P178A8

P131D2

P108PIO

P57GBUF5

P42PIO

V-

P9A19

P205PIO

P159A1

XBUS0

P66PIO

P36PIO

P20A22

P179A9

P34PIO

P56PIO

P127PIO

P167A7

P142D7

P203A17

P55PIO

P155VSYS

P94GBUF0

P190PIO

P169PIO

V+

P107PIO

P9A19

P171PIO

P154RSTB

P165A5

P207PIO

P98PIO

P16PIO

P197A14

P202A16

P136PIO

P110D0

P197A14

P82PIO

P74PIO

P33PIO

P194PIO

P161A3

P174PIO

P54PIO

P13A20

P141D6P138D5

P114PIO

P132D3

P35PIO

P67PIO

P29A26

P94GBUF0

P186PIO

P118PIO

P47A31

P122PIO

P150WEB

P46A30

P202A16

P162PIO

P23PIO

P141D6

P116PIO

P143PIO

P86PIO

P114PIO

P185PIO

V-

P9A19

P85PIO

P159A1

P166A6




A5

LCD_D1

P144PIO

P169PIO

P98PIO

P100PIO

CEB

A2

AUX5

P35PIO

TDI

RX1

PB1

P63GBUF4

P186PIO

P84GBUF1

D7

AUX9

S1_5

LED_7

AUX3

AUX16

LCD_D5

S2_5

P181PIO

P9A19

AUX12

P143PIO

AUX6

S1_1

S2_1

LED_3

P106PIO

P190PIO

P169PIO

P81PIO

P21A23

P196PIO

TBTB

A19

P184A11

D1

P99PIO

P108PIO

P180PIO

P26A24

MANRSTB

P138D5

P116PIO

D4

P100PIO

P8A18

P33PIO

TMS

P146PIO

P4TDI

P49PIO

P44PIO

A18

P80PIO

P171PIO

A15

P128PIO

P183A10A12

P117PIO

P150WEB

AUX6

P36PIO

P89PIO

P60PIO

P179A9

P142D7

P147PIO

P187A12

P175PIO

P113PIO

P196PIO

P162PIO

P62PIO

P90PIO

P186PIO

P22PIO

BCLK

P118PIO

OEB

LCD_RW

P99PIO

P135PIO

P170PIO

TX1

RSTB

S1_6

P54PIO

P106PIOP11PIO

P166A6

A9

AUX15

LCD_D4

S1_4

S2_4

LED_6

P141D6

P16PIO

A6

LCD_D2

PB4S2_8

LED_2

P148DONE

P40A29

A3

P126PIO

P20A22

P15PIO

P64PIO

AUX7

D0

BCLK

V-

UCLK

P129PIO

P23PIO

AUX2

P193PIO

P27A25

AUX11

BCLK

AUX5

P159A1P127PIO

P205PIO

P125PIO

A0

AUX2

P151SLVB

P207PIO

D3

P115PIO

P92PIO

P84GBUF1

D6

P31PIO

AUX14

P200PIO

P66PIO

P102PIO

P170PIO

AUX8

P109PIO

P147PIO

TDO

P48PIO

A16

LCD_E

P128PIO

P171PIO

P101PIO

P161A3

P167A7

P55PIO

A13

P197A14

P30A27

TX2

LCD_D7

S1_8

UCLK

P175PIO

P90PIO

AUX8

P57GBUF5

P43PIO

E

S1_3

S2_3

LED_5

P63GBUF4

P164A4

LCD_D3

P82PIO

P79GBUF2

P39A28

P6TCK

P58PIO

P56PIO

P162PIO

2

PB3S2_7

LED_1

P124PIO

P5TDO

P95PIO

P181PIOP132D3

P194PIO

P119PIOP165A5

A10

P153CEB

A7

P71PIO

P198A15

WEB

A4

P206PIO

P92PIO

P103PIO

P131D2

P113PIO

RSTB

A1

P65PIO

P110D0

P135PIO

MAN_RSTB

P95PIO

AUX1

P83PIO

P101PIO

P195PIO

AUX1

P74PIO

P203A17

P32PIO

AUX10P115PIO

P180PIO

P14A21

P12PIO

AUX4P91PIO

P91PIO

P137D4

AUX13

P29A26

P160A2

P107PIO

P79GBUF2

P199PIO

P50PIO

P123PIO

P168PIO

P51PIO

LCD_RS

4P125PIO

P174PIO

P155VSYS

P34PIO

D2

P174PIO

RX2

LCD_D6

S1_7

S2_6

P168PIO

P93PIO

D5

P152OEB

P61PIO

P94GBUF0

AUX7

LCD_D0

S1_2

S2_2

LED_4

P114PIO

P185PIO

TCK

AUX3

P67PIO

V+

P204PIO

A17

P85PIO

P96PIO

PB2

A20

P70PIO

A14

P76PIO

P144PIO

P188A13

LED_8

A11

P136PIO

0

P111D1

P117PIO

P13A20

P41PIO

P46A30

P75GBUF3

P200PIO

P7TMS

P202A16

P154RSTB

P42PIO

P199PIO

P94GBUF0

P77PIO

P89PIO

P122PIO

P145PIO

P158A0

P17PIO

AUX4

P86PIO

P107PIO

P47A31

P178A8 A8

P86PIO

P114PIO

P185PIO

P109PIO

P189PIO

iPS-DevBrd2001-1.02 1.02

DevBrd2001 Expansion and Processor Connectors

C

1 7Tuesday, November 06, 2001

Title


Date: Sheet of

C1

0.1UF

5V

DO NOT MOUNT THIS RESISTOR

5V

R11 0

TOP VIEW

3.3V

Place next to J4-A17 (BCLK)

ABC1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

J4





PMOD

0.050 Minimum Trace WidthLines

C20.1UF

ABC1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

J5





Three Planes:1. VCC (3.3V)2. +53. GND

DIN

TOP VIEW

V+ANALOG VOLTAGES

VCC

V-

Processor Module Slots J4-J5

VCC



(Base Board, Page 2)

PBENB

LEDEN1B

LED4PU

RS

USW2ENB

USW1ENB

LCD_D6

LCDD4

LCDD2LCD_D0

PB2

RS232E1B

LED2PU

S1_7

S1_3

S2_3

LED5PU

TDI

LCDD5LCD_D2

PB3S2_7

LCDENB

LCDENB

LCDD6

TDO

ELCD_RS

S2_4

LCDD0

LED1PU

S2_1

TCK

PB4S2_8

PB1

S1_1

CONTRAST

S1_6

LCD_D5

S1_4

LCD_E

M

LED7PU

USW2ENB

PB4S2_8

LCDD7

S2_2

LCD_D7

RW

LCD_D1LCDD3

PBENB

USW1ENB

S2_6

LED8PU

PB3S2_7

RS232E2B

S1_8

S1_5

S1_2

TMS

LCD_D4

LEDEN2B

LED6PU

LCDD1

LCD_RW

S2_5

LCD_D3

LED3PU

USER MOMENTARYPUSH BUTTONS

R2010K

C120.1UF

SW6

PUSHBUT2

10

11

3

2

1A

1B

NO

NC

CW

5V

Peripheral Configuration

RS3

SP470BUS

1 2345678910

13478

11

131417182122

SW2

DIPSW SDA08H0K

12345678

161514131211109

U3

SN74CBT3384APWR

123

4 567

8 91011

12

1314 15

161718 19

202122 23

24

BEAB0A0

A1 B1B2A2

A3 B3B4A4

GN

D

BEBA5 B5

B6A6A7 B7

B8A8A9 B9

VC

C

5V

Seiko L168200J000 Mounted on two 1X16header strips

R2510K

VCC

Note that PB3 and PB4 resourcesare shared with user switchpositions 7 and 8. Cannot useboth simultaneously

R1910K

SW7

PUSHBUT2

10

11

3

2

1A

1B

NO

NC

VCC

RS1

SP10KBUS

123456789

10

SW9

PUSHBUT2

10

11

3

2

1A

1B

NO

NC

LED 8X

R7

4.7K

13478

11

131417182122

R16

1.2K

2X16 LCD

R2410K

SW8

PUSHBUT2

10

11

3

2

1A

1B

NO

NC

PB1

R1810KC17

0.1UF

U2SN74CBT3384APWR

123

4 567

8 91011

121314 15

161718 19

202122 23

24

BEAB0A0

A1 B1B2A2

A3 B3B4A4

GN

DBEBA5 B5

B6A6A7 B7

B8A8A9 B9

VC

C

5V

PB2

TOP VIEW

C130.1UF

LEDLEDLEDLED

LEDLEDLEDLED

LED1

LEDARRAY CHICAGO MIN 5

1234

5678 9

111

11111A

2A3A4A

5A6A7A8A 8C

7C6C5C

4C3C2C1C

PB3

PB4

LCD

U1SEIKO L168200J000

17 1218319420521622723891011121314

24252627282930

15311632

VSS VSSVCCVCCVLCVLC

RSRSR/WR/W

EEDB0DB0DB1DB2DB3DB4DB5DB6DB7

DB1DB2DB3DB4DB5DB6DB7

VAVAVCVC

R17

1K POT31

2


PU

USW2ENB

AUX4

LED_8

BCLK

SW1_4

PULED_3

S1_7

S1_3

AUX8

AUX13

AUX10

AUX16

S2_3

LED1B

LED7B

PU

TDI

AUX6

AUX1

SW1_5

PB3S2_7

LED_5

TDO

LED2B

S2_4

PU

S2_1

TCK

S1_1

AUX3

S1_6

S1_4SW1_6

AUX9

AUX14

AUX11

LED_7

MAN_RSTB

SW1_8

LED6BLED7PU

LED_2

LEDEN1B

LED4B

SW1_2

PB4S2_8

SW1_3

AUX5

S2_2

SW1_7

LED_1

LED_4

LED8B

USW1ENB

S2_6

LED8PU

LEDEN2B

S1_8

S1_5

S1_2

AUX12

AUX7

LED5B

AUX15

RSTB

TMS

SW1_1

AUX2

PU

LED_6

S2_5

LED3BPU

R2710K

USR SW2

R2310K

VCC

RS2SP10KBUS

12345678910

C220.1UF

C150.1UF

SHROUDEDSTRAIGHT HEADER

AUX HDR C100.1UF

U8SN74CBT3384APWR

123

4 567

8 91011

12

1314 15

161718 19

202122 23

24

BEAB0A0

A1 B1B2A2

A3 B3B4A4

GN

D

BEBA5 B5

B6A6A7 B7

B8A8A9 B9

VC

C

JP2

HEADER 7X2

1 23 45 67 89 1011 1213 14

U9SN74CBT3384APWR

12 3

456 7

8910 11

12

131415

16 171819

20 212223

24

BEAB0 A0

A1B1B2 A2

A3B3B4 A4

GN

D

BEBA5B5

B6 A6A7B7

B8 A8A9B9

VC

C

SHROUDED RTANGLE HEADER

C190.1UF

TX1

C180.1UF

C200.1UF

RX1

R2510K

VCC

R2610K

RS4SP10KBUS

12345678910

ourcescht use

TX2RX2

C110.1UF

VCC

JTAG HDR

V-

5V

R2210K

LED 8X

R2110K

U6SN74CBT3384APWR

123

4 567

8 91011

12

1314 15

161718 19

202122 23

24

BEAB0A0

A1 B1B2A2

A3 B3B4A4

GN

D

BEBA5 B5

B6A6A7 B7

B8A8A9 B9

VC

C

5V

R2410K

5V

5V

V+

C140.1UF

C210.1UF

LEDLEDLEDLED

LEDLEDLEDLED

LED1

LEDARRAY CHICAGO MIN 5638DI

1234

5678 9

101112

131415161A

2A3A4A

5A6A7A8A 8C

7C6C5C

4C3C2C1C

VCC

JP1

HEADER 13X2

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 26

iPS-DevBrd2001-1.01 1.01

DevBrd2001-1.00 Peripheral Logic

C


Title


Date: Sheet of

SW3

DIPSW SDA08H0K

12345678

161514131211109

C160.1UF

SW1

DIPSW SDA08H0K

12345678

161514131211109

USR SW1




A11

A17

A19

A6

A0

A17

A8A7

CEB

SROEB

WEBCEB

A3

A3

A18

A2

FOEB

A12

A18

A11

WEB

A13

FCEB

A15

A10

A1

A16

A16

OEB

SOE

A4

A9

A15

A10

A5

RSTB

A5

A14

SWE

OEB

SCE

A12

A6

SRCEB

A4

A20

A7

FWEB

SRWEB

A14

A0

A9

A2

A13

A8

A1

VCC

C3

22 pF

C

22

VCC

R2910K

R12

2.2K

U13SN74CBT3384APWR

123

4 567

8 91011

12

1314 15

161718 19

202122 23

24

BEAB0A0

A1 B1B2A2

A3 B3B4A4

GN

D

BEBA5 B5

B6A6A7 B7

B8A8A9 B9

VC

C

C

22

R9

2.2K

A

VCC

R4010K

U12SN74CBT3384APWR

123

4 567

8 91011

12

1314 15

161718 19

202122 23

24

BEAB0A0

A1 B1B2A2

A3 B3B4A4

GN

D

BEBA5 B5

B6A6A7 B7

B8A8A9 B9

VC

C

R4210K

5V

JP3JPR1X2

VCC

R3910K

R14

100

R2810K

C8

22 pF

Enable ISO SRAM

R15

2.2K

C250.1UF

R8

2.2K

R4110K

5V

R3010K

Enable Flash

CY7

C7

22 pF

Place all these devices close

C6

22 pF

R3110K

R13

2.2K

Flash and SRAM

R3810K

C260.1UF

JP4 JP3 Function--------------------------------------------------- X OFF DOWNLOAD TO SRAM, FLASH DISABLEDOFF ON DOWNLOAD TO FLASH, SRAM DISABLED X OFF DOWNLOAD TO SRAM, FLASH DISABLEDON ON ISO SRAM, DOWNLOAD TO FLASH

JP4JPR1X2

Do not mountR9,R13,R15,C4,C7,C9


A11

A17

A19

A6

A0

A17

D5

D1

A8

A20

A17

SRWEB

A14

A11 A11

A7

A8

A0

A5

D6

A16

D2

RSTB

A3

D4

D0

A3

A18

A2

FOEB

D6

A12

A18

SROEB

A11

A12

A13

A2

FCEB

A15

A10

A17

OEB

A1

D5

WEB

D1

A16

A13

D5

SROEB

A18

A16

D1

D0

A19

A16

SOEB

D7

A13

A4

D5

A10

A7

D0

A9

A15

A4

A10

A5

RSTB

D2

A5

D6

A1

D2

D6

A0

D1

CEBCEB

A14

D4

SRWEB

D4

SWEB

A4

SCEB

D3

A12

A6 A1

A4

D7

A20

A9

A7

FWEB

D0

A18

A15

A14

A12

A14

A7

A9

A0

D2

A6

A19

WEB

D7

A5

A8

RSTB

D7

D4

A9

A3

D3

SRCEB

A2

A13

A3

SRCEB

A10

D3

A2

A15

A6

D3

A20

A8

OEB

A1

VCC

C3

22 pF

C230.1UF

Do not mountR8,R12,R14,C3,C6,C8

C4

22 pF

R2910K

C240.1UF

C270.1UF

C9

22 pF

C280.1UF

U11AM29LV004B

1340

212019181716151487

36654321

2526272832333435

922241210

30 31

23 39

2911

3738

A18A17

A0A1A2A3A4A5A6A7A8A9A10A11A12A13A14A15A16

D0D1D2D3D4D5D6D7

WECEOERY/BSYRST

VC

C

VC

C

GN

D

GN

D

NC29NC11

A19A20

R4210K

VCC

R3910K

DevBrd2001-1.01 1.01

DevBrd2001 SRAM and FLASH

C


Title


Date: Sheet of

VCC

C8

22 pF

R410K

U14CY7C1049BV33

12345

6

78

910 28

27

1112

13

1415161718

1936

2021222324

25262930

31

32333435

A0A1A2A3A4

CE

IO0IO1

VC

C1

GN

D1

GN

D2

VC

C2

IO2IO3

WE

A5A6A7A8A9

NC19NC36

A10A11A12A13A14

IO4IO5IO6IO7

OE

A15A16A17A18

C7

22 pF

se devices close together

C6

22 pF

VCC

C9




MAN_RSTB

VIN_F

VMONRSTB

VIN

RSTB

YLED

RSTDB

RLED

3.0A

5V

EIAC

ON

REVERSE POL6.2V OVERVOLTAGE

R32470

LED2LEDYEL

SW4

SLDSW CK1101M2S3AQE2SLDSW

1 2 3

4 5

A B C

TABA TABB

RESET

5V PLAN

SW5

PBSW KT11P3CM

1

2

3

4

A

AA

B

BB

FH1

FUSE HOLDER

C350.1UF

POWER

R35470

OFF

R34470

D11N4735A

VCC

5V

C340.1UF

R3347K

U16

TI TPS3825-33DBVT

1

2

3

5

4

RSTB

GND

RST

VDD

MRB

5.5VDC MAX

U17SN74CBT3384APWR

123

4 567

8 91011

12

1314 15

161718 19

202122 23

24

BEAB0A0

A1 B1B2A2

A3 B3B4A4

GN

D

BEBA5 B5

B6A6A7 B7

B8A8A9 B9

VC

C

VCC

USE TE-5 4A FUSE: WICKMAN 3951400044ORDIGI-KEY WK4362BK-ND

C320.1UF

C3310UF/10V

J6

PJ-102A3

2 1

c

B A

LED3REDLED


TH4

MNT_HOLE

1 GHOLE

C4347UF/10V TANT

EIAC

TH1

MNT_HOLE

1 GHOLE

5V

EIAC

C3010UF/10V

TH9

MNT_HOLE

1 GHOLE

TH2

MNT_HOLE

1 GHOLE

Horizontal Heatsink

U15LT1585-3.3

32

1

4VINVOUT

VR

EF TAB

EIAC

QE2

TH5

MNT_HOLE

1 GHOLE

5V PLANE

P3CM

3

4

B

B

TH3

MNT_HOLE

1 GHOLE

TH6

MNT_HOLE

1 GHOLE

C3110UF/10V

2.5A 0-40 DEGREES C

C2910UF/10V

2.5A

VCC

EIAC

3.3V PLANE

C4247UF/10V TANT

C3310UF/10V

TH8

MNT_HOLE

1 GHOLE

TH7

MNT_HOLE

1 GHOLE




TX1RX1DTTL

DB92_146

RX2

CVP

C2P

RX1

RS232E2B

HLRX2D

DB91_146

C1P

HLTX2D

N

HLRX1DRS232E1B

DB91_78

TX2

TX1DTTL

RX2DTTL

TX2DTTL

CVNC2VN

HLTX1D

DB92_78

RS232

R3710K

U18

MAX202CSESO16 NARROW

12

3

4

56

8

7

9

1011

12 13

14

15

16C1+V+

C1-

C2+

C2-V-

R2IN

T2OUT

R2OUT

T2INT1IN

R1OUT R1IN

T1OUT

GND

VCC

C360.1UF

C370.1UF

5V

C1V

DTE WITHLOOPBACKHANDSHAKING

U19SN74CBT3384APWR

123

4 567

8 91011

12

1314 15

161718 19

202122 23

24

BEAB0A0

A1 B1B2A2

A3 B3B4A4

GN

D

BEBA5 B5

B6A6A7 B7

B8A8A9 B9

VC

C

P2

DSUB9M

594837261

1011

5V

C38

0.1UF

P1

DSUB9M

594837261

1011

C40

0.1UF

RS232

C390.1UF

DTE WITHLOOPBACKHANDSHAKING

C410.1UF

R3610K



P106PIO

P94GBUF0

P155VSYS

P57GBUF5

P136PIO

P91PIO

P132D3

P46A30

P51PIO

P93PIO

P111D1

P92PIO

P109PIO

P56PIO

P84GBUF1

P207PIO

P166A6

P26A24

P108PIO

P137D4

P129PIO

P48PIO

P101PIO

P55PIO

P75GBUF3

P189PIO

P96PIO

P125PIO

P127PIO

P58PIO

P144PIO

P187A12

P21A23

P199PIO

P83PIO

P148DONE

P31PIO

P159A1

P145PIO

P115PIO

P119PIO

P77PIO

MANRSTB

P206PIO

P99PIO

XBUS2

P150WEB

P188A13

P12PIO

P174PIO

P100PIO

P135PIO

P205PIO

P54PIOP41PIO

P9A19

P193PIO

P49PIO

P17PIO

P158A0

P153CEB

P39A28

P13A20

P76PIO

P35PIO

P185PIO

P11PIO

P186PIO

P138D5

P15PIO

P194PIO

P98PIO

P20A22

P80PIO

P86PIO

P23PIOP32PIO

P117PIO

P142D7

P154RSTB

P131D2

P61PIO P71PIO

P168PIO

P202A16

BCLK

P123PIO

P180PIO

P42PIO

P102PIO

P93PIO

P16PIO

P143PIO

P164A4

P152OEB

P128PIO

P82PIO

P183A10

P122PIO

P184A11

P181PIO

P44PIO

P63GBUF4P65PIO

P179A9

P30A27

P74PIO

P79GBUF2

P124PIO

XBUS0

P47A31

P8A18

P22PIO

P113PIO

P62PIO

P93PIO

P40A29

P162PIO

P50PIO

P89PIO

P13A20

P147PIO

P171PIO

P178A8

P64PIO

P141D6

P204PIO

P70PIO

P175PIO

P190PIO

P43PIO

P146PIO

P60PIO

P195PIO

P107PIO

P95PIO

P197A14

P196PIOP66PIO

P170PIO

XBUS1

P67PIO

P198A15

P33PIO

P14A21

P29A26P169PIO

P161A3

P151SLVB

P110D0

P167A7

P126PIO

P13A20

P116PIO

P203A17

P103PIOP34PIO

P160A2P165A5

P114PIO

P81PIO P27A25

P90PIO

P200PIO

P118PIO

P85PIO

P36PIO

J3 SIGNALS

SYSTEM SIGNALS

J12

HDR2X22

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 44

J11

HDR2X22

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 44

J10

HDR2X22

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 44

J13

HDR2X22

1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 44

J2 SIGNALSJ1 SIGNALS



Prototype Card Schematic

C32

B20

C23

A13

B18

B2

VDD2

VL

VDD1

C8

C4

C12

C22

C14

C24

A26

C31

B13

C27

A3

C29

A31

C13

B25

B28

A1

B3

B27

A5

A23

B6DGND

C5

A24

A29

DGND

C20

A25

DGND

B26

A32

B5

A30B30

B31

B19

C25

C6

DGND

C28

VH

DGND

B11

A4

C10

A7

B24

B29

A21

B9

A11

C26

C30

A2

C18

C7

C19

B21

B1

A9

B12

C11

A22

AGND

B7

DGND

C9

A15

A12

A28

DGND

A19

A20

A8

A10

C21

A18

B4

B8

B22

B15

A14B14

A B C1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

J2

DIN96RA




C0

TOP_VCC

TOP VIEW

ABC1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

31

32

J1

3X32HOLES




BOTTOMPLANE

J2 IS NEAREST THE BOARD EDGE

C1 holbyp




DGND

TOP_VCC

VDD1

VDD2

VL

VH

DGND

3V

AGND

TOP_VCC

5V

C80.1UF

JP1

2X1 HEADER

C60.1UF

C50.1UF

C120.1UF

+ C2

2.2UF 25V

C70.1UF

JP3

2X1 HEADER

+ C310UF/10V

JP2

HDR20X1

1234567891011121314151617181920

C100.1UF

PLANE

TOP_VCC

+ C12.2UF 25V

PLANE

THIS IS A TWO LAYER BOARD WITH DGNDAS THE BOTTOM PLANE. THE TOP_VCC PLANE IS DETERMINED BY WHICH JUMPER IS STRAPPED, VDD1 OR VDD2.

C110.1UF

TOP SEA OF HOLES PLANE( 0.1" spacing)

BOTTOM SEA OF HOLES PLANE ( 0.1" spacing)

+

C4 10UF/10V

Holes only.Conector is notprovided

C1 and C2 are placeholders for users ownbypassing capacitors

C90.1UF

JP4

2X1 HEADER



Revision History Revision Comment

1.00 11-NOV-2001 Initial release.

® Triscend Corporation

301 North Whisman Road Mountain View, CA 94043-3969 USA Tel: 1-650-968-8668 Fax: 1-650-934-9393 Web: www.triscend.com

Date


Documents

Triscend E5 Development Platform User Manual...Figure 3. Diagram of TE520 Pin Connections to 7-Segment Displays. Table 1 presents the same connection information, but in tabular form