Journal of the Korean Physical Society, Vol. 45, No. 3, September 2004, pp. 761∼764

Trans-Impedance Amplifier of Source Follower TopologyUsing an Active Device for Bandwidth Extension in

Optical Communication Systems

D. Y. Jung,∗ H. G. Ji, H. C. Kim and E. S. Nam

High Speed Soc Research Department, Basic Research Field,Electronics and Telecommunications Research Institute, Daejeon 305-350

C. S. Park

School of Engineering, Information and Communications University, Daejeon 305-714

(Received 28 November 2003)

This paper presents a trans-impedance amplifier (TIA) of a source follower topology for bandwidthextension. An analytical model for designing a TIA with a source follower stage has been derived.Based on this approach, we have designed two TIAs, which are a conventional common sourceTIA (CS-TIA) and a proposed source follower TIA (SF-TIA) for bandwidth extension. They wereimplemented for a 2.5-Gbps optical receiver using commercial 0.5 µm metal semiconductor field-effect transistor (MESFET) technologies. The trans-impedance gain (TIG) of the two fabricatedamplifiers is the same, at 59 dBΩ. The measured bandwidth of the CS-TIA is 2.35 GHz, and thatof the proposed SF-TIA is 4.05 GHz, enhanced by 1.7 GHz.

PACS numbers: 85Keywords: Trans-impedance amplifier, Source follower, Bandwidth extension

I. INTRODUCTION

For high-speed optical communication, receivers arerequired for very-large-capacity transmission systems.The first stage, which usually consists of a photo de-tector and a trans-impedance amplifier (TIA), is used toconvert the optical signals into electrical signals in thefront end of optical communication receivers. Therefore,a high-speed TIA is a key component in the design ofoptical communication receivers to amplify the weak in-put photocurrents into voltage signals. First of all, thewide bandwidth of a TIA is one of the most importantcharacteristics, and many research groups have studiedTIAs with a wide bandwidth for optical communicationreceivers [1–3].

Many designers take advantage of a high cut-off fre-quency (fT ) from the state-of-the-art InP hetero-junctionbipolar transistors (HBTs) or InP pseudo-random high-electron-mobility transistors (PHEMTs) to achieve awide bandwidth [4,5]. However, the InP-based technolo-gies are very expensive and not easy to access for low-costmanufacturing.

To increase the bandwidth of a trans-impedance am-plifier, techniques using only given devices have been an

∗E-mail: jdy75@icu.ac.kr

issue in research. A common source topology is normallyadopted for a wide-band TIA because its circuit configu-ration is simple and reveals a high trans-impedance gain(TIG) and a wide bandwidth. Many researchers haveachieved further improvement of bandwidth by imple-menting gain-peaking techniques for the common sourceTIA by using passive devices such as inductors or capac-itors [6–9].

One of the most frequently used methods is aninductive-peaking technique. This places inductors ina strategic location of the circuit, resulting in a reso-nance with parasitic capacitances [6, 7]. Although thisinductive-peaking technique extends TIA bandwidth,stray capacitances of an on-chip inductor often lead tobandwidth degradation, rather than an improvement [8,9]. The inductive-peaking technique also has limitationson high-frequency applications, because of the low self-resonant frequency (SRF) and Q-value of an availableinductor.

Another method to boost the bandwidth of a TIA isa capacitive-peaking technique. The bandwidth is in-creased by adding an extra pole in the transfer functionof a circuit. However, this method also has serious prob-lems, which are caused by parasitic pad capacitance andprocess variation [10].

We propose a new TIA circuit using a source followertopology to extend the bandwidth. Because the TIA

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Fig. 1. High-frequency model of a common source stage.

Fig. 2. (a) Source follower amplifier; (b) High-frequencyequivalent circuit for source follower output impedance.

does not use passive devices such as inductor or capaci-tor, it is important that the proposed method does notrely on the SRF or Q-value of an inductor and is notsensitive to parasitic components and process variation.

II. CIRCUIT DESIGN

Figure 1 shows the high-frequency model of a commonsource stage amplifier driven by a finite source resistance,Rs. All of the capacitances in the circuit are identified,it being noted that CGS and CDB are “grounded” ca-pacitances, while CGD appears between the input andoutput. Equation (1) describes the frequency magnitudeof an input pole, where gm is the transconductance of atransistor and RD is a drain load resistance;

ωin =1

Rs[CGS + (1 + gmRD)CGD](1)

From Equation (1), the source resistance Rs is in in-verse proportion to the frequency magnitude of the firstpole. To improve the frequency performance, the valueof Rs has to be decreased.

Figure 2(a) shows a source follower amplifier, whereCL represents the total shunt capacitance seen at theoutput node through the amplifier. The high-frequency

Fig. 3. Output impedance of the source follower stageusing a 0.5 µm MESFET.

Fig. 4. Conventional common source TIA circuit.

equivalent circuit of a source follower for calculating out-put impedance is shown in Figure 2(b).

Equation (2) represents the magnitude of the outputimpedance of a source follower amplifier. At low frequen-cies, Zout ≈ 1/gm and at very high frequencies, Zout ≈Rs.

Zout =sRsCGS + 1gmsCGS

(2)

In Figure 3 the 1/gm of the 0.5 µm MESFET used forthis design is 27.8 Ω, and this is smaller than the sourceresistance of a common source stage, Rs. By applying thevalues of equivalent circuit elements, we have obtainedthe value of the Zout as 29.3 Ω at 2.5 GHz, 31.1 Ω at5 GHz, and 37.5 Ω at 10 GHz. Therefore, in order toreduce the signal source resistance of an amplifier, weadopted a source follower stage prior to a common sourceamplifier.

Figure 4 illustrates a conventional common source TIA(CS-TIA) circuit which consists of two gain stages andtwo buffer stages with a negative feedback resistor, Rf . A

Trans-Impedance Amplifier of Source Follower Topology Using an Active Device for· · · – D. Y. Jung et al. -763-

Fig. 5. Proposed source follower TIA circuit.

schematic diagram of the proposed source follower TIA(SF-TIA) is shown in Figure 5. In order to obtain awideband characteristic, the output of the source followerstage is connected to the gate of the common source am-plifier.

The proposed bandwidth-enhancement method of aTIA has several advantages. Firstly, because this methoduses only active devices and resistors, the circuit isimmune to the SRF, Q-value, and parasitic effect ofon-chip components, unlike the inductive-peaking andcapacitive-peaking techniques. Secondly, the size of thechip using this method is smaller than that of the chipsusing passive devices such as inductor or capacitor. Also,it is very attractive in that this method can be used for10-Gbps or over-40-Gbps systems, because it does notuse passive devices with low SRF.

III. SIMULATION AND MEASUREMENTRESULTS

Figure 6 shows the simulation results of trans-impedance gain (TIG) and bandwidth for the conven-tional common source TIA (CS-TIA) and the proposed

Fig. 6. Simulation results of trans-impedance gain andbandwidth. (a) common source TIA; (b) source follower TIA

Fig. 7. The photographs of the two TIAs. (a) commonsource TIA (b) source follower TIA

Fig. 8. Measured trans-impedance gain and bandwidthof the fabricated chips: (a) common source TIA; (b) sourcefollower TIA.

source follower TIA (SF-TIA). The CS-TIA is describedas having a bandwidth of 2.45 GHz with TIG of 57 dBΩ.The bandwidth and TIG of the proposed SF-TIA areshown as 4.5 GHz and 57 dBΩ, respectively. This simu-lation result reveals that the bandwidth of the SF-TIA isincreased by 2.05 GHz, compared to the CS-TIA, with-out sacrificing low-frequency TIG. If the CS-TIA andSF-TIA with the same bandwidth are designed, we canobtain the SF-TIA with a much higher TIG.

Figure 7 depicts photographs of the fabricated TIAs,and the sizes of the CS-TIA and SF-TIA are 766 × 695µm2 and 918.5 × 777 µm2, respectively. Figure 8 showsthe measurement results for two fabricated TIAs. Theimplemented CS-TIA shows a TIG of 58.2 dBΩ with a3-dB bandwidth of 2.35 GHz. The TIG and 3-dB band-width of the proposed SF-TIA are 59 dBΩ and 4.05 GHz,

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Fig. 9. Measured output return loss: (a) common sourceTIA; (b) source follower TIA.

respectively. These show very similar behaviour to thesimulation results. The measured bandwidth of the SF-TIA is larger than that of the CS-TIA by 1.7 GHz. Fig-ure 9 shows the output reflection coefficients of the twofabricated TIAs. From the measurement results, the CS-TIA shows an output return loss of less than −7.4 dB,and that of the SF-TIA is lower than −9 dB within theavailable bandwidths.

IV. CONCLUSION

For bandwidth extension the new trans-impedanceamplifier of a source follower topology has been designedand fabricated by using 0.5-µm MESFET technologies.While a conventional common source TIA shows a 3-dB bandwidth of 2.35 GHz with a trans-impedance gainof 58.2 dBΩ, the proposed source follower TIA revealsa 4.05 GHz bandwidth with a 59 dBΩ gain. This re-sult shows bandwidth performance enhanced by 1.7 GHz.

Afterward, if the source follower TIA with a 2.35 GHzbandwidth is designed, it will have a much higher gainthan 58.2 dBΩ for a common source TIA. Also, it is veryattractive in that this method can be used for 10-Gbps orover-40-Gbps systems, because it uses only active devicesand resistors.

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