IEEE Transactions on Nuclear Science, Vol. NS-27, No. 6, December 1980

TOTAL DOSE FAILURE LEVELS OF SOME VLSICS*

E. E. KingNaval Research LaboratoryWashington, D.C. 20375

and

G. J. ManzoIBM

Federal Systems DivisionManassas, VA 22110

ABS TRACT

Two types of devices representative of very-large-scale-integration, 64k dynamic RAMs and 68000 micropro-cessors, have been studied in a total dose ionizingradiation environment. Both types of parts show an im-proved hardness compared to earlier test results forlarge-scale-integrated dynamic RAMs and microproces-sors. This indicates that the previously developeddownward trend of radiation hardness versus circuitcomplexity may not continue to prevail.

INTRODUCTION

Very-Large-Scale-Integrated (VLSI) devices arejust now in the early stages of production. Two suchdevices are the 64k Random-Access-Memory (RAM) and the68000 microprocessor. It was decided to study the totaldose ionizing radiation effects on these devices forthree reasons. First, of course, these two devices havevery great potential for use in digital applicationsand it is of interest to determine where they may bepresently applied in military and space systems.Second, these parts are examples of the most advancedtechnology in production today and it is of interest tocontinually assess the total dose radiation sensitivityof technology as it changes. Finally, it was felt thatthe results of such a study could have a significantimpact on VHSIC program direction since this DOD effortis required to address the total dose radiation envir-onment (10 krads requirement and 50 krads goal) andthere has been a concern that such a requirement wouldeliminate NMOS as a contender technology.

EXPERIMENT

The device types studied in this experiment werethe Motorola 64k dynamic RAM (XCM6664 and MCM6665), theHitachi 64k dynamic RAM1 (HM4864) and the Motorola68000 microprocessor. All devices were fully functionalnonscreened samples representative of commerciallyavailable products. The Hitachi part is fabricated witha two-level polysilicon gate HMOS process utilizing 3micron ground rules. An inversion layer storage cell isused. According to Hitachi, a polyimide die coating isused to minimize alpha particle upset. The MotorolaRAMs are constructed with a single polysilicon gateHMOS process.2 The difference between the MCM6665 andXCM6664 is reflected by pin #1. Pin #1 controls anautomatic refresh function on the 6664 whereas pin #1is internally connected on the 6665 and is meant to betreated as a no-connect. Motorola utilizes a groundedplate storage cell. Both vendors employ a polysiliconword line with folded metal bit lines. Cross-sectionalmeasurements on the Motorola RAM indicated 350-400 Agate oxide and capacitor thicknesses along with a 7000A field oxide thickness.

Motorola's 68000 process is very similar to theirdynamic RAM process, also utilizing a 3 micron single

* Work sponsored by the Defense Nuclear Agency (DNASubtask TD033).

polysilicon gate HMOS process. A gate dielectric oxidethickness of 500 A and field oxide thickness of between5300 and 7600 A were measured.

The test samples were irradiated at the NRL Co-60pool facility at approximate dose rates of either 100or 500 rads(Si)/minute while under bias and being exer-cised. Pre- and post-irradiation characterizationswere performed at the Federal Systems Division of IBMin Manassas, Virginia. Parts were kept at dry ice temp-erature during transportation from one location to an-other as a precautionary measure; however, there was noevidence of any annealing during the data collectionportion of the experiment which took place over a peri-od of 3 1/2 days. A non-exposed control sample for eachdevice type was used to insure consistent test equip-ment operation.

64k RAMs:

The evaluation of the dynamic RAM samples was per-formed on a Fairchild/Xincom 5582 Memory Test System.Measurements included power dissipation (active, stand-by, and refresh), input/output leakage currents for allpins, and 28 ac parameters as a function of supplyvoltage. In addition, a set of shmoo plots were obtain-ed indicating (1) access time (tRAC) as a function ofRAS to CAS delay for different values of VCC, (2) VIHversus VIL for the RAS clock input and (3), VIH versusVIL for the CAS clock input. Finally, plots of sink(IOL versus VOL) and source (IOH versus VoH) currentswere made and the on chip developed substrate voltagewas measured. Some devices were characterized at lowand high temperature, -550C and 1100C, before the ex-periment began and after the irradiations were com-pleted.

One of the important aspects of this experimentwas to be able to compare the 64k RAMs available fromthe several vendors (work is continuing to evaluateother vendor's products) so that the effects of differ-ent processing and circuit design on radiation sensi-tivity could be discerned. Since the data polarity ismixed in a complex way on chip, and differs from onedesign to another, it was decided to exercise the RAMsduring irradiation in such a manner that all would betreated equally as opposed, for example, to the case ofirradiating them in an all l's or an all 0's situation.Thus, all parts were continuously sequenced through thefollowing: write all 0's, read all locations, write alll's, read all locations. Errors were counted during theread cycles and displayed. Because of refresh consider-ations the row address was made the fast axis and 128row address sequencing was acheived in about 4.5 mS forthe write cycle and 5.5 mS for the read cycle.

68000 Microprocessor:

The Motorola MC68000 is a very sophisticated highperformance microprocessor that, although specified asa 16-bit device, internally is a 32-bit design. A highlevel test program was not available for this part;thus, the test data obtained were not nearly as compre-

0018-9499/80/1200-1449$00.75© 1980 IEEE1449

hensive as those obtained for the RAMs. The micropro-cessors were evaluated with a bench test system. Param-eters monitored were maximum operating frequency,power dissipation, chip developed substrate bias andoutput voltage levels.

These parts were exercised at 2 MHz during the ir-radiations using a program which was 125-16 bit wordslong. During this exercise program certain words wereoutput via the data bus and displayed using LEDs. Ob-serving these LEDs provided an indication of whetherthe 68000 was performing the program correctly. The de-vice could also be RESET during the irradiations.

RESULTS

The nominal failure levels as observed while inthe source are provided in Table I. Even though theselevels are intended to be conservative, they should notnecessarily be construed as guaranteeing performance,especially at the higher temperatures for which theparts are specified (700C) since there was no testdata taken at this temperature during the experiment.

Even though the parts nominally failed at thelevels given in the table, they appeared to fail onlybecause of retention time problems and not because ofany degradation of circuit performance. Even at a totaldose of 8 krads(Si) one Motorola RAM, device #3, couldbe completely characterized and exhibited only slightperformance changes; for example, access time did notvary more than 2 nS from its initial value of 131 nS asshown in Figure 1. Similarly, there were only verysmall changes in any of the dc parameters such as powersupply currents or output drive capabilities. A plot ofinput high and low levels as a function of dose, Figure2, implies only a 100-150 mV threshold voltage shiftfor the Motorola 6665, #3, at 8 krads(Si). Substratebias voltage also changes very little as a function ofdose and is shown in Figure 3.

The early failure of the Motorola 6665, #4, com-pared to the 6665, #3, showed up as a fixed error dis-play of 64 for reading 0's in the irradiation exercis-er. The error count displayed was stable until thehigher failure level given in parentheses was reached.Based upon a consideration of memory cell layout, anerror count of exactly 64 bits implies that either onesense amplifier or one dummy cell is causing the prob-lem. This problem did not show up in the routine func-tional testing on the Xincom tester and is thought tobe due to a combination of marginal retention time inthe memory cells and peripheral circuitry which was re-vealed by the exerciser because of its longer refreshand clocking periods.

The 68000 microprocessor is fabricated with muchthe same technology as the Motorola RAMs; therefore,one would expect similar radiation sensitivities. The68000 is a dynamic part and depends on retention timejust as do the 64k RAMs; although, for the microproces-sor the refresh is performed as part of the internalclocking and occurs approximately every 1.5,uAS. Fromthis standpoint one might expect the microprocessor tobe harder than the RAMs since refresh occurs more

often; however, there are some extremely critical tim-ing paths in the 68000 which make it difficult to com-

pare these parts to the RAMs or to determine why theyfailed. Considerably greater characterization detail isrequired than was available for the present experiment.

One of the parameters measured during the testingwas the output of the substrate bias generator. Thefact that there was essentially no change in this out-put as a function of total dose implies both thatthreshold voltages and leakage currents did not change

TABLE I

Device Type Failure Level-Rads(Si)

Hitachi HM4864-3 #1 1930

if to #2 2820

Motorola MCM6665L25 #3 6650

it to #4 2750(6590)*

Motorola XCM6664L20 #5 3490

Motorola XC68000L(R9M) #4 4540

#9 5500

* Early failure level corresponds to a fixed error of64 for reading 0's. This error was stable until thehigh failure level value.

to a great extent. The dc power supply currents forparts #4 and #9 did increase about 19% and 15% at dosesof 5500 and 4500 rads(Si) respectively. This increasewould not seem to be related to threshold shifts sinceno increase in operating speed was observed during theexperiment. The increase could be caused by an increasein leakage current.

DISCUSSION

As previously mentioned, failure of all the RAMswas directly ascribable to a decrease in dynamic noderetention time. There is some evidence to suggest thatpre-rad data retention time is of predictive value withregard to total dose failure level; that is, a longerdata retention time being indicative of a higher fail-ure level. Room temperature pre-irradiation data reten-tion time for the 6664 part was about 1.8 S. The 6665'shad data retention times of about 8 S. Not only is thisdifference reflected in the difference in failurelevels but the data retention time for the 6664 after5 krads(Si) was 6.5 mS whereas the retention time forthe 6665 #3 was 29 mS even at 8 krads(Si).

Such a correlation only holds for a given process,however. The Hitachi parts failed at lower levels thanthe Motorola parts even though higher data retentiontimes (27 S typical) were seen with Hitachi devices. At4 krads(Si), data retention time for the best Hitachipart was 0.078 mS. One of the differences between thetwo vendors is that the Hitachi and Motorola processesare double- and single-poly respectively. It is prob-able that the double-poly process utilizes more hightemperature processing time than does the single-polyprocess and this is known to decrease hardness via in-creased surface defects. It also is known that lifetimecan be improved by "cosmetic" techniques such as nitro-gen or hydrogen annealing but that the surface defectswhich are neutralized by such annealing do not general-ly maintain their neutralization upon exposure to ion-izing radiation. Such effects are discussed in some de-tail by Hughes and King.3 Although details of theHitachi process are not known, considerations such asthose just described very likely have a bearing in dis-cussing the differences in these parts.

CONCLUSIONS

The results presented here indicate that advancedhigh density NMOS circuits can exhibit an improvementin total dose radiation hardness. To some extent thisis probably due in the present case to the simple factthat these parts utilize thinner gate oxides, 350-500 Arather than 750-1000 A. For example, McGarrity4 has

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concluded that control of oxide thickness can be usedas a complete hardening approach for low level totaldose requirements. However, it should not be overlookedthat these VLSI devices, which require very high minor-ity carrier lifetime for operation, are probably fabri-cated using very high quality starting material. It isknown that this also can be a significani factor in re-ducing radiation induced surface damage.

The data indicate that retention time degradationis the primary failure mechanism for the devices stud-ied. The device failure levels associated with fullspec sheet performance, including temperature, probablywill be somewhat lower than the failure levels indicat-ed by the limited exerciser tests and given in Table I.For the samples tested, there were only small changesin the power supply current, ac performance, substratevoltage, and other parameters measured even at dosesbeyond the Table I failure levels. Consideration ofsuch data implies that the changes in the gate oxidethreshold voltages and field oxide inversion voltageswere tolerable to greater than 3000 rads(Si) for theHitachi double-poly process and to greater than 8000rads(Si) for the Motorola single-poly process. Thiscertainly suggests that NMOS is a viable candidatetechnology for the VHSIC program with respect to thetotal dose requirements, particularly after processhardening techniques are implemented and static circuitdesigns are emphasized.

ACKNOWLEDGEMENTS

The authors wish to thank Thomas Cowell for XincomTest System operation and data analysis. We also wishto acknowledge and thank the IBM-FSD Microprocessor De-vice Group for help in test definition, data collec-tion and consultation with regard to the 68000 micro-processor.

REFERENCES

1. "A Single 5V 64k Dynamic RAM," K. Itoh, et.al.,1980 Solid State Circuits Conference, p. 228

2. "Dynamic RAMS," J. G. Posa, Electronics, May 22,1980, p. 119

3. "The Influence of Silicon Surface Defects on MOSRadiation Sensitivity," H. L. Hughes and E. E.King, IEEE Trans. on Nuc. Sci., NS-23, No. 6,P. 1573, Dec. 1976

4. "Considerations for Hardening MOS Devices andCircuits for Low Radiation Doses," J.M. McGarrity,IEEE Trans. on Nuc. Sci., this issue

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