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Characterize and Quantify the Production Inspection Capability of the AXI of HiP (Head in Pillow) Defects Project
July 28, 2016
Project Leader:
Layannah Roberts, Intel Corporation
BACKGROUND
• HiP (Head in Pillow) solder joint defects have a greater risk of
occurrence with increasing BGA package size (modules/CPU
sockets), thicker boards (increased layers) and non-complimentary
warpage characteristics
• In addition, HIP defect Detection with in-line AXI (Automatic X-Ray
Inspection) equipment is a high risk FMEA (Failure Modes and
Effects Analysis) element where, algorithms used are not proven to
be robust enough leading to:
• High probability of false passes (algorithm based)
• High probability of false passes (operator over rides) –
Training/Shade of Gray scale resolution and defect determination
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BACKGROUND
• Current algorithms are based on simplistic models (supplied by X
ray equipment manufacturers) and are composed on differently
generated X ray images such as Transmissive, Laminography, and
Tomosysnthesis techniques. This leads to correlation
inconsistencies and subsequent low Agreement Analysis (kappa
value less than 0.7)
• Limited electrical coverage test (ICT/FCT) post AXI in process
Reliability concern if escaped to field (Enterprise Server Systems,
Other High Reliability applications)
• Lack of “golden” sample with various HiP defects for calibration
and correlation
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Purpose of Project
• To quantify HiP detection capabilities for AXI equipment used in
SMT manufacturing across the spectrum of x-ray technology set,
algorithm methods and vendor offerings
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IS / IS NOT Analysis
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Prospective Participants
• Prospective Participants
• Celestica
• Delphi
• Excelsys
• Flextronics
• IBM
• Lenovo
• MSI
• Universal Instruments
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Previous/current related work
• Previous/current related work – Paper Referenced
– The Challenge for HIP Detection in Manufacturing Process
Wilson Zhen1, Wayne Zhang1, Sven Peng1, PK Pu1, Larry Pymento2
1 IBM Shenzhen, China; 2 IBM Raleigh, USA [email protected]
James Li, Echo Zhang, FuBin Song, Kenny Wu Celesstica, DongGuan, China
ABSTRACT
In server system or related products, LGA socket, BGA are the
normal and widely used components. The HIP defects on these
components are not easy to be found during the process, since
the solder joint is invisible, also it will not typically fail at ICT
and function test, therefore, it’s very valuable to find the HIP
defects and make the necessary actions in the earlier stage.
In this paper, some experiments were designed for data
collection which challenged the AXI and operator’s limitation,
based on the real cases, a series of process procedures were
defined, from AXI’s detect ability, Operator’s identification,
high light procedure, engineering confirmation, to stop line/stop
shipment, corrective actions, also with the assistance of some
useful new developed AXI applications, the HIP defects would
be found at the very beginning without difficulty.
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Scope of Work
• Identification of existing HiP from group members
• This project shall leverage existing samples and test vehicles
containing HiP defects from its members
• Using existing samples will accelerate time to data and allow this
project to begin its analysis activities quickly. Timely collection of
data is imperative to the success of this project
• Identification of existing HiP from group members
• This project shall leverage existing samples and test vehicles
containing HiP defects from its members
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Scope of Work
• Using existing samples will accelerate time to data and allow this
project to begin its analysis activities quickly. Timely collection of
data is imperative to the success of this project
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Scope of Work
• Define Analysis Criteria
– Define the criteria for HiP detection analysis. Including but not limited to:
– HiP Defect Detection Rate: Number of defects caught/ Number of defects
present.
– Over/Under reject rate
– Survey of algorithms used for HiP detection
– Survey of CTF parameters measured by AXI tool, i.e., BGA ball diameter,
grayscale value, BGA ball slice offset, number of slices used
– Survey of technology used, i.e., tomosynthesis, laminography, CT
– Test time and complexity of setup/inspection.
– Operator over/under reject rate.
– HiP defect verification including but not limited to: 3D CT-scan and
package pull
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Scope of Work
• Identify member teams to provide analysis on diverse set of AXI
equipment
• Leverage toolsets and expertise provided by members in this
project group to perform analysis of HiP defect detection
capabilities
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Scope of Work
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Q1 Q2 Q3 Q4 Q5 Task
1.1 Engagement agreements with AXI
1.2 Identification of samples from group members
1.3 Decide on HiP defect detection capability analysis
1.4 Identify teams to perform HiP detection capability study.
1.5 Defect detection capability analysis at member sites.
1.6 Data Review/White Paper Development/ Project Outputs
Outcome of Project
• Project White Paper – outlining
–Defect detection capability analysis for various AXI
technology sets
• Conclusions and recommendations:
– Membership “End of Project“ Webinar
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Project Status
1
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Project Status
• iNEMI’s Technical Committee approved in December 2015 SOW,
which led to the project sign-up period ending January 27, 2016
• Interim to this period we received both internal (iNEMI) and external
comments on the structure of the project
• These comments addressed project work as outlined within the
original SOW work that has been already completed within the
industry and results well known
• The project has been changed from a development to a Test Vehicle
to test HiP to one, where the project’s goal is to now will leverage
existing samples and test vehicles containing HiP defects from its
members
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Project Members To date
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Project Restart
To restart the efforts of this official iNEMI project . . .
Call for Participation” (open to the industry)
• Session 1: Thursday, July 28 at 11:00 am EDT.
• Session 2: Thursday, July 28 at 9:00 pm EDT.
Next, Open Project meeting scheduled:
• Thursday, August 4 at 9:00 pm EDT.
Contacts:
• Layannah Roberts, Intel Corporation,
• David Godlewski, iNEMI, [email protected]
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