The University of Texas at Arlington

Lecture 6 Arithmetic, Logic Instructions, and Programs

CSE 3442/5442 CSE 3442/5442 Embedded Systems I

Based heavily on slides by Dr. Roger Walker

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Signed Numbers •  Positive numbers +127 to -128 •  Overflows – indicated by flag in Status

Register (See examples pp 169-170) –  If result of an operation on signed numbers too

large for the register (not the same as carry; carry is the ninth bit, OV is kind of like the eighth bit.

–  More precisely OV is set if there is carry from D6 to D7 but none from D7 (positive); or if there is carry from D7 but none from D6 to D7 (negative)

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Adding

•  Unsigned: ADDLW k – add contents of WREG and literal k

•  8 bit: ADDWF fileReg d – add contents of working register to fileReg result in fileReg or WREG

•  16 bit: ADDWFC same as first instruction but adds previous carry bit to result (multibyte instructions)

3C E7 + 3B 8D (carry will be 1) -------------- = 78 74

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ADDWFC

; Loc 6 = (8D) ; Loc 7 = (3B) MOVLW 0xE7 ;Load WREG with E7H ADDWF 0x6,F ;F = W + F C=1 MOVLW 0x3C ; WREG ß 3CH ADDWFC 0x7,F ; F = W + F + carry

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BCD and DAW Instruction

•  Unpacked BCD – lower bits number in BCD upper 4 bits zero

•  Packed BCD – both lower 4 and upper 4 bits BCD number

•  DAW, decimal adjust MOVLW 0X47 ADDLW 0X25 DAW ; ADJUST FOR BCD (WREG = 72H)

•  (if lower nibble>9 or DC=1 then add 0110 to low nibble; if upper nibble is greater than 9 or if C-1, add 0100 to upper nibble; algorithm to convert: use the unsigned number, invert each bit, add 1 to result)

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Subtraction

•  Like ADD, there is SUB and SUBB (with borrow)

•  Indeed SUB only coverts second argument (WREG) into 2’s complement and adds it to file register – 2’s complement recap: MSB is 1;

0b11111111 is -1, 0b10000000 is -128. Thus adding +1 and -1 indeed results in zero (unlike if -1 was 0b10000001)

– NEG fileREG does 2’s complement inversion

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Multiplication of unsigned bytes

•  Bytes only operation •  Unsigned only operation •  One byte must be in WREG and second -

Literal •  MULLW K ; Byte x Byte: WREG x K

– PRODH = high byte, (SFR) – PRODL = low byte (SFR)

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Division of Unsigned Numbers

•  No single instruction for division of byte/byte numbers in PIC18.

•  Must use repeated subtraction – see Example 5-8 pp164

•  This is like our “human algorithm” to divide numbers. (We subtract the denominator from the numerator as many times as we can.)

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Logic Instructions

•  ANDLW K •  IORLW K •  XORLW K (exclusive of two operands) •  COMF fileReg (complement fileReg) (1’s

Complement, or simple bitwise negation) •  NEG fileReg (negate fileReg) (2’s

Complement)

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Compare Instructions

•  We have seen similar “skip-next” instructions before •  CPFSGT fileReg ;Skip if fileREG > WREG •  CPFSEQ fileReg ;Skip if fileREG = WREG •  CPFSLT fileReg ;Skip if fileREG < WREG

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Rotate and Swap Nibbles

•  RRNCF(RLNCF) fileReg,d ; rotate right/left

•  RRCF(RLCF) fileReg,d ; rotate right/left through carry

•  SWAPF fileReg,d ; swaps upper and lower nibbles (4bits)

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Data Serialization Example Counter EQU 0x20 ; counter variable Myreg EQU 0x21 ; variable for serialization buffer BCF TRISB, 1 ; RB1 is output MOVLW 0x41 ; we will serialize this value MOVWF Myreg ; load value into myreg BCF STATUS,C ; clear carry MOVLW 0x08 ; counter MOVWF Counter ; load the counter BSF PORTB, 1 ; initialize serialization bit

AGAIN RRCF Myreg, F ; rotate right with carry BNC OVER BSF PORTB, 1 BRA NEXT

OVER BCF PORTB, 1 NEXT DECF Counter, F

BNZ AGAIN BSF PORTB, 1

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“Embedded Design with the PIC18F452 Microcontroller Prentice Hall, 2003” Peatman