IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 45, NO. 9, SEPTEMBER 1998 1953

The Detailed Analysis of High CMOS-CompatibleMicrowave Spiral Inductors in Silicon Technology

Min Park, Member, IEEE, Seonghearn Lee,Member, IEEE, Cheon Soo Kim,Member, IEEE,Hyun Kyu Yu, Member, IEEE, and Kee Soo Nam,Member, IEEE

Abstract—We present the extensive experimental results andtheir detailed analysis showing the important effects of layoutparameters on the frequency responses of quality factor(Q) ofrectangular spiral inductors, which are fabricated on a siliconsubstrate by using conventional silicon CMOS technology, inorder to determine the desirable values of layout parameters fordesigning the highQ inductors used in RF IC’s applications.Analysis of the inductors on Si substrates with three kinds ofresistivities has been performed by tailoring the geometric layoutand varying the metal thickness. Using these results, the substrateeffects on RF performance of inductors are also investigated byobserving the frequency responses ofQ with varying the substrateresistivity in detail.

Index Terms—CMOS, inductor, MMIC’s, silicon materials/devices.

I. INTRODUCTION

RECENTLY, silicon RF integrated circuits has emergedas a fascinating candidate to satisfy the strong demands

of low-cost, high integration, and mature technologies in therapidly growing markets for wireless communication products[1], [2]. For the fabrication of inductors on silicon substrate,it is difficult to obtain high quality factor due to highersubstrate losses than GaAs materials [3]. In order to overcomethis difficulty, various kinds of approaches have been tried. Afew results with high peak have been recently reported. A2.88-nH inductor with a measured peakof 12.1 at 3.3 GHzhas been fabricated in a Si bipolar process using thick goldand high resistivity Si wafer (150–200 cm) [4]. A 1.95-nHinductor with a peak of 9.3 at 4 GHz fabricated using themultilevel interconnection metals in BiCMOS technology hasbeen reported [5]. However, it is very difficult and expensive toapply these complicated technologies. To solve this problem,we have previously demonstrated the experimental possibili-ties to obtain high only by increasing the resistivity of theSi substrate, without any modifications from the conventionalCMOS technology [6] and we briefly reported these geometricdependences of the and at the frequency of 2 GHz in [7].However, no data of have not been presented and the effects

Manuscript received October 23, 1997; revised March 11, 1998. The reviewof this paper was arranged by Editor K. Shenai. This work was supported bythe Ministry of Information and Communications of Korea.

M. Park, C. S. Kim, H. K. Yu, and K. S. Nam are with the Micro-ElectronicsTechnology Laboratory, Electronics and Telecommunications Research Insti-tute (ETRI), Taejon 305-350, Korea.

S. Lee is with the Department of Electronic Engineering, Hankuk Universityof Foreign Studies, Kyungki-do 449-791, Korea.

Publisher Item Identifier S 0018-9383(98)06420-X.

of geometric parameters on at the other frequencies havenot been analyzed yet.

In this paper, further details of the geometric dependencesare extensively analyzed by plotting the frequency responsesof the over the wide frequency range of interest up to 8GHz and geometric data of at 2 GHz are also included. Fordesigning desirable inductor structure layout for hightheseresults will be valuable design guide for RF IC’s applicationsat various operating frequencies. For this work, rectangularspiral inductors with various geometric layouts were builtusing the conventional CMOS process on Si substrates withseveral kinds of resistivities in order to find the desired layoutparameters and investigate the substrate effect on the

II. I NDUCTOR FABRICATION PROCESS

A conventional CMOS technology with the double-metal ofTiW/Al-1%Si/TiW interconnects was used to fabricate variousstructures for rectangular spiral inductors. The cross sectionalview involving metal interconnects and top layout view ofrectangular spiral inductor are shown in Fig. 1. Fig. 1(c) alsoshows the micro photo image of the fabricated rectangularspiral inductor with the number of 10. The represents theinner diameter of inductor. In this work, geometric dimensionsvary with 8–30 m width and 2–10 m spacing. The innerdiameter and number of turns of inductor were variable with20–220 m and two to 12 turns, respectively. The metal coillayer for inductors was formed by the second metal layerwith the total thickness of 1.1 m consisting of TiW (75nm)/Al-1%Si (800 nm)/TiW (220 nm) [8]. Thus, the actualthickness of Al used for CMOS process is much smallerthan that for [4] and [5], resulting in higher resistance. Theisolating oxide thickness between the first metal and the siliconsubstrate was about 1.2m as the same thickness of theconventional CMOS process. Intermetal dielectrics betweenmetal layers were deposited with a thickness of 800 nm. Thesubstrate was grounded to make the same bias condition ofinductors operating in CMOS RF IC’s. To find the influence ofsubstrate resistivity on the inductor microwave performance,we use three kinds of 625-m-thick silicon wafers with thelow resistivity of 4–6 cm, medium resistivity of 30–50

cm, and high resistivity of 2 k cm, respectively. To observethe reduction of high metal resistance of our process, theextra inductors with TiW/Al1%Si multilayer metal of 2mthickness were also fabricated by repeating the second metalprocess twice.

0018–9383/98$10.00 1998 IEEE

1954 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 45, NO. 9, SEPTEMBER 1998

(a)

(b)

(c)

Fig. 1. Cross-sectional view, top layout view of the rectangular spiralinductor and micro photo image of the fabricated rectangular spiral inductor.The � represents the inner diameter of the inductor.

III. RESULTS AND DISCUSSION

A. Geometric Dependence of Quality Factor

1) Number of Turns:Two-port -parameters were mea-sured on the fabricated inductors using an HP 8510Bnetwork analyzer and Cascade Microtech RF probes. Themeasurements were taken for each inductor over the frequency

Fig. 2. The quality factor(Q) as a function of frequency for rectangularspiral inductors fabricated on 2 K�cm (open symbol) and 4–6�cm (filledsymbol) Si substrate with various kinds of the number of turns.

range of 500 MHz–20 GHz. The “open” pad patterns withoutany inductor metal lines in Fig. 1(c) were also measured andused to remove the pad parasitics from measured-parameters[9]. This pad de-embedding was accurately performed bysubtracting -parameters of “open” pad pattern from those ofthe inductors, after the measured-parameters are converted to

-parameters. The measuredof the inductor was determinedas the ratio of the imaginary part to the real part of the one-port input impedance transformed from the measured two-port

-parameters. The measured two-port inductor parametersare determined uniquely from the -parameters convertedfrom the measured -parameters: and

Imag [10].Fig. 2 shows the as a function of frequency for inductors

with varying numbers of turns of inductors fabricatedon 2 K cm and 4–6 cm Si substrate. In this figure,

increases with the frequency up to the peak value, anddrops at higher frequencies. This is easily understood by thefact that the reactance of input impedance dominated by theinductance at lower frequency rolls off at higher frequencydue to the parasitic capacitances that consist of the overlapcapacitance between the spiral and underpass, fringing capac-itance between adjacent metal lines, and substrate capacitancebetween metal layer and grounded substrate. For high substrateresistivity, the frequency at the maximum value ofdecreases with the increase of At first, the at 2 GHzincreases with the rise of but the rolls off above eightturns due to the decrease of and attributedto the increase of the parasitic capacitances. The frequencyresponse of the for inductors fabricated on 4–6 cm Sisubstrate is also plotted in Fig. 2. As the same results asthe high substrate resistivity, the value of decreaseswith increasing However, the values of in these figuresare smaller than those of inductors fabricated on 2 Kcm

PARK et al.: MICROWAVE SPIRAL INDUCTORS IN SILICON TECHNOLOGY 1955

Fig. 3. The maximum quality factor(Qmax) and the frequency at thisQ (fQmax) as a function of the number of turns for inductors with variouskinds of the substrate resistivity.

resistivity substrate. As previously reported in our paper [6],the peak value of increases at higher substrate resistivity.This effect indicates the reduction of substrate conductinglosses, which is explained by the rise of substrate resistancevalue with increasing the resistivity of Si substrate [6].

Fig. 3 shows the maximum quality factor ( ) and thefrequency at this with three kinds of the substrateresistivity as a function of In Fig. 3, the increasesat higher substrate resistivity, because of the reduction ofsubstrate conducting loss. However, the increase of be-comes smaller than that of the with increasing substrateresistivity for larger than six turns. The value of isknown to be dependent on the parasitic capacitances. Thus,the smaller increase of in Fig. 3 indirectly indicatesthe rate of decrease in the parasitic capacitances is lower thanthat of increase in substrate resistance with increasing substrateresistivity. In addition, the values of and decreasewith increasing This effect is caused by the increaseof the overlap, fringing, and metal area on the substrate atlarger [6].

Fig. 4 shows the and of inductors with three kinds ofthe substrate resistivity as a function of at 2 GHz. Theincreases with and drops at higher The value of inthe wide range of increases at higher substrate resistivity.This effect is reasonable because substrate resistances becomelarger with increasing the substrate resistivity [6]. As thesubstrate resistivity becomes higher, the peak value of the plotof versus occurs at the larger due to the increase of thesubstrate resistance and the reduction of parasitic capacitances.Since value increases with the rise of in Fig. 4, the valueof at the peak of the plot becomes larger in the inductoron higher resistivity Si substrate. Thus it is useful to use highresistivity Si substrate in fabricating good performance RFIC’s where the higher value of and is needed.

Fig. 4. The quality factor(Q) and inductance(L) as a function of thenumber of turns for rectangular spiral inductors with various kinds of thesubstrate resistivity, (f = 2 GHz).

Fig. 5. TheQ values as a function of frequency for rectangular spiralinductors fabricated on 2 K�cm (open symbol) and 4–6�cm (filled symbol)Si substrate with various kinds of the inner diameter.

2) Inner Diameters:Fig. 5 shows the for various innerdiameter ( ) as a function of frequency for rectangular spiralinductors fabricated on 2 K cm and 4–6 cm Si substrate.With the increase of frequency, the reaches a maximumvalue and then rolls off at higher frequencies. The frequencyresponse of of inductor with 4–6 cm with various kinds of

are also shown in Fig. 5. As exhibited in Fig. 5, the increaseof gives rise to the reduction of and and thehigher substrate resistivity results in the rise of Thistrend is the same behavior as the case of the number of turns

1956 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 45, NO. 9, SEPTEMBER 1998

Fig. 6. The Q and L values as a function of the inner diameters forrectangular spiral inductors with various kinds of the substrate resistivity,(f = 2 GHz).

in Fig. 2, and can be explained by the fact that total inductorarea is expanded with increasing

Fig. 6 shows the and with three kinds of the substrateresistivity as a function of at 2 GHz. At first, with theincrease of the with the substrate resistivity of 2 Kcmincreases and then decreases beyond the inner diameter of 100

m. This trend is the same as that of the number of turns inFig. 4. In the case of lower substrate resistivity, any risingtrend is not found as shown in Fig. 6. This may indicatethat the parasitic capacitances dominate over the inductivereactance in the full rang of The value of also increaseswith larger in Fig. 6, because the metal line becomes longerat fixed

3) Metal Width and Spacing:Fig. 7 shows the plot ofversus frequency for various kinds of metal width and spacingfor rectangular spiral inductor fabricated on 2 Kcm Sisubstrate. The values of and are exhibited todecrease with increasing the metal width, which is due to therise of the parasitic capacitances that is similar behavior tothe case of various and However, the at frequenciesbelow 2.5 GHz is found to increase with rising width from8–30 m. In the frequency response of with varying metalspacing, only a small variation of the is observed in therange of frequency up to 8 GHz while the spacing varies from2 to 10 m.

Fig. 8 shows the and values at 2 GHz as a functionof metal width for rectangular spiral inductors fabricated onSi substrate of 2 K cm resistivity. There is no variationof inductance with the increase of metal width, but the riseof is found with increasing metal width. This behavior iseasily understood by observing that the resistance of inductordecreases with increasing metal width in this figure.

Fig. 9 shows the and values as a function of metalspacing for rectangular spiral inductors with two kinds of

(a)

(b)

Fig. 7. TheQ values as a function of frequency for rectangular spiralinductor fabricated on 2 K�cm Si substrate with various metal width andspacing.

fabricated on Si substrate of 2 Kcm resistivity. As shownin Fig. 9, the slightly decreases and the value ofslightlyincreases with increasing metal spacing. This is justified by theincrease of resistance with larger spacing, which is observedin Fig. 9.

B. The Dependence of on Metal Thickness

For obtaining the high inductor, the substrate losses andinductor conduction loss should be reduced. This inductor con-duction loss can be minimized by increasing metal thicknessbecause the metal resistance is reduced [11]. In this case, theeffect of losses due to the metal skin effect should be consid-ered in selecting the thickness in high frequency applications.For the case of TiW/Al1%Si/TiW metal interconnection, theskin depth is about 2.2m at 2 GHz, Therefore the skin effectlosses can be neglected for our 2-m thick metal inductor.

Fig. 10 shows the frequency response ofin rectangularspiral inductors fabricated on 2 Kcm Si substrate withvarying in the case of 2-m metal thickness. The overallvalues of become higher than those in 1.1-m metal

PARK et al.: MICROWAVE SPIRAL INDUCTORS IN SILICON TECHNOLOGY 1957

Fig. 8. TheQ;L; andR values as a function of metal width for rectangularspiral inductors fabricated on Si substrate of 2 K�cm resistivity (f = 2GHz).

Fig. 9. TheQ;L andR values as a function of metal spacing for rectangularspiral inductors fabricated on Si substrate of 2 K�cm resistivity with twokinds of inner diameters, (f = 2 GHz).

Fig. 10. TheQ as a function of frequency for rectangular spiral inductorsfabricated on 2 K�cm Si substrate with various kinds of the number of turnsin the case of 2-�m metal thickness.

Fig. 11. TheQ andR values as a function of number of turns for rectangularspiral inductors on 2 K�cm Si substrate with two kinds of metal thickness(f = 2 GHz).

inductor. The 2-m metal inductor shows the highest withthe peak value of the 10.3 at eight turns, which is nearlycomparable with the reported result using gold process [5].In order to inspect the influence of the metal thickness, theand values of the rectangular spiral inductor with the metalthickness of 2 m were plotted together with those of 1.1-mmetal inductor in Fig. 11, and the of 2- m metal inductor isshown to be 1.7 times larger than that of 1.1-m metal thickinductor. This is obviously because of the reduction of metalresistance due to thicker metal in Fig. 11.

1958 IEEE TRANSACTIONS ON ELECTRON DEVICES, VOL. 45, NO. 9, SEPTEMBER 1998

Fig. 12. A small-signal equivalent circuit used for inductor modeling usedfor curving-fitting.

TABLE ISUMMARY OF EXTRACTED EQUIVALENT CIRCUIT MODEL PARAMETERS FOR

THE VARIOUS KINDS OF RECTANGULAR SPIRAL INDUCTORS WITH THE

DIFFERENTN AT INNER DIAMETER OF 100�m. THE METAL WIDTH

AND SPACING OF INDUCTORS ARE 10 AND 2 �m, RESPECTIVELY

C. Equivalent Circuit Modeling

To understand the geometric effect of inductor parameters,a small-signal equivalent circuit in Fig. 12 has been usedin this work [6], [10]. In this circuit, and representthe series inductance and resistance, respectively.alsoinclude a frequency dependent term related to metal skin effectand other high frequency effects. models the parasiticcapacitance which consists of the overlap capacitance betweenthe spiral and the underpass, fringing capacitance betweenadjacent metal lines. The effect of the fringing capacitanceis small because the lines are almost equipotential. ismainly attributed to the overlap capacitance due to the greaterpotential difference between them [12]. and representthe capacitance between the metal layer and the groundedsubstrate, and and model the resistance associated withthe substrate losses. These model parameters were extractedby fitting the lumped equivalent circuit model to the measured

-parameters using HP-EEsof LIBRA. Table I shows thefitted model parameters for inductors with different Thisinformation can be used to explain the dependence ofon

These fitted results show the increase of andwith larger which explains directly the decrease ofand shown in Figs. 2–4. In addition, the decrease of

and with increasing large is observed in Table I.These results can be easily understood because the metal areain inductor become larger with higher

Based on these geometric studies, the desirable range ofparameters for our inductor on high resistivity substrate wasdetermined as follows; in the case of metal width/spacing

m m the inner diameter was from 60 to 100m and the number of turns was from six to eight. In this case,

the range of was 5.9–6.5 and was from 7–13 nH. This

range of parameters seems to be suitable for RF IC applicationsoperating at 2 GHz because good RF performances with lownoise were observed in two-stage low-noise amplifier (LNA)circuit fabricated with our spiral inductor [13].

IV. CONCLUSIONS

We studied the dependences of quality factor and inductanceon the geometric layout of microwave inductors fabricatedon the various kinds of Si substrates using conventionalCMOS double-metal interconnection technology. These geo-metric studies are carried out by plotting the frequency re-sponses of the with varying substrate resistivities and layoutparameters of width, and spacing over the wide rangeof frequency below 8 GHz. A 13.0-nH inductor with a peakof 11.5 at 3.0 GHz for 2.0-m metal thickness was achieved.Based on these studies, we can determine the proper rangeof all layout parameters to obtain a maximum value ofinthe specific range of which become valuable informationfor designing the optimal structure for RF IC’s applicationsoperating in the frequency range of interest.

ACKNOWLEDGMENT

The authors would like to thank S. J. An for his technicalcontributions. They also appreciate the assistance from allmembers of Silicon RF IC Group at ETRI.

REFERENCES

[1] N. Camiller, J. Costa, D. Lovelace, and D. Ngo, “Silicon MOSFET’s, themicrowave device technology for the 90s,”IEEE MTT-S Int. MicrowaveSymp. Dig., June 1993, pp. 545–548.

[2] R. Schneiderman, “Who’s winning the wireless way?,”Microw. RF,Oct. 1994, pp. 31–36.

[3] N. M. Nguyen and R. G. Meyer, “Si IC-compatible inductors and LCpassive filters,”IEEE J. Solid-State Circuits, vol. 25, pp. 1028–1031,Aug. 1990.

[4] K. B. Ashby, I. A. Koullias, W. C. Finley, J. J. Bastek, and S. Moinian,“High Q inductors for wireless applications in a complementary siliconbipolar process,”IEEE J. Solid-State Circuits, vol. 31, pp. 4–9, Jan.1996.

[5] J. N. Burghartz, M. Soyuer, and K. A. Jenkins, “Microwave inductorsand capacitors in standard multilevel interconnect silicon technology,”IEEE Trans. Microwave Theory Tech., vol. 44, pp. 100–104, Jan. 1996.

[6] M. Park, S. Lee, H. K. Yu, J. G. Koo, and K. S. Nam, “HighQ CMOS-compatible microwave inductors using double-metal interconnectionsilicon technology,”IEEE Microwave Guided Wave Lett., vol. 7, pp.45–47, Feb. 1997.

[7] M. Park, S. Lee, H. K. Yu, and K. S. Nam, “Optimization of highQ CMOS-compatible microwave inductors using silicon CMOS tech-nology,” in IEEE MTT-S Int. Microwave Symp. Dig., June 1997, pp.129–132.

[8] M. Park, G. H. Kim, J. Jang, J. G. Koo, and K. S. Nam, “Planarizedinterconnection technology using a new pillar formation method withmulti-stacked metal structure,”Electron. Lett., vol. 32, no. 18, pp.1731–1732, Aug. 1996.

[9] P. J. van Wijnen, H. R. Claessen, and E. A. Wolsheimer, “A newstraightforward calibration and correction procedure for “on wafer”high-frequencyS-parameter measurements (45 MHz–18 GHz),”IEEEBipolar Circuits Technol. Meet., 1987, pp. 70–73.

[10] S. Chaki, S. Aono, N. Andoh, Y. Sasaki, N. Tanino, and O. Ishihara,“Experimental study on spiral inductors,” inIEEE MTT-S Int. MicrowaveSymp. Dig., June 1995, pp. 753–756.

[11] M. Park, C. S. Kim, J. M. Park, H. K. Yu, and K. S. Nam, “HighQ microwave inductors in CMOS double-metal technology and itssubstrate bias effects for 2 GHz RF IC’s application,” inIEDM Tech.Dig., Dec. 1997, pp. 59–62.

PARK et al.: MICROWAVE SPIRAL INDUCTORS IN SILICON TECHNOLOGY 1959

[12] L. Wiemer and R. H. Jansen, “Determination of coupling capacitance ofunderpass, air bridges and crossing in MIC’s and MMIC’s,”Electron.Lett., vol. 23, no. 7, pp. 344–346, Mar. 1987.

[13] C. S. Kim, M. Park, C. H. Kim, Y. C. Hyeon, H.Y. Kyu, and K. S.Nam, “Optimization of CMOS and bias condition for 2 GHz low noiseamplifier,” in 5th Int. Conf. VLSI and CAD (ICVC ’97), Seoul, Oct.1997, pp. 156–158.

Min Park (M’97) was born in Pusan, Korea, onDecember 11, 1960. He received the B.S. degreein physics in 1984, the M.S. degree in solid statephysics in1986, and the Ph.D. degree in semi-conductor physics in 1997, all from Kyung HeeUniversity, Seoul, Korea.

In 1989, he joined the Semiconductor TechnologyDivision of Electronics and TelecommunicationsResearch Institute (ETRI), Taejon, Korea, wherehe works on semiconductor device and processtechnology. His research interests include advanced

semiconductor technology especially in the fields of the thin dielectricfilm characteristics, multi-metal interconnection processes, microwave deviceand process technology. He currently works in design, fabrication, andcharacterization of passive devices based on the silicon RF CMOS deviceand process technology.

Dr. Park is a member of the Society for Information Display and KoreanPhysical Society.

Seonghearn Lee(S’88–M’92) was born in Junjoo,Korea, in 1962. He received the B.E. degree in elec-tronic engineering in 1985 from Korea University,Seoul, Korea, and the M.S. and Ph.D. degrees inelectrical engineering from the University of Min-nesota, Minneapolis, in 1989 and 1992, respectively.

His doctoral dissertation work involved the de-sign, fabrication, and parameter extraction of Al-GaAs/GaAs heterojunction bipolar transistors. From1992 to 1995, he was a Senior Member of ResearchStaff in the Semiconductor Technology Division at

the Electronics and Telecommunications Research Institute, Taejon, Korea,where he worked on the development of polysilicon emitter bipolar transistorsand Si/SiGe/Si heterojunction bipolar transistors. Since 1995, he has beenwith the Department of Electronic Engineering at Hankuk University ofForeign Studies, Korea, as an Assistant Professor. He is currently engagedin research on the design, modeling, and characterization of silicon andcompound semiconductor devices.

Cheon Soo Kim(M’96) was born in Taegu, Korea,on August 30, 1959. He received the B.S. and M.S.degrees in electronic engineering from KyungpookUniversity, Taegu, in 1982 and 1984, respectively.He is currently pursuing the Ph.D. degree in electri-cal engineering at the Korea Advanced Institute ofScience and Technology, Taejon, Korea.

In 1986, he joined the Semiconductor TechnologyDivision of Electronics and TelecommunicationsResearch Institute, Taejon, Korea, where he inves-tigates DRAM cell structure and CMOS device

reliability. His current interests include RF CMOS device technology, devicenoise modeling as well as RF circuit design

Hyun Kyu Yu (M’93) was born in Taegu, Korea,on July 31, 1958. He received the B.S. and M.S. de-grees from Kyungpook National University, Korea,in 1981 and 1983 respectively, and the Ph.D. degreein electrical and electronics from Korea AdvancedInstitute of Science and Technology (KAIST), Tae-jon, Korea, in 1994.

In 1983, he joined the Electronics and Telecom-munications Research Institute (ETRI), Taejon, Ko-rea, where he was engaged in the research anddevelopment of CMOS process technology and de-

vice characterization. From 1986 to 1992, he was involved in the developmentproject of 4M, 16M, and 64M DRAM where he designed the advanced devicearchitecture and its applications. He is now a Principal Research Engineer andin charge of the government project of the development of device and circuittechnology for silicon RF integrated circuits. His interests include devicemodeling (CMOS, SOI, and silicon RF devices), high-speed and low-powerlogic circuits, and RF CMOS circuits design.

Kee Soo Nam (M’97) received the B.S. degreein physics from Kyungpook National University,Taegu, Korea, in 1974 and the M.S. and Ph.D.degrees in physics from Korea Advanced Instituteof Science and Technology (KAIST), Taejon, Korea,in 1986 and 1993, respectively.

Since 1974, he has been with ETRI, where hehas been involved in the research and developmentof various types of MOS and CMOS devices andflat panel display using poly-Si TFT-LCD. He iscurrently director of the ASIC Technology Research

Department of ETRI and involved in the development of smart powerintegrated circuits related PDP driving circuits, and RF power.