Upload
terry
View
33
Download
0
Tags:
Embed Size (px)
DESCRIPTION
TDCB/TEL62 progress. Elena Pedreschi TDAQ WG Meeting CERN February 12, 2014. TEL62. TDCB. TDCB Progress. All PCB already produced (100 pcs ) First batch of 10 boards produced and tested with no issues All the components for the full production arrived this week in CERN. - PowerPoint PPT Presentation
Citation preview
TDCB/TEL62 progress
Elena Pedreschi
TDAQ WG Meeting
CERN February 12, 2014
TEL62
E. Pedreschi CERN - TDAQ WG Meeting - February 12, 2014
TDCB
TDCB Progress• All PCB already produced (100 pcs)• First batch of 10 boards produced and
tested with no issues• All the components for the full
production arrived this week in CERN.• The company will start the assembly of
the remaining 90 boards next week• The test of all the boards will start in
few weeksE. Pedreschi CERN - TDAQ WG Meeting - February 12, 2014
TEL62 Progress (1)• All PCB already produced (93 pcs)• First batch of 5 boards produced and
tested:– 3 with no issues– 2 with some problems:• TEL62v3-001: problems on JTAG chain and
on programming PPs FPGA via EPCS64;• TEL62v3-003: a short in one of the ECS lines
(under PP0 FPGA or J20 connector)
E. Pedreschi CERN - TDAQ WG Meeting - February 12, 2014
TEL62 Progress (2)• TEL62v3-001 and TEL62v3-003 sent
back to the manufacturer for more investigations and repair:– X-Ray in 2D and 3D didn’t report any
anomalies on the boards• Finally the company unsoldered one FPGA
on 001 and one FPGA and a connector on 003• After unsoldering the short on 003
disappeared
E. Pedreschi CERN - TDAQ WG Meeting - February 12, 2014
TEL62 Progress (3)
E. Pedreschi CERN - TDAQ WG Meeting - February 12, 2014
PP0 on TEL62v3-003unsoldered
J20 (ECS conn) on TEL62v3-003unsoldered
TEL62 Progress (3)– New FPGAs were soldered on the boards
(yesterday) and both will be sent back to Pisa for testing (next week…)
E. Pedreschi CERN - TDAQ WG Meeting - February 12, 2014
TEL62 Progress (4)– Most of the FPGAs for the production (75 %) will
be in CERN on March 18th, the remaining some weeks later
– The assembly company is ready to start (they are waiting for the FPGAs)
– The idea is to split the production in 3 batches: 10 + 40 + 38
– We hope to start the tests of the first batch beginning of April
E. Pedreschi CERN - TDAQ WG Meeting - February 12, 2014
TEL62 Progress (5)• Firmware:
– One important annoying issue of the TEL62 firmware was the hung of the processing in presence of a big flux of data (noisy channels for example). This was also shown here during the last dry run
– In Pisa we were able to reproduce the problem (or at least the same symptom) : the system was hunging when exactly 256 words per time-slot were received by the PP
– After some firmware modifications the problem disappeared, so we hope that was solved
To confirm it, we have to test the system at CERN with a TEL62 attached to a detector with real noise (MUV3 for example)
E. Pedreschi CERN - TDAQ WG Meeting - February 12, 2014