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-1- TABLE OF CONTENTS EXPERIMENT #1........SEMICONDUCTOR DIODE...................PAGE 2 CHARACTERISTICS EXPERIMENT #2........RECTIFIER CIRCUITS............................PAGE 8 EXPERIMENT #3....... TRANSISTOR CHARACTERISTICS.......PAGE 17 EXPERIMENT #4....... TRANSISTOR BIAS CIRCUITS..............PAGE 30 EXPERIMENT #5......MEASUREMENT OF AMPLIFIER.......... PAGE 40 AC SMALL SIGNAL CHARACTERISTICS

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TABLE OF CONTENTS

EXPERIMENT #1........SEMICONDUCTOR DIODE...................PAGE 2CHARACTERISTICS

EXPERIMENT #2........RECTIFIER CIRCUITS............................PAGE 8

EXPERIMENT #3.......TRANSISTOR CHARACTERISTICS.......PAGE 17

EXPERIMENT #4.......TRANSISTOR BIAS CIRCUITS..............PAGE 30

EXPERIMENT #5......MEASUREMENT OF AMPLIFIER..........PAGE 40AC SMALL SIGNAL CHARACTERISTICS

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ENGINEERING 2634

EXPERIMENT #1

SEMICONDUCTOR DIODE CHARACTERISTICS

OBJECTIVE:

To study the characteristics of semiconductor diodes.

THEORY:

The relationship between the voltage V applied to an ideal diode to the current I flowingthrough the diode is:

(1)

where

(2)

andq = magnitude of electronic charge (1.6x10 -19 coulombs)K = 1.38x10 -23 joules/degree Kelvin ( OK)T = junction temperature ( OK)I = junction current in amperes (A)IO = reverse saturation current (A)0 = 1 for germanium 2 for silicon with V > 0.6V, 1 if V < 0.6V

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If a current greater than about 1000X the magnitude of IO is passed through the diode,which is usually the case in practice, in the forward bias direction as shown in figure 1 for Vpositive, then the exponential in eq. 1 becomes much larger than unity and the equation reducesapproximately to:

(3)

The derivation of eq. 1 may be found in any of several textbooks. The student shouldstudy the implications of the ideal diode assumption since eq. 1 does not account for ohmicresistance occurring in the bulk semiconductor or diode leads.

Plotting of either eq.1 or2 results in a curve like that shown in figure 2. Solving eq.2 forV gives:

(4)

If eq. 4 is plotted as ( ln I ) vs V, the result is a straight line with a slope of ( I / 0VT )and an intercept on the vertical axis at V = 0 of ( ln IO ) as shown in figure 3.

Figure 1 (a) Figure 1 (b) Figure 1 (c)Forward Bias Reverse Bias Symbols

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Figure 2 Figure 3

The ac or incremental resistance of the diode junction is defined as:

(5)

obtained by differentiating eq. 2 . Note that the rac corresponds to the inverse of the slope of the I-V curve expressed in eq. 1 or 2.

An important region of the reverse characteristics of the diode known as the reverse biasbreakdown region shown in fig 2 is not predicted by the ideal diode characteristic in eq. 1. Suchbreakdown can be caused by high internal electric fields in very narrow diode junctions resultingin the Zener effect . In diodes with wider junctions the field intensities are lower, but may stillbe high enough to cause a runaway ionization process called avalanche breakdown. Breakdowndiodes of all types are commonly referred to as Zener diodes even though the actual mechanisminvolved may be either zener or avalanche breakdown.

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EQUIPMENT:

0-25 volt power supplydigital multimeteranalog multimeter (AVO)6A4 or equivalent Germanium diode1N4739A 9.1V Zener diode or equivalent1N4005 Silicon rectifier diode1Kohm ½ Watt resistorheat source

SCHEMATIC DIAGRAMS:

Figure 4

Figure 5

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Figure 6

PROCEDURE:

1) Measure the forward (conducting) characteristics of the zener diode used as a junctiondiode, as follows:

Connect the circuit shown in figure 4 using the zener diode, carefully observing thepolarity markings of the power4 supply, meters and the diode. Adjust the supply to give currentsof 0 to 10 mA in 1 mA steps. Measure and record the current through and the voltage across thediode for each step.

2) Measure the reverse breakdown characteristic of the zener diode as follows:Connect the circuit shown in figure 5 using the zener diode, carefully observing all

polarities. Again adjust the power supply to give currents of 0 to 10 mA in 1 mA steps. Measureand record the current and voltage for each step. Note that no current will flow until the diodevoltage has been increased above the zener breakdown voltage.

3) Measure the reverse blocking characteristics of the zener diode as follows:Connect the circuit shown in figure 6 using the zener diode, carefully observing all

polarities. Note the different meter positions and ranges. Adjust the power supply so that thediode voltage increases from 0 to Vz in steps of 1 volt. Measure and record the voltage and thediode current for each step. Be careful when adjusting around Vz as the current will rise veryquickely. Take a set of readings about 0.5 volts above Vz also, providing that the current DOESNOT EXCEED the 50 microamp level.

4) Repeat steps 1 and 3 for the germanium diode.

5) Repeat steps 1 and 3 for the silicon rectifier diode.

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6) Connect each diode in turn in the circuit of figure 6 and measure the reverse leakagecurrent (if any) on the most sensitive range of the ammeter (50 micro-amps) as in part 3, but forone mid-range value. For each of the diodes, apply heat to the diode and observe qualitativelywhat happens to the leakage current as the temperature increases. Record your results.

RESULTS:

1) All your measurements are to neatly arranged in tables. Use a separate table for eachpart of the procedure and label then accordingly. This is very important if your calculatedresults are to be checked later.

2) Plot the I-V characteristics for both the forward and reverse directions for all threediodes, with the forward characteristics from part 1) in quadrant 1 and the reversecharacteristics from parts 2) and 3) in quadrant 3. Put all three on the same graph forcomparison.

3) Plot (ln I ) vs V using the data from step 2) only (forward conduction) on linear paperfor all three diodes. Put all three curves on the same graph and draw a BEST FIT straightline for each of diodes to intercept the ( ln I ) axis at V = 0.

4) From the curves in 3) above, determine values for 0 and IO for each of the three diodes.

5) GRAPHICALLY determine the slope of each diode forward characteristic (from thecurves in 2) above) for several points and plot slope vs Id for all three diodes on the samegraph. Also calculate the theoretical value of rac using equation #5 and superimpose thesevalues on the same graph for comparison.

6) Compare your measured values of 0 and IO with theoretically expected values.

7) What effect would increases diode lead resistance have on its characteristic?

8) What effect does temperature change have on diode characteristics?

9) Any questions raised in the various steps of the experiment should be answered withunambiguous indication of which answer pertains to which question. The brief answersmust include your reasoning ( support your answer).

10) Conclusions ( clearly stated ).

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ENGINEERING 2634

EXPERIMENT #2

RECTIFIER CIRCUITS

OBJECTIVE:

To study the characteristics of semiconductor diode rectifier circuits.

THEORY:

Alternating current (ac) may be converted to unidirectional current (dc) by means ofrectifying circuits. With the addition of suitable filtering or regulating components, thisunidirectional current may be converted to essentially constant direct current (dc). Such rectifiercircuits are used in the power supplies for electronic equipmen which must operate from the acsupply.

The semiconductor diode has rectifying properties; that is to say, it conducts well in onedirection and entirely blocks conduction in the other direction. A simple rectifier circuit using adiode in series with an ac source and a load resistor is shown in figure 1(a) and the variouswaveforms occurring in the circuit are shown in figure 1(b). It can be seen from the waveformsthat current flows only during alternate half cycles, and for this reason the circuit is called a Half Wave Rectifier.

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4BB 3B2B

T

T

T

Tt)

T

a) b)Figure 1

When a diode is in conduction the voltage drop across it is given by:

(1)

where rO is any fixed resistance in the diode leads and bulk semiconductor. If the diode current islarger than a few milliamperes as is the case in most rectifier circuits, then this characteristic can

be replaced by a linear approximation in which

(2)

(3)

and vd is the slope-intercept from the operating point with the zero-current axis, as shown infigure 2.

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Characteristic Symbol and Equivalent Cct.

Figure 2

The average (or dc) current through the load is:

(4)

The average voltage across the load is:

(5)

The average values are those which would be indicated by an average-responding instrumentsuch as a moving coil meter.

Using Ohm’s Law and diode equivalent circuit of figure 2, the value of IP for equation 4can be found from the equivalent circuit of the rectifier in figure 3 as:

(6)

where: VP is the peak load voltage without load (RL = 4)VSP is the peak supply voltageVO is the diode threshold voltagerd is the diode approximate series resistanceRL is the load resistance

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RO is the total internal resistance of the rectifier and the sourceRS is the ac source resistance

Figure 3

Regulation:

Any power supply has an effective internal resistance which causes a drop in the output(dc) voltage when current is drawn. The internal resistance Ri is assumed to be constant at allcurrent levels, and is made up of the diode forward resistance rd in series with the supplytransformer secondary resistance. The PERCENTAGE VOLTAGE REGULATION (%V.R.)Is defined as:

(7)

where:VFL is the dc output voltage at full loadVNL is the dc output voltage with no load

These quantities are shown in figure 4. For the half wave rectifier circuit see figure 1(b) andequations (5) and (6).

(8)

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At no load (RL = 4), equation (8) reduces to:

(9)

while at full load:

VFL = Vdc by equation 8 (10)

Substituting equation 9 and 10 into equation 7 gives an alternate expression for the voltageregulation as:

(11)

By measuring the regulation characteristic for the circuit and graphing it as in figure 4,the % regulation may be found graphically. Then by substituting the graphical value of voltageregulation into equation 11 an effective value for the internal resistance of the half wave rectifiercircuit RO may be found.

The above analysis may also be applied to the full wave rectifier circuit which uses acenter-tapped transformer secondary winding as shown in figure 5 (c). The only difference is thatthe current now flows in the load during both halves of the input cycle so that the dc current iseffectively doubled. Thus, in equations 4, 5, 8, and 9 the form factor (1/B) becomes (2/B).

Figure 4

The analysis may also be applied to a full wave bridge rectifier as shown in figure 5(b). Inthis case the form factor is 2/B as for the full wave rectifier, but also since two diodes are

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connected in series with the load during conduction, VO and rd must be replaced by 2VO and 2rd

in figure 3 and equation 6.

Ripple Factor:

Where smooth unvarying direct current is required, it is obvious that the half waverectified wave as shown in figure 1(b) is not very satisfactory since it has a large fluctuationabout the dc level. This variation is called RIPPLE. Later it will be shown how this ripple can bereduced by filtering. A measure of the amount of ripple is obtained by defining the ripple factoras:

(12)

I' rms and V' rms are the root-mean-square values of the alternating components only of thecurrent and voltage respectively. The ripple factor for the half wave rectifier without filter is 1.21and that for the full wave rectifier without filter is 0.48 .

Capacitor Filter:

A capacitor connected across the load will store energy during the conducting period, anddischarge this energy through the load during the non-conducting period of rectifier operation.This means that the load voltage will be held constant by the capacitor and at a higher value thanwithout the capacitor. The approximate analysis for the capacitor filter circuit shows that:

(13)

and

(14)

where

(15)

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fr = f for half wave 2f for full wavef = power line fundamental frequency (Hz)C = capacitance in parallel with load (F)RL = load resistance (S)VLp = peak load voltageVp = peak no-load voltage

EQUIPMENT:

Digital voltmeter with true rms capabilityOscilloscope115 : 12.6VCT 1 amp transformer1N4005 rectifier diodes (4)220 :F 50 volt electrolytic capacitor7.5 Ohm 10 Watt resistorLoad resistors : 55 S, 110 S, 220 S, 510 S 780 S, and 4.

SCHEMATIC DIAGRAMS:

Figure 5 (a)

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Figure 5(b)

Figure 5(c)

PROCEDURE:

1) Measure and record the open circuit (no load) secondary rms voltage of the transformerbetween the center tap and one of the outside terminals. Repeat this measurement with an 7.5Ohm 10W resistive load.

Calculate the ac source resistance RS using equations (7) and (11). In this case RO = RS.

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2) For the half wave rectifier circuit in figure 5(a), measure VL dc, IL dc and RL for theload resistor values shown in the equipment list without the capacitor.

3) Repeat 2) above with the capacitor in the circuit.

4) Connect in the 110 Ohm load resistor and remove the capacitor. Connect theoscilloscope across the load resistor. Sketch accurately to scale, the voltage waveform shown onthe scope. Note and label the peak value of voltage. Using a true rms voltmeter, measure andrecord the value of rms ripple voltage. With the scope measure the peak to peak ripple voltage.Repeat these measurements with the capacitor connected (observe proper polarity markings).

5) Repeat steps 2), 3) and 4) for the full wave bridge rectifier of figure 5(b) and the fullwave rectifier of figure 5(c).

REPORT:

1) Put all data obtained in tables (neatly arranged).

2) Plot the voltage regulation curves (VL vs IL ) for all six cases (half wave, full wave, andfull wave bridge, with and without the filter capacitor). Make three graphs, one for eachof the three rectifier circuits.

3) Plot the NORMALIZED voltage regulation curves (VL / VNL) vs (IL / Ilmax) for all sixcases, from your measured results.

4) From your regulation curves, determine the % voltage regulation as outlined in thetheory section, and the effective internal resistance for each case.

5) Determine the ripple factor at a load of 110 Ohms for each of the six cases, from yourmeasured results.

6) Comment on the advantages and disadvantages of each of the three rectifier circuittypes.

7) Comment on the effectiveness of the capacitor filter under varying load conditions.How might its effectiveness be improved?

8) Any questions raised in the various steps of the experiment should be answered withunambiguous indication of which answer pertains to which question. The brief answersmust include your reasoning ( support your answer ).

9) Conclusions ( clearly stated ).

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ENGINEERING 2634

EXPERIMENT #3

TRANSISTOR CHARACTERISTICS

OBJECTIVE:

To obtain by measurement, the input, output, and transfer curves for an NPN bipolartransistor operating in the common emitter mode.

To obtain by measurement, the transfer, and output curves for an insulated gate fieldeffect transistor operating in the common source mode.

THEORY:

The electrical action of any 4-terminal (2-port) device may be described by three sets ofcurves.

1) An Input Characteristic which plots input current against input voltage forvarious levels of output voltage (or current) held constant.

2) An Output Characteristic which plots output current against output voltagefor various levels of input voltage (or current) held constant.

3) A Transfer Characteristic which plots output current (or voltage) againstinput current (or voltage) with the output voltage (or current) held constant.

Bipolar Transistor:

The bipolar transistor (BPT) is basically a current amplifier, so that its out put current isrelated to its input current in a linear manner by the expression:

IC = $IB + ICEO (1)

where $ is the constant current gain and ICEO is the collector leakage current. Its input current

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looks like a forward biased diode junction so that its input characteristic is exponential, while itsoutput characteristic looks like a controlled current source.

For an NPN bipolar transistor, both its base and its collector must be held positive withrespect to its emitter for active transistor operation. In the Common Emitter Mode, signal isapplied between base and emitter, and the output is taken between collector and emitter, with theemitter being common to both the input and output circuits, as shown in figure 1(a).

The Input Characteristic for an NPN-CE transistor is a plot of IB vs VBE with VCE heldconstant as shown in figure 2(a).

The Output Characteristic for an NPN-CE transistor is a plot of IC vs VCE with IB heldconstant as shown in figure 2(b).

The Transfer Characteristic for an NPN-CE transistor is a plot of IC vs IB with VCE heldconstant as shown in figure 2(c).

(a) Symbol (b) Structure

Figure 1Common Emitter NPN Transistor

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$

(a) Input (b) Output (c) Transfer

Figure 2

Characteristic curves of an NPN Common Emitter Transistor

Some useful parameters that can be obtained graphically from the curves in figure 2 are:

1) Current Gain:

for VCE constant (2)

2) Input Slope Resistance:

for VCE constant (3)

which is the inverse of the slope of the input curve at the operating point Q.

3) Transconductance:

for VCE constant (4)

also at the operating point Q.

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4) Output Slope Resistance:

for IB constant (5)

which is the inverse of the slope of the output characteristic at the operating point Q.

Field Effect Transistor:

The Field Effect Transistor (FET) is a later developement than the bipolar transistor.The two main types available are the Junction Gate Field Effect Transistor (JFET) and theInsulated Gate Field Effect Transistor (IGFET). The IGFET is studied in this experiment.

The construction features of one type of IGFET are shown in figure 3(a). Here, thestarting material is a P-type silicon substrate into which an n-type region is formed. An insulatinglayer (usually) an oxide of silicon) is formed over the center of the n-type region and a metallicgate electrode is deposited on top of the insulator to form the GATE. Connections are made toeach side of the n-type CHANNEL through deposited metal electrodes which form the DRAINand SOURCE contacts. The gate G, drain D, and the source S leads of a FET correspond to thebase B, collector C, and the emitter E leads of a BPT. The symbol for an IGFET is shown infigure 3(b).

The basic control mechanism is achieved through the capacitance formed between thegate and the n-type channel between the drain and source. Figure 4(a) shows the situation whenthe gate is made negative with respect to the channel. The negative charge on the gate induces anequal and opposite charge in the channel by repelling majority carriers (electrons) out of thechannel region to uncover immobile positively charged donor atoms. As a result, fewer carriersare available for conduction, reducing the conductivity of the channel region. The channel is saidto be ‘depleted’ of electrons and for this reason the transistor is said to operate in theDEPLETION MODE. When the gate electrode is made positive with respect to the channel asshown in figure 4(b), additional electrons are attracted into the channel to ‘enhance’ itsconductivity, resulting in ENHANCEMENT MODE operation.

Figure 4(c) shows how the FET may be connected in a simple amplifier circuit. Currentflows from drain to source (ie, electrons move from source to drain) for the polarity of applieddrain voltage VDD shown. An application of a signal voltage between gate and source will resultin a variation of drain current which corresponds to the input signal. An amplified version of theinput signal voltage is obtained across the load resistor RL.

A second type of IGFET in which it is only possible to increase the carrier density of thechannel is called the ENHANCEMENT MODE IGFET. Its basic constructional features areshown in figure 5(a). Here, construction begins with an n-type substrate into which p+ type zones

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are diffused to form drain and source contacts and form a p-channel FET. The p+ designationindicates very heavy doping with doner atoms to give high conductivity.

(a) Structure (b) Symbol

Figure 3Depletion Mode IGFET

(a) Depletion (cutoff) (b) Enhancement (c) Circuit

Figure 4Biasing the Depletion Mode IGFET

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(a) Structure (b) Bias to form Inversion Layer

Figure 5Enhancement Mode IGFET

A gate insulator and gate electrode assembly is formed over the region between drain andsource which is to become the channel, in the same manner as for the depletion mode device.However, in the enhancement mode device, no channel forms until a negative gate-sourcevoltage VGS is applied, which at or above some threshold level will drive all of the electrons outof the channel region adjacent to the gate insulator and replace then with a layer of holes drawnin from the source contact. This layer of positive holes is referred to as an inversion layer, and itsconductivity may be further increased by increasing the magnitude of the negative gate biasvoltage. The inversion layer forms a channel for conductivity between drain and source. If thebias is more positive than the threshold value, no current will flow between drain and sourcebecause no matter which polarity of VDS is used, there will always be a revers biased junction ateither the drain or source end of the channel. With the inversion layer present however, thejunctions disappear, thus allowing drain current to flow.

Because the induced channel contains charge carriers of the opposite sign to that of thebasic semiconductor, the channel is said to be created by the formation of an INVERSIONLAYER. It should be noted that transistors are usually classified according to the type ofmajority carrier used in the channel. For example, the enhancement mode transistor justdescribed would be known as a p-channel enhancement mode FET, while the depletion modetransistor described would be known as an n-channel depletion mode FET.

The Output Characteristic:

This takes the form shown in figure 6(a) for one value of gate voltage. The curve can bedivided into two regions, the TRIODE REGION, and the SATURATION REGION.

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(a) Output Characteristic (b) Transfer Characteristics

Figure 6Characteristics for a Depletion Mode IGFET

The triode region (so called because a triode type model is used in developing the theory)for which the transfer characteristic relates the drain current ID to the gate voltage VG by theexpression:

ID = K( |VG -VO | | VD - 0.5 | VD2) (6)

where K is a constant for a given device and the meaning of the other symbols is evident fromfigure 6. It is obvious that equation 6 only describes the ID (VG, VD) relationship in the trioderegion since the curve in figure 6(a) tends to saturate above the value of |VD| = |VG - VO |.

In the saturation region an approximate analysis gives:

(7)

From equation 7, the Transfer Characteristic for the saturation condition holding VD constant isshown in figure 6(b).

1) VOLTAGE AMPLIFICATION FACTOR ::

with ID constant (8)

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2) TRANSCONDUCTANCE gm :

with VD constant (9)

which is the slope of the transfer curve at the operating point Q in figure 6(b).

3) OUTPUT SLOPE RESISTANCE rDS :

with VG constant (10)

which is the inverse of the slope of the output characteristic at the operating point Q in figure6(a).

EQUIPMENT:

+/- 12 volt fixed power supply0-20 volt variable power supplyDigital multimeterVoltmeter (HP427A)Microammeter (AVO)100K Ohm pot100K Ohm 1/4 Watt resistor2N3904 NPN silicon bipolar transistorn-channel IGFET mounted in a transistor socket with a 1 Meg Ohm resistor prewired intothe gate-source terminals

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SCHEMATIC DIAGRAMS:

Figure 7NPN Bipolar Transistor Measurements

Figure 8N-Channel IGFET Measurements

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PROCEDURE:

1) Measure the input characteristic of the NPN bipolar transistor using the circuit offigure 7. For each of the three values of VCE indicated in table 1(a), hold VCE constant (byadjusting VCC if necessary), and adjust the potentiometer on VBB to give the five values of IC

indicated in table 1(a). For each reading measure and record the values of IB, VBE, IC, and VCE intable 1(a).

2) Measure the output characteristic of the NPN transistor using the same circuit. Foreach of the values of IB indicated in table 1(b), hold IB constant (by adjusting the potentiometer ifnecessary), and adjust VCC to give the five values of VCE indicated in table 1(b). For each readingmeasure and record the values of IB, IC, and VCE in table 1(b).

3) The data for the transfer characteristic is obtained by filling in the IB data from table1(a) into table 1(c).

4) Set up the IGFET in the circuit of figure 8.

5) Measure the output characteristic of the IGFET. For each of the three values of VGS

indicated in table 2(a) (set by adjusting VGG), adjust VDD to give the five values of VDS indicatedin table 2(a). For each reading measure and record the values of VGS, VDS, and ID in table 2(a).

6) Measure the transfer characteristic of the IGFET using the same circuit. For each of thethree values of VDS indicated in table 2(b) (adjusted and held constant by VDD), adjust VGG to givethe five values of VGS indicated in table 2(b). For each reading measure and record the values ofVDS, VGS, and ID in table 2(b).

INPUT CHARACTERISTIC FOR AN NPN BIPOLAR TRANSISTOR

VCE = 0.5V VCE = 5.0V VCE = 10.0V

Point IC (mA) IB (:A) VBE (V) IB (:A) VBE (V) IB (:A) VBE (V)

1 2.0

2 4.0

3 6.0

4 8.0

5 10.0

Table 1(a)

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OUTPUT CHARACTERISTIC FOR AN NPN BIPOLAR TRANSISTOR

IB = 10:A IB = 30:A IB = 50:A

Point VCE (V) IC (mA) VCE (V) IC (mA) VCE (V) IC (mA)

1 2.0 2.0 2.0

2 4.0 4.0 4.0

3 6.0 6.0 6.0

4 8.0 8.0 8.0

5 10.0 10.0 10.0

Table 1(b)

TRANSFER CHARACTERISTIC FOR AN NPN BIPOLAR TRANSISTOR

VCE = 0.5V VCE = 5.0V VCE = 10.0V

Point IB (:A) IC (mA) IB (:A) IC (mA) IB (:A) IC (mA)

1 2.0 2.0 2.0

2 4.0 4.0 4.0

3 6.0 6.0 6.0

4 8.0 8.0 8.0

5 10.0 10.0 10.0

Table 1(c)

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OUTPUT CHARACTERISTIC FOR AN N-CHANNEL IGFET

VGS = -1.0V VGS = 0.0V VGS = +1.0V

Point ID (mA) VDS (V) ID (mA) VDS (V) ID (mA) VDS (V)

1 0.5 0.5 0.5

2 1.0 1.0 1.0

3 2.0 2.0 2.0

4 7.0 7.0 7.0

5 10.0 10.0 10.0

Table 2(a)

TRANSFER CHARACTERISTIC FOR AN N-CHANNEL IGFET

VDS = 2.0v VDS = 5.0v VDS = 10.0v

Point VGS (V) ID (mA) VGS (V) ID (mA) VGS (V) ID (mA)

1 2.0 2.0 2.0

2 1.0 1.0 1.0

3 0.0 0.0 0.0

4 -1.0 -1.0 -1.0

5 -1.5 -1.5 -1.5

Table 2(b)

RESULTS:

1) Plot each of your five sets of curves on separate pages of linear graph paper. Thereshould be three curves on each graph. Be sure to label all graphs fully and put a propertitle on each.

2) For the NPN transistor, choose an operating point somewhere in the middle of theactive region. (It is convenient to choose one which falls on one of your curves). Fromyour curves, graphically determine the values of $, ri, gm, and rO for that operating point.Show any graphical constructions on your graphs.

3) For the IGFET, choose an operating point somewhere in the middle of the active

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region. From your curves, graphically determine values of gm, rds, and : . Show thegraphical construction on your graphs.

4) Comment on your curves, comparing those for the FET to those of the BPT.

5) Any questions raised in the various steps of the experiment should be answered withunambiguous indication of which answer pertains to which question. The brief answersmust include your reasoning ( support your answer ).

6) Conclusions ( clearly stated ).

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ENGINEERING 2634

EXPERIMENT #4

TRANSISTOR BIAS CIRCUITS

OBJECTIVE:

To study several circuits used to apply dc bias to transistors.

THEORY:

A transistor can only be used as an amplifying device if the proper dc voltages andcurrents are applied to it. Establishing these dc levels is the problem of biasing. Another problemsolved by proper biasing is that of operating point drift because of changes in supply voltage,temperature and component values. A good bias circuit will minimize this drift.

The choice of bias operating point or Q point depends on the application of theamplifier. If it is to be a small signal linear amplifier, then the Q point should be placedsomewhere in the middle of the transistor’s active region as shown in figure 1, so that asymmetrical input signal will cause a symmetrical excursion of the Q point along the load lineand result in an undistorted output signal.

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)

))

Figure 1Q - Point Choice

If the temperature of the transistor increases, the leakage current ICEO increases rapidlyand the entire set of output curves rises up on the graph. For simple bias circuits, the load lineremains fixed on the graph with the result that the Q point moves up along the load line to a limitat IC (max). Now an input signal can cause a reduction of collector current but it cannot cause anincrease, so that the tops are clipped off the collector current ac waveform. Bias circuits whichintroduce negative feedback are used so that an increase in IC due to increasing ICEO causes adecrease in IBq which partially cancels the increase in IC, so that the operating point does not shiftas much.

A Stability Factor S is used to relate the circuit stability against changes of temperatureto circuit component values. This factor is defined as:

(1)

Derivations of this factor for each circuit can be found in several textbooks. The resulting S-factors for each circuit folling are stated. Ideally, the S-factor will have a minimum value whichapproaches unity, while a worst value will approach the value of the emitter current gain ($+1).

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SCHEMATIC DIAGRAMS:

METHOD TO DETERMINE $:

Each transistor has a different dc current gain $, and this varies with the level of emittercurrent. Therefore it is necessary to measure the current gain for a given transistor at the desiredoperating point if meaningful calculations are to be made. Also the base-emitter voltage of thetransistor varies with current level, and it must be measured at the operating point.

The values of $ and VBE at the operating point may be obtained by the use of the simplecircuit shown in figure 2. In this circuit, R2 is chosen so that at the desired operating point:

(2)

The potentiometer is then adjusted until the measured value of VCE = VCEq so as to give IC

= Icq . Then IB = Ibq is measured with the VOLTMETER REMOVED FROM THE BASECIRCUIT. The current gain $ is then found by:

(3)

In a bias circuit The output voltage level is established by the voltage drop created acrossthe collector load resistor R2 by the collector current. The collector current level is controlled bythe base current level, which is in turn controlled by the value of the base bias resistor R1 and thebase supply voltage VBB .

Figure 2$ Measuring Circuit

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$

SIMPLE TWO-SOURCE BIAS CIRCUIT:

Figure 3 shows the simplest form of bipolar transistor bias circuit. It uses two sources,one to control the base current and the other to provide a load for the collector current.

(a) Circuit (b) DC Equivalent Circuit

Figure 3Simple Two-Source Bias Circuit

Given the measured values of $ and VBE , one can calculate values of operating conditionsat room temperature using the equations below. These equations are derived from the dcapproximate equivalent circuit of figure 3(b).

(4)

VBE = a constant (0.2V for germanium) and (0.6V for silicon)

(5)

ICEO can be ignored for silicon transistors in most cases.

(6)

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(8)

(9)

TWO-SOURCE BIAS CIRCUIT WITH EMITTER FEEDBACK:

The circuit of figure 4(a) shows a two source bias circuit in which a feedback resistor R3

is used to establish negative feedback between the collector and base circuits. This feedbackreduces the effect of shifting the operating point because of rising ICBO with rising temperature.Given measured values for $ and VBE one can calculate the operating point at room temperatureusing the following equations, derived from the dc equivalent circuit of figure 4(b).

(10)

(11)

ICBO � 0 and can be ignored in most cases

(12)

(13)

(14)

VBE = 0.2V for germanium 0.7V for silicon

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$

(a) Circuit (b) DC Equivalent Circuit

Figure 4Two-Source Bias Circuit with Emitter Feefback

FOUR RESISTOR BIAS CIRCUIT WITH EMITTER FEEDBACK:

Bias stability in the circuit of figure 4 can be further improved by increasing the ratio R3 / R1. In figure 5(a) this is done by replacing the single base resistor R1 with a voltage dividernetwork to reduce the effective value of R1. If the voltage divider formed by resistors RA and RB in figure 5(a) is replaced by its Thevenin equivalent circuit, the circuit reduces to that of figure5(b), which is identical in form to that of figure 4(a). The component values of the Theveninequivalent base circuit in figure 5(b) are found as:

(16)

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(17)

(a) Circuit (b) Thevenin Equivalent Base Circuit

Figure 5Four Resistor Bias Network

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Figure 6Method of Determining the Thevenin Equivalent Resistance

EQUIPMENT:

2N3904 NPN transistor+12 volt regulated power supplydigital multimeter0-50 :A meter100K Ohm potentiometerresistors as requiredheat source to heat transistorbreadboard

PROCEDURE:

1) Using the circuit of figure 2 and the corresponding technique, determine the value of $and VBE for your transistor. Use IC = 0.6mA and VCE = 5V. Assume ICEO = 0.

2) Consider the circuit of figure 3(a). Using the data obtained in step 1) above, calculatethe values of R1 and R2 needed to give an operating point (Q point) of VCEq = 5.8 volts at anICq = 0.6mA given that VBB = VCC = +12.0 volts. Connect the circuit , using the nearest standardvalues of resistors available to that calculated .

Measure and record VBE, VB, VCC, VCE, IB, R1, and R2. From these measurements,calculate the value of IC flowing. IC is not measured directly with an ammeter due to ammeterloading effects. Use Ohm’s Law to determine IC viz IC = VR2 / R2.

Compare the measured values with the desired values, and explain any discrepancies.Also calculate the stability factor S for your circuit.

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Heat your transistor for several seconds and monitor the voltage across R2 and observequalitatively what happens to the collector current when the transistor is heated.

3) Consider the circuit of figure 4(a). Using the data obtained in step 1) above,calculate the values of R1 , R2, and R3 needed to give an operating point (Q point) of VCEq = 5.8volts at an ICq = 0.6mA given that VBB = VCC = +12.0 volts and VE = 1.0 volt. Connect the circuit using the nearest standard values of resistors available to that calculated .

Measure and record VB, VE, VBE, VCC, VCE, IB, R1, and R2 , and R3. From thesemeasurements, calculate the value of IE, and IC flowing. IC and IE cannot be measured directlywith an ammeter due to ammeter loading effects. Use Ohm’s Law to determine IC and IE viz IC = VR2 / R2, and IE = VR3 / R3 .

Compare the measured values with the desired values, and explain any discrepancies.Also calculate the stability factor S for your circuit.

Heat your transistor for several seconds and monitor the voltage across R2 and observequalitatively what happens to the collector current when the transistor is heated.

4) For the circuit of figure 5 (a), given that VCC = +12 volts, VE = 1.0 volt and R1TH = R3

find values of RA, RB, R2, and R3 to give the same operating point as in step 3) above. Connect the circuit and repeat the measurements as in step 3) above. Calculate the

currents and voltages as in step 3). Also calculate the currents in RA and RB . Observe the effectsof heating the transistor and comment.

RESULTS:

1) In steps 2, 3, and 4 be sure to put all data in table form for ease of comparison. Includein the table, the resistor values calculated, the resistor nominal value (colour coded), andthe actual measured value.

2) From the actual component values used, calculate the theoretical values for all currentsand voltages in the circuits. Tabulate these and compare with the measured values.

3) Compare the three circuits with respect to temperature stability (bias stability). Whichis best and why?

4) Discuss the importance of the ratio R3 / R1 in determining stability.

5) Discuss the limits on how large or small R1 or R3 may be made.

6) Comment on the sensitivity of the operating point to changes in base circuit resistance.In particular, comment on the effect of meter loading on base circuit conditions.

7) Any questions raised in the various steps of the experiment should be answered withunambiguous indication of which answer pertains to which question. The brief answers

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must include your reasoning ( support your answer ).

8) Conclusions ( clearly stated ).

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ENGINEERING 2634

EXPERIMENT #5

MEASUREMENT OF AMPLIFIER ACSMALL SIGNAL CHARACTERISTICS

OBJECTIVE:

To measure the input resistance, output resistance, voltage gain, and current gain of a ‘black box’ amplifier.

THEORY:

Any small signal amplifier can be treated as a two port (four terminal) black box. That is,electrical action may be fully described by measuring values of four parameters, an inputimpedance, an output impedance, a forward gain ratio, and a reverse feedback ratio. The reversefeedback ratio in practical amplifiers is usually small enough that it can be ignored, so that onlythree parameters need be measured. The amplifier is said to be UNILATERAL because it canonly pass signals in one direction. These parameters can be related to one another by a set of twoequations, where one equation describes the input equivalent circuit and the other describes theoutput equivalent circuit.

In the input circuit the input voltage and current are related by Ohm’s Law:

(1)

or conversely as:

(2)

where

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(3)

and it is assumed that reactive effects may be ignored (the circuit is only resistive).

The output circuit may be represented by either a controlled Thevenin voltage source orby a controlled Norton current source. The equation for the Thevenin output circuit is:

(4)

while the equation for the Norton output circuit is:

(5)

where

(6)

(7)

The three parameters to be measured are the input resistance Ri, the output resistance Ro

and the gain Avo (or Aisc). The black box can be represented by one of the two circuits shown infigure 1.

(a) Thevenin Equivalent Circuit (b) Norton Equivalent Circuit

Figure 1 Equivalent Circuits for a Unilateral Two Port Amplifier

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MEASUREMENT OF INPUT RESISTANCE:

In order to measure the input resistance of an amplifier it is necessary to apply an acsignal of the desired frequency to the input port, and measure the input voltage Vi and the inputcurrent Ii, and then apply equation (1). Vi may be measured directly using a high impedance acvoltmeter. However, the input current Ii is usually very small, so that it is more practical tomeasure the voltage drop across a sampling resistor placed in series with the input as shown infigure 2, then calculate the current through it.

Figure 2

Measurement of Amplifier Characteristics

An attenuator is placed between the signal generator and the amplifier to reduce the inputvoltage to about the level that would normally be applied to the amplifier. The amplifier output ismonitored with an oscilloscope and Vi is reduced until there is no noticeable distortion present inthe output voltage waveform (with the load removed).

Voltages VS, V2, and Vi are measured using a high impedance ac voltmeter.

The resistor R2 should be chosen to be in the same order of magnitude as Ri to reducemeasurement error. Its value may be measured using an ohmmeter, or if fixed resistors are usedand accuracy is not critical the nominal resistor values (colour coded) may be used.

If the input impedance contains a significant reactive component, then the voltages addvectorially instead of algebraically, so that |V i| + |V2| /= |VS|. The equivalent series circuit for theinput impedance being measured is shown in figure 3(a), which highlights the measured andderived voltages.

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Figure 3(a)Input Circuit With Reactance

Figure 3(b)Voltage Vector Diagram for Input Circuit in Figure 3(a)

Now, examining the voltage vector diagram in figure3(b), and given measured values for

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the magnitudes of Vi, V2, VS, R2, from the right triangle OCB by Pythagoras:

(8)

from the right triangle ACB by Pythagoras:

(9)

Solving equations (8) and (9) simultaneously gives:

(10)

and

(11)

Then, by ratios:

(12)

(13)

(14)

If the circuit has no reactance, then VCi = 0 and:

(15)

MEASUREMENT OF OPEN CIRCUIT VOLTAGE GAIN:

The input circuit is left connected as shown in figure 2, but the amplifier output terminalsare left open circuited (RL = 4). The open circuit output voltage Vo(oc) and the input voltage aremeasured using a high impedance voltmeter. The same value of Vi as used for measuring theinput impedance should be used to simplify the measurements. Now the open circuit voltage gainbecomes:

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(16)

which is usually stated in decibels as:

(17)

MEASUREMENT OF OUTPUT RESISTANCE AND LOADED VOLTAGE GAIN:

Leave the circuit adjusted as for measuring AVo , but place a load resistor RL across theamplifier output terminals. RL should be chosen to have a value with the same order ofmagnitude as RO to reduce measurement errors. (If RL =RO then VL will be one half of VO(oc).Now measure the loaded output voltage VL and the input voltage Vi, the value of RL, andcalculate the loaded voltage gain as:

(18)

which is usually stated in decibels as:

(19)

The output resistance is calculated using Kirchoff’s Voltage Law and Ohm’s Law as:

(20)

(21)

(22)

which combine to give:

(23)

FREQUENCY RESPONSE:

Reactive elements in the amplifier circuit, load and source can make any or all of theamplifier parameters vary with frequency, in which case Ri, Ro, Avo, and Aisc all become complexquantities (Zi(f), Zo(f), Avo(f), Aisc(f)) which change in both magnitude and phase shift withfrequency.

A complex representation of the amplifier will include plots of all four quantities in bothmagnitude and phase shift plotted against frequency. Gain magnitudes are plotted in decibel (dB)

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quantities on the linear vertical axis, phase shift is plotted directly below the magnitude in eitherdegrees or radians on the linear vertical axis, while frequency is plotted in Hertz on a horizontallogarithmic scale (semi-log paper) spanning several decades of frequency. Impedance inmagnitude (S) may be plotted on either linear or logarithmic vertical axis with its phase shiftbelow with frequency on the logarithmic horizontal axis.

EQUIPMENT:

Oscilloscope+12 volt power supplydigital multimeterfunction generatorblack box amplifierstep attenuatorresistors or potentiometers as required

PROCEDURE:

1) Set up the amplifier as shown in figure 2, initially omitting RL .Apply power to theamplifier as required. Use an initial value of R2 = 1K ohm. Monitor the output voltage Vo (oc)with an oscilloscope and set the function generator amplitude to give an output voltage of 1.0volt peak to peak measured at the amplifier output terminals. If the output waveform is distorted,reduce the function generator voltage until no distortion is present.

2) Next check voltages Vi and V2 and adjust the value of R2 to give a ratio of R2 / Ri nearunity (V2 = Vi) with no output distortion. If there is distortion reduce VS.

3) Now chose a value of RL which will reduce the output voltage to one half of the opencircuit voltage.

4) Measure and record values of RL, and R2 which were just set.

5) With R2 in place measure and record the open circuit (no load) conditions VS, Vi, V2,and Vo(oc).

6) Replace RL in the circuit, ensure that Vi has not changed. Measure Vi, and VL.

7) Measure Vi, and Vo(oc) with RL removed at each of the following frequencies:20, 50, 100, 200, 500, 1K, 2K, 5K, 10K, 20K, 50K, 100K, 200K, 500K, 1M (Hz).

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RESULTS:

1) Calculate values of Ri, Ro, Avo and Aisc at 1Khz. Put all measurements and calculationsin table form.

2) For the measurements of step 7, find the voltage gain in dB at each frequency, and plotagainst frequency on 5 cycle semi-log graph paper. Mark the frequencies at whichAvo(dB) drops 3dB from its highest value at either end of the spectrum. The range offrequencies contained in between these two -3dB points is the amplifiers band width.

3) Comment on the accuracy of the measurement method and what affects it.

4) What range of frequencies will your amplifier pass without serious attenuation?

5) Any questions raised in the various steps of the experiment should be answered withunambiguous indication of which answer pertains to which question. The brief answersmust include your reasoning ( support your answer ).

6) Conclusions ( clearly stated ).