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System-Level Thermal Simulation

FTF-SDS-F0027

A P R . 2 0 1 4

Torsten Hauck | Manager, Thermal and Mechanical Simulation

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Session Introduction

• Freescale works closely with customers to assess thermal

management solutions for customer systems. This presentation

provides an overview of system-level thermal modeling and

simulation.

• Presented by Torsten Hauck, manager of Thermal and Mechanical

Simulation for Package Solutions Development at Freescale

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Session Objectives

• After completing this session you will be able to:

− Identify different types of thermal device models and their usage for

prediction of maximum chip temperatures in devices.

− Understand thermal impedance curves for evaluation of devices running

at transient operating conditions.

− Understand JEDEC thermal performance ratings usage for thermal

evaluation of package solutions.

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Agenda

• Joule Heating and Heat Transfer Mechanisms

• Heat Transfer Mechanisms

• Heat Diffusion Equation

• Electro-Thermal Analogy

• Thermal Spice Models

• Coupling of Electrical and Thermal Domains

• Thermal Runaway

• Package Thermal Performance Ratings

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Joule Heating in Electronic Devices

• In 1840, Joule published the statement that the amount

of heat per second that developed in a wire carrying a

current is proportional to the electric resistance of the

wire and square of the current.

James Prescott Joule

(1818-1889)

IR Image of an operating circuit board

Heat rate in a power line

2iQQ power density [W / m³]

i current density [A / m²]

resistivity [ m]

RIP 2

Heat rate in a component P power [W]

I current [A]

R resistance []

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Modes of Heat Transfer

Let the water be analogous to heat, and let the people be analogous to the heat transfer medium. Then:

Case 1: The hose directs water from W to B independently of the medium. This is analogous to thermal radiation in a vacuum or in most gases.

Case 2: In the bucket brigade, water goes from W to B through the medium. This is analogous to conduction.

Case 3: A single runner, representing the medium, carries water from w to B. This is analogous to convection.

J. H. Lienhard, 2001

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Heat Conduction

When there exists a temperature gradient

within a body, heat energy will flow from

the region of high temperature to the

region of low temperature.

Jean Baptiste Joseph Baron de Fourier

(1768-1830)

q

Wall

T1 T0

01 TT

x

Tkq

d

d

q heat flux [W / m²] temperature gradient [°C / m] k thermal conductivity [W / (m°C)] x

T

d

d

Fourier’s Law

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Thermal Conductivity

Material

k

W/m oC

Polyimide (Kapton H) 0.155

Acrylic Adhesive 0.16

RTV Silicone 0.22

Copper Alloy - 110 390.8

Air T=350 K 0.03003

glass-filled PBT 0.22

"Pure" Aluminum 204.0

Alum. Alloy - 1100 221.5

Alum. Alloy - 2024 189.0

Alum. Alloy - 380 100.4

SAE 1010 Steel 58.8

polypropylene 0.196

Solder 96.5Sn/3.5Ag 76.4

Solder 10Sn/88Pb/2Ag 37.0

Solder 62Sn/36Pb/2Ag 60.4

Al2O3 20.5

Silicon 115.0

J. H. Lienhard, 2001

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Heat Convection

In 1701, Isaac Newton considered the

convection process and suggested

that cooling would be such that

Sir Isaac Newton

(1642 - 1727)

Newton’s Law

)( S TThq

q heat flux [W / m²]

TS surface temperature [°C]

T fluid temperature [°C]

h film coefficient [W / (m² °C)]

)(d

d TT

t

TS

S

y

u

x u 0

t

x

T TS T

y

u fluid velocity [m / s]

boundary layer [m]

T temperature [°C]

t temperature

boundary layer [m]

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Convection Film Coefficient

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• The energy radiated by a blackbody radiator per second per unit area is proportional to the fourth power of the absolute temperature.

Thermal Radiation

Radiation exchange between a surface and large surroundings

4

STq Stefan–Boltzmann constant

5.67·10-8 W / (m² K4)

TS surface temperature [°C]

44

surS TTq surface emissivity

(=1 for black body)

hrad equivalent film

coefficient surSrad TThq

surSSurSrad TTTTh 22

Joseph Stefan

(1835-1893)

Ludwig Boltzmann

(1844-1906)

q

Surroundings

Tsur

TS

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Surface Emissivity

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1-D Heat Conduction in Solid

s

k, c, 0°C

x

q

01

2

2

x

T

t

T

s

nxe

ksqxtT n

n

n

n

ntn

2

12,)1(

sin)1(

2),(

1

)1(

2

2

Heat diffusion equation power step

thermal diffusivity [m² / s] k conductivity [W / m / K] density [kg / m³] c specific heat [Ws / K]

heat flux [W / m²]

Temperature Response

Power Step

A

Pq

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Temperature Response

0.0 0.2 0.4 0.6 0.8 1.0

2

4

6

8

10

12

10 6 10 5 10 4 0.001 0.01 0.1 1

2

4

6

8

10

12

x / mm time / mm

tem

pera

ture

/

°C

tem

pera

ture

/

°C

• temperature increases as the heat is

penetrating the solid

• temperature rise is a function of time

• when thermal equilibrium is reached the

temperature distribution is linear and over

thickness and does no longer change

transient

steady state

T1

1mm thick silicon

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Electrical Domain Thermal Domain

Through

Variable Current I

Amperes or

Coulombs/s

Power or

Heat Flux PD

Watts or

Joules/s

Across

Variable Voltage V Volts Temperature T ºC or K

Resistance Electrical

Resistance R Ohms

Thermal

Resistance RΘAB

ºC/W or

K/W

Capacitance Electrical

Capacitance C

Farads or

Coulombs/V

Thermal

Capacitance CΘ

Joules/ºC or

W.s/°C

Cθ C

• Analog circuit simulator

can be used for solving the

heat transfer equation.

Thermo-Electric Analogy

RAB

R

Thermal DomainElectrical Domain

VA

VB

TA

TB

current power

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Thermo-Electric Analogy

22

2

1

1

1,

)1(2,)1()(

nn

n

n

n

n

n

CR

t

nR

CkV

ReRPtT nn

P T1

thermal resistance heating power A

Pq

thermal capacitance

Analog Circuit Simulator

Time /s

Te

mp

era

ture

/ °

C

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Heat Transfer in Printed Circuit Board Assembly

0.01

0.1

1

10

100

0.001 0.1 10 1000

Therm

al Im

ped

ance

(Junction to A

mbie

nt)

[°C

/W]

Time [s]

on thermal test board 2s2p

Thermal impedance

Thermal resistance

Temperature

prediction

P

TtTtZ

AJth

)()(

JAthZ )(

temperature rise at 1 W

at steady state

temperature rise at 1 W

after 100 ms

AthJ TtZPtT )()(

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External Use 17

Thermal Impedance Curve Fit

0 .1 1 0 1 0 0 0

0 .1

0 .2

0 .5

1 .0

2 .0

5 .0

1 0 .0

0 .1 1 0 1 0 0 0

0 .0 5

0 .1 0

0 .5 0

1 .0 0

5 .0 0

1 0 .0 0

882211 111 821CRt

CRt

CRt

eReReRZthF

i Ri (°C/W) Ci (Ws/°C)

1 0.059444 0.024318

2 0.148191 0.39228

3 0.791593 0.515461

4 1.457584 1.412879

5 2.39196 3.40021

6 2.398542 10.99588

7 5.806863 35.43984

8 3.851088 109.1318

thermal

impedance

curve

nonlinear fit

of an 8th order Foster model

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External Use 18

Foster and Cauer Circuit Models

88

8

22

2

11

1

ˆˆ1

ˆ

ˆˆ1

ˆ

ˆˆ1

ˆ

CRs

R

CRs

R

CRs

RZthF

88

2

2

1

1

1

1

1

1

1

1

RsC

R

sC

R

sC

ZthC

Foster

Cauer

Foster can always be transformed into an equivalent Cauer model

Laplace domain

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Forster – Cauer Model Conversion Algorithm

)(

1

1

)(D

)(N)(

1

n

n

sZRsC

s

ssZ

nnn

n

)(/)(1

)(N

)(D

n

nsNsrem

RsC

s

snn

nn

nn Rsrems )()(N 1-n

)()(1

)(D 1-n sremsNR

s nnn

)(

)()(Z

1

11-n

sD

sNs

n

n

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Transformation of Equivalent Circuits contd.

Foster Cauer

i Ri Ci i Ri Ci

1 0.059444 0.024318 1 0.076668 0.021395

2 0.148191 0.39228 2 0.640424 0.161112

3 0.791593 0.515461 3 1.469715 0.221559

4 1.457584 1.412879 4 2.49764 0.837544

5 2.39196 3.40021 5 2.757703 2.759452

6 2.398542 10.99588 6 2.896646 10.73522

7 5.806863 35.43984 7 5.865401 22.8008

8 3.851088 109.1318 8 0.701067 512.1984

Foster and Cauer show identical behavior in junction step response

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Advantage of Cauer Circuit

Model partitioning into PQFN component and PCB subcircuits possible with

Cauer, but not with Foster model.

PQFN PCB

TPCB

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Model Partitioning

.SUBCKT PCB In Out GND

R_6 In 1 2.89665

R_7 1 2 5.8654

R_8 3 Out 0.701067

C_6 5 GND 10.7352

C_7 6 GND 22.8008

C_8 7 GND 512.198

.ENDS

.SUBCKT PQFN In Out GND

R_1 In 1 0.0766684

R_2 1 2 0.640424

R_3 2 3 1.46971

R_4 3 4 2.49764

R_5 4 Out 2.7577

C_1 J GND 0.0213946

C_2 1 GND 0.161112

C_3 2 GND 0.221559

C_4 3 GND 0.837544

C_5 4 GND 2.75945

.ENDS

PQFN

TPCB

PCB IN IN

OUT

GND GND

OUT P(t)

1 2

0

TA

0

Tj

3

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Step Response

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Pulse Response

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Joule Heating in Power Switch

• Drain-source current causes Joule heating in the

transistor channel

• Thermal management is required to keep the

maximum chip temperature below technology limits

switching an light bulb drain-source current

Quad MOSFET

Transistor 1 active

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Solid Model

ANSYS Design Modeler Model Order Reduction

Circuit Model

ANSYS Mechanical

Finite Element Model

SPICE Netlist

S1 S2 S3 S4 S5

GND

3-D Thermal Circuit Model

• Thermal circuit models are based on the analogy between heat transfer and current flow equations.

• Circuit model is extracted from ANSYS solid model of the package assembly by means of a mathematical Model Order Reduction algorithm.

• The new algorithm automatically generates a SPICE netlist that can be used with standard analog circuit simulators for simulation of transient operating conditions and prediction of chip temperatures.

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Order Reduction by Matching of Moments

i Ri

°C/W

Ci

J/°C

1 1 1

2 2 2

3 3 3

4 4 4

, mi = 10, -100, 1300, -18700, 282340, -4373500, 68711380, ...

• Match the first four moments of the 4th order with those of a two order RC line (Padé approximation)

432

32

4576820273301

1200103020010)(

ssss

ssss

G

i Ri

°C/W

Ci

J/°C

1 4.54545 0.88

2 5.45455 2.75

)1)(1(

)()(

2211

2121212

sRCsRC

sCCRRRRs

G

)1)(1(

)(

2211

21212133

2210

sRCsRC

sCCRRRRsmsmsmm

0

))(

))(

))(

)()(

)(

52121

42121222113

321211221123

221210221112

2121221101

210

sCCRR

sCCRRmCRCRm

sCCRRmCRCRmm

sCCRRmCRCRmm

sCCRRCRCRmm

RRm

0))(

0))(

0)()(

0)(

21211221123

21210221112

2121221101

210

CCRRmCRCRmm

CCRRmCRCRmm

CCRRCRCRmm

RRm

2260191

9010)(

ss

ss

G

, mi = 10, -100, 1300, -18700, 277330, -4156700, 621493 0, ...

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RC Line Step Response

error smaller than 2%

4th order original model

3rd order Padé approximation

2nd order Padé approximation

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Spice Model Generation

from Reduced Order Model

so

urc

e 1

So

urc

e 2

dra

in

nRRRr

T 111 ,,,21

DiagUAU

zCT

pBzAzE

J

jrrr

IUEU rT

capacitance

matrix Load input

matrix

output matrix

Diagonalization thermal capacitors

thermal resistors

• The evolution of each state variable is represented by one RC cell.

Input and output matrices are realized by controlled sources.

Current dependent

current source

SPICE Model : Active components

Voltage dependent

voltage source

conductivity

matrix

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External Use 30

A system matrix

B input matrix

C output matrix

x internal state vector

u power inputs

T temperature outputs

1,2,…, n thermal I/Os

flow value is heating power

potential value is temperature

Subcircuit instantiation

X1 n1 n2 n3 n4 n5 … n circuit

• Compact model is automatically extracted from ANSYS finite element mesh by Matching of Moments

• Choose state space or thermal circuit representation output

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External Use 31

Thermal Domain

Electrical Domain

coupling

125°C

• System simulation done with LTSPICE using the circuit model option

• Electro-thermal coupling on system level

• Channel resistance R3=0.008*(1.5+0.005*V(n3_th))

• Heating Power P3=I(I3)*V(n3_el)

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External Use 32

• Temperature response considers self heating in FET

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External Use 33

Thermal Runaway

)( 00 TTkRR JDSon

DSonRIP 2

PTTdt

dTT AJ

JAAJ

JA

1

tkI

A

tkI

JA

AJAJ

JAJA

eTekI

TTkRIT

22 11

200

2

11

kI

JA

cr

1

Critical Current

Icr

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External Use 34

Package Thermal Performance Ratings

CAJCBAJB

CAJCBAJBJA

))((

CAJCBAJB

JCBAJBJT

)(

2P

TT CJJC

P1

P2

21 PPP

junction to case

junction to top

junction to ambient

1P

TT CJJB

junction to board

case to ambient

2P

TT ACCA

board to ambient

1P

TT ABBA

P

TT AJJA

P

TT CJJT

assembly

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External Use 36

Steady State Thermal Resistance

P

TT AJJA

P

TT TJJT

T

T

JT physical interpretation difficult, carefully to use !

JA useful to predict junction temperature rise at steady state

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External Use 37

P

TT CJJC

Θ

Junction-to-Case

Resistance Analysis Tech

Test Method Standard Microcircuits Method 1012.1 Thermal Characteristics, MIL-STD-883E

• Junction-to-Case thermal resistance, JC , is determined using a

cold plate method with the thermocouple embedded in the cold

plate.

Cold plate

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External Use 38

Integrated Circuits Thermal Test Method ENVIRONMENTAL

CONDITIONS - JUNCTION-TO-BOARD, JESD51-8

• Junction-to-Board thermal resistance, JB , is determined using a ring cold

plate.

• Two-resistor

compact model

can be determined with JC and JB and is used in system simulations.

Junction-to-Board

Resistance P

TT BJJB

Ring cold plate

TJunction TBoard TCase

JC JB

Analysis Tech

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External Use 39

Junction Temperature Estimates

Steady State

AJAJ TPT

CAJCBAJB

CAJCBAJBJA

))((

P1

P2

21 PPP

)()( BAJBCAJC

021 PPP

BJBJ TPT

)()( BAJBCAJC

PPP 21 ,0

AHSTIMJCJ TPT )(

sealed enclosures, board

temperature dominates

heat sink attachment,

include thermal resistance

of thermal interface

material and heat sink

2-D heat flow

1-D heat flows

chip temperature

depends on printed

circuit board

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External Use 40

Thermal Resistance Data: SOIC-EP 32L

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