Sub-NyquistReconstruction

Characterization PresentationWinter 2010/2011

By:

Yousef Badran

Supervisors:

Asaf ElronIna Rivkin

TechnionIsrael Institute of Technology

Project Overview

• Part of the Modulated Wideband Converter project cluster.– A system for sub-Nyquist sampling of multiband

signals.• Sub-module of the reconstruction block. • To be implemented on a card consisting of 4

Altera Stratix III FPGAs, using a single FPGA.

Project Block Diagram

Input and Output

Input:Sequences z[n] representing spectrum slices

At most N sequences, one per slice

Spectral support slices s B

nt

lBtjl thetxnz

|)())((][ 2

Problem:Spectral support and carrier frequencies of bands are unknown.A single slice may contain more than one band (at most N/2).A single band might be divided between two slices.

Input and Output

Output:• A sequence of vectors, one per spectral slice.• Each vector describes energy distribution in the slice; areas in the slice that

hold energy.• Requires high resolution vectors.

OR

• A sequence of numbers, at most N/2 pairs of numbers per spectral slice.• Each pair of numbers describes the beginning and end of energy in a slice.

Requirements and Resources

Requirements– 18-bit fixed-point representation. – Fit VHDL implementation on Altera Stratix III FPGA

EP3SE260.

Resources—Reference floating-point MATLAB implementation.—Memory: 2.5 GB in 3 banks.

Resources (cont.)

Mathematical Tools

Project WorkflowAlgorithm

• Resources & requirements• Understand theory and reference implementation• Propose alternative and equivalent calculation

MATLAB

• Floating-point representation• 18-bit fixed point representation• Possible C implementation

• Find implementations of required mathematical operations in VHDL• Implement missing tools in VHDL

VHDL Design

• Creating a block diagram• Designing the system in VHDL

Design Simulation

• ModelSim• Creat testbench for each VHDL design• Simulations

Synthesis

• Synthesis • Timing simulations using Altera Stratix III libraries

Gantt Chart

Algorithm

MATLAB

Mathmatical Tools

VHDL Design

Design Simulation

Synthesis

8/10/2010 9/29/2010 11/18/2010 1/7/2011 2/26/2011 4/17/2011

Thank you!