Solid-State Electronics 83 (2013) 66–70

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Solid-State Electronics

journal homepage: www.elsevier .com/locate /sse

Strained germanium–tin (GeSn) p-channel metal-oxide-semiconductorfield-effect-transistors (p-MOSFETs) with ammonium sulfide passivation

Lanxiang Wang a, Shaojian Su b, Wei Wang a, Xiao Gong a, Yue Yang a, Pengfei Guo a, Guangze Zhang b,Chunlai Xue b, Buwen Cheng b, Genquan Han a,⇑, Yee-Chia Yeo a,⇑a Department of Electrical and Computer Engineering, and NUS Graduate School of Integrative Sciences and Engineering (NGS), National University of Singapore, Singapore117576, Singaporeb State Key Laboratory on Integrated Optoelectronics, Institute of Semiconductors, Chinese Academy of Sciences, Beijing 100083, China

a r t i c l e i n f o a b s t r a c t

Article history:Available online 28 February 2013

Keywords:High-mobilityGermanium–tinSurface passivationMetal-oxide-semiconductor field-effecttransistor (MOSFET)

0038-1101/$ - see front matter � 2013 Elsevier Ltd. Ahttp://dx.doi.org/10.1016/j.sse.2013.01.031

⇑ Corresponding authors. Address: DepartmentEngineering, National University of Singapore, 10 KSingapore. Tel./fax: +65 6516 1589 (G. Han), tel.: +61103 (Y.-C. Yeo).

E-mail addresses: hangenquan@ieee.org (G. Han),

High-mobility strained Ge0.958Sn0.042 p-channel metal-oxide-semiconductor field-effect-transistors (p-MOSFETs) with ammonium sulfide [(NH4)2S] surface passivation were demonstrated. A �10 nm thickfully-strained single crystalline GeSn layer was epitaxially grown on Ge (100) substrate as the channellayer. (NH4)2S surface passivation was performed for the GeSn surface, followed by gate stack formation.Ge0.958Sn0.042 p-MOSFETs with (NH4)2S passivation show decent electrical characteristics and a peakeffective mobility of 509 cm2/V s, which is the highest reported peak mobility obtained for GeSn channelp-MOSFETs so far.

� 2013 Elsevier Ltd. All rights reserved.

1. Introduction

Germanium (Ge) has high carrier mobilities and is an attractivealternative channel material for replacement of strained-Si in highperformance logic applications. Excellent drive current was dem-onstrated by Ge p-channel metal-oxide-semiconductor field-effecttransistors (p-MOSFETs) [1]. To fully exploit the superior transportproperties in high-mobility MOSFETs, high-quality and thermody-namically stable gate stack with good interfacial properties is re-quired. Pre-gate passivation techniques have been one of themost important ways to boost the performance of Ge channel tran-sistors in recent studies [2–19], such as nitridation [2–6], Si passiv-ation [6–10], sulfur passivation [12–14], and GeOx (1 < x 6 2)interfacial layer passivation by direct oxidation [15], plasma postoxidation [16,17], and high-pressure oxidation followed by low-temperature oxygen annealing [18,19].

Recently, the germanium–tin (GeSn) alloys have gained re-search interest as the channel materials for future CMOS transis-tors [20–23]. Sau and Cohen reported the use of strain and theincorporation of Sn in Ge to enhance carrier mobilities [20]. GeSnp-MOSFETs with low-temperature Si passivation between a high-k gate dielectric and the GeSn channel [21] (cleaned using HF:HCl[22]) were demonstrated to have a higher effective hole mobility

ll rights reserved.

of Electrical and Computerent Ridge Crescent, 119260,5 6516 2298; fax: +65 6779

yeo@ieee.org (Y.-C. Yeo).

than Ge control p-MOSFETs. GeSn n-MOSFETs with GeSnO2 interfa-cial layer passivation was also demonstrated [23]. Among these re-cent reports of GeSn p-MOSFETs, Si passivation scheme of GeSngives superior electrical characteristics. Ge0.947Sn0.053 p-MOSFETswith Si passivation achieve 55% higher mobility as compared toGe control devices in the high field regime [21]. However, morepassivation techniques, which are compatible and can be easilyintegrated with a mature high-k gate dielectric process module,should be investigated.

In this work, we report a study of (NH4)2S passivated strainedGe0.958Sn0.042 p-MOSFETs with self-aligned metallic source-and-drain (S/D). The self-aligned metallic S/D are made of Ni stano-germanide [Ni(GeSn)]. The devices with (NH4)2S surface passiv-ation show decent electrical characteristics. A peak effectivemobility of 509 cm2/V s was demonstrated.

2. Material characterization

Equilibrium solid solubility of Sn in the Ge1�xSnx system is ex-tremely low and is typically less than 1% [24]. An additional obsta-cle to be overcome in the epitaxial growth of Ge1�xSnx alloys on Geis that the mismatch in lattice constant, particularly when x islarge. The lattice mismatch between Sn (ao = 6.4892 Å) and Ge(ao = 5.6579 Å) is 14.7%. Furthermore, Sn is a very large atom andhas a strong tendency to segregate in Ge. The Ge1�xSnx alloys aremetastable. Despite these difficulties, significant efforts have beenmade in growing GeSn alloys using molecular beam epitaxy (MBE)[25,26] and chemical vapor deposition (CVD) [27–30].

Ge0.958Sn0.042

Ge(100) 50 nm

(a) (b)

Ge0.958Sn0.042

Ge(100)

5 nm

Fig. 1. (a) Cross-sectional TEM image of �140 nm thick epitaxial GeSn film grown on Ge (100) substrate. (b) High-resolution TEM image shows periodic arrangement ofatoms across the defect free interface between GeSn and Ge.

0

5

10

02

46

810

02

46

810

RMS Roughness = 0.26 nm

(µm)

(nm)

(µm)

(a) (b)

65 66

XR

D I

nten

sity

(a.

u.)

2θ (degree)

Strained Ge0.958

Sn0.042

on Ge(100)

(004)

Fig. 2. (a) High-resolution XRD (004) curve shows that GeSn film has a substitutional Sn composition of 4.2% and is fully strained to Ge (100) substrate. (b) AFM image of theGeSn film surface showing a RMS roughness of 0.26 nm within a scanning area of 10 lm � 10 lm.

L. Wang et al. / Solid-State Electronics 83 (2013) 66–70 67

GeSn films in this work were epitaxially grown on 4-in. n-typearsenic (As) doped Ge (100) substrates at a temperature of 180 �C.A custom-made solid source MBE (SSMBE) system was used [26].The base pressure of the growth chamber is 3 � 10�8 Pa.99.9999% pure Ge and 99.9999% pure Sn were used as Ge and Snsources, respectively. The as-grown GeSn films are p-type withan unintentional doing concentration is �5 � 1016 cm�3, as ob-tained by Hall measurement. Fig. 1a shows the cross-sectionaltransmission electron microscopy (XTEM) image of a �140 nmthick GeSn film on Ge (100) substrate. Fig. 1b shows high-qualitysingle crystalline GeSn film. No observable defects were obtainedby high-resolution TEM (HRTEM) near the GeSn/Ge interface. Cal-culations using the high-resolution X-ray diffraction (HRXRD)

10 nmGe(100)

Ge0.958Sn0.042

(a)Fig. 3. (a) Cross-sectional TEM image of �10 nm thick epitaxial GeSn film grown on Ge (on Ge substrate.

curves in Fig. 2a demonstrate that the substitutional Sn composi-tion is �4.2% (assuming Vegard’s law with no bowing parameter)and the GeSn film is fully strained. Atomic force microscopy(AFM) image in Fig. 2b shows a very smooth GeSn surface with aroot mean square (RMS) roughness of only 0.26 nm within a scan-ning area of 10 lm � 10 lm.

3. Fabrication of Ge0.958Sn0.042 p-MOSFETs with (NH4)2Spassivation

A �10 nm thick Ge0.958Sn0.042 film was grown on n-type Ge sub-strate for strained GeSn channel p-MOSFET fabrication. TEM imageof the Ge0.958Sn0.042/Ge sample is shown in Fig. 3a. The HRTEM

5 nmGe(100)

Ge0.958Sn0.042

(b)100) substrate. (b) High-resolution TEM image shows a high-quality GeSn thin film

Process Flow for GeSn pMOSFET Fabrication

Epitaxial Growth of GeSn by MBE

Surface Cleaning Using DHF and DI water

Gate Patterning and Etching

Ni Deposition and Ni(GeSn) Formation SiO2 Deposition and Active Region Opening

Selective Removal of Ni using H2SO4

(NH4)2S Passivation ALD Al2O3 Deposition

Phosphorus Well Implant and Activation

TaN Deposition by Sputter

Fig. 4. Key process steps for fabricating (NH4)2S passivated Ge0.958Sn0.042 p-MOSFETs.

68 L. Wang et al. / Solid-State Electronics 83 (2013) 66–70

image in Fig. 3b shows the defect-free interface between high-quality Ge0.958Sn0.042 film and Ge substrate. Fig. 4 illustrates thekey process steps for fabricating Ge0.958Sn0.042 p-MOSFETs, with a(NH4)2S passivation step.

After material growth, phosphorus well implantation was con-ducted with a dose of 5 � 1012 cm�2 and an implant energy of20 keV. A rapid thermal annealing (RTA) process at 450 �C for3 min in N2 ambient was used for well implant activation. Pre-gate

GeSn

Gate

Ni(GeSn)

Ge(100)

(NH4)2S passivatedinterface

Ni(GeSn

(a)Fig. 5. (a) The schematic of a Ge0.958Sn0.042 p-MOSFET with (NH4)2S passiv

-2 -1 0

10-8

10-7

10-6

10-5

220

mV

/decade

VDS

= - 0.5 V

Dra

in C

urre

nt |I

DS| (

A/μ

m)

Gate Voltage VGS

(V)

VDS

= - 0.05 V

LG = 5.5 μm

W = 100

(a)

μm

Fig. 6. (a) The IDS–VGS transfer characteristics of a Ge0.958Sn0.042 p-MOSFET with (NH

cleaning process was carried out using 1:50 dilute hydrochloricacid (DHF) and deionized water for a couple of circles for nativeoxide removal. Surface passivation was then carried out using(NH4)2S solution. The (NH4)2S treatment time is 10 min at roomtemperature (�25 �C). The samples were then quickly loaded intothe atomic layer deposition (ALD) system for growing �5 nm thickAl2O3 (EOT = 2.5 nm) as the gate dielectric, followed by reactivesputter deposition of tantalum nitride (TaN) to form the gate elec-trode. After gate lithography and gate etch using a Cl2-based plas-ma process, self-aligned Ni(GeSn) metallic source-and-drain (S/D)[31] were formed by depositing 10 nm Ni, followed by a RTA pro-cess at 350 �C for 30 s in N2 ambient. Selective removal of the unre-acted Ni using H2SO4 completes the device fabrication. Fig. 5adepicts the schematic of a (NH4)2S surface passivated Ge0.958Sn0.042

p-MOSFET with self-aligned Ni(GeSn) metallic S/D. Fig. 5b shows atop-view scanning electron microscopy (SEM) image of the fabri-cated transistor.

4. Results and discussion

Fig. 6a plots the IDS–VGS transfer characteristics in the linear(VDS = �50 mV) and saturation (VDS = �0.50 V) regions of a typical

) Sour

ceGate

Dra

in

50 μm

SiO2

(b)ated interface. (b) A top-view SEM image of the fabricated transistor.

(b)

-1.0 -0.5 0.00

5

10

15

VGS

-VTH

= 0 ~ - 1 V

Step = - 0.2 V

Dra

in C

urre

nt |I

DS| (

μA/ μ

m)

Drain Voltage VDS

(V)

4)2S passivation. (b) The IDS–VDS output characteristics of the same GeSn device.

-2.0 -1.5 -1.0 -0.5 0.0 0.5

10-15

10-14

10-13

10-12

10-11

Gat

e L

eaka

ge |I

GS

| (A

/cm

2 )

VDS

= - 0.05 V

VDS

= - 0.5 V

Gate Voltage VGS

(V)

Fig. 7. The measured gate leakage current |IGS| on the same transistor as shown inFig. 6, with gate voltage VGS between �2 V and 0.5 V.

0 5 10 15 200

100

200

300

400

500

600Ge

0.947Sn

0.053 with Si

Passivation (Ref. [21])

Density of Charge Qinv (1012/cm-2)

Eff

ecti

ve M

obili

ty μeff(c

m2 /V

s)

Ge0.958

Sn0.042

with

(NH4)

2S Passivation

Fig. 8. Comparison of effective hole mobility between the GeSn p-MOSFET with(NH4)2S passivation (this work) and the one with low-temperature Si passivation(Ref. [21]).

0

100

200

300

400

500

600

3 % Sn5.3 % Sn

HF

:HC

l

Si p

assi

vati

on

( NH

4) 2S pa

ssiv

atio

n

Pea

k E

ffec

tive

Mob

ility

(cm

2 /V s

)

Ref. [22]This work Ref. [21]

4.2 % Sn

Fig. 9. Comparison of peak effective mobility for GeSn p-MOSFETs with differentpassivation techniques. (NH4)2S passivation gives high peak hole mobility (at lowinversion charge density).

L. Wang et al. / Solid-State Electronics 83 (2013) 66–70 69

Ge0.958Sn0.042 p-MOSFET with (NH4)2S passivation. The gate length(LG) and gate width (W) are 5.5 lm and 100 lm, respectively. Asubthreshold swing (S) of 220 mV/decade is obtained. The IDS–VDS

output characteristics of the same device are shown in Fig. 6b.The gate voltage (VGS) is varied from gate overdrive VGS–VTH of 0to �1.0 V in steps of �0.2 V. The device exhibits good saturationand pinch-off characteristics. Fig. 7 shows very low gate leakagecurrent (|IGS|) measured on the same transistor as shown inFig. 6, with VGS between �2 V and 0.5 V. Further improvement ofthe drive current performance can be achieved through reductionof the equivalent-oxide thickness (EOT) and reduction of the seriesresistance.

By using the total resistance slope based approach [32], theeffective hole mobility (leff) was extracted. Fig. 8 compares theeffective hole mobility versus inversion charge density for thestrained Ge0.958Sn0.042 p-MOSFET with (NH4)2S passivation andthe one with low-temperature Si passivation [21]. A peak mobilityof 509 cm2/V s is achieved in Ge0.958Sn0.042 p-MOSFET with (NH4)2Spassivation, which is the highest reported peak mobility obtainedfor GeSn channel p-MOSFETs so far [21,22]. However, the mobilitydegrades rapidly with increasing charge density, leading to smallermobility in the high field as compared with the one with Si passiv-ation. We benchmark the peak effective hole mobility in this work

with the GeSn channel p-MOSFETs with those of other passivationtechniques reported so far [21,22] as shown in Fig. 9. StrainedGe0.958Sn0.042 p-MOSFETs with a (NH4)2S passivation step demon-strate a higher peak hole mobility as compared with other reportedGeSn devices.

It should be noted that hole mobility peaks at relatively lowQinv, and what is more important for achieving high drive currentin field-effect transistors is the realization of high mobility at higheffective vertical field or high Qinv. For the (NH4)2S passivatedGe0.958Sn0.042 p-MOSFET, the mobility at high Qinv is rather low.We speculate that the interface trap density (Dit) is still high nearthe valence band (EV) edge, so that the traps would be filled orcharged when the transistor is biased in the strong inversion re-gion. This may explain the rapid drop of mobility with increasingQinv in Fig. 8. For further investigation, an in-depth analysis ofinterface trap density energy distribution across the GeSn bandgapcould be conducted. The energy distribution of Dit could be deter-mined by frequency-dependent full conductance method [33,34],and to probe the Dit near the valence band edge, measurement atlow temperatures (e.g. 77 K) would be needed.

5. Conclusion

High mobility strained Ge0.958Sn0.042 p-MOSFETs with pre-gate(NH4)2S passivation of the Ge0.958Sn0.042 surface show decenttransfer and output characteristics. Ge0.958Sn0.042 p-MOSFETs dem-onstrate have a higher peak mobility in comparison with those ofother GeSn p-MOSFETs reported [21,22]. However, the mobilityat high inversion charge density is still lower than that of low-tem-perature Si passivated GeSn p-MOSFETs.

Acknowledgements

B. Cheng and C. Xue acknowledge support from Grant Nos.61036003, 61176013, and 61177038, respectively, from the Na-tional Natural Science Foundation of China. Y.-C. Yeo acknowledgessupport from the National Research Foundation under Grant NRF-RF2008-09.

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