Stan Durkin EMU Meeting, Purdue Univ. Oct. 6, 2006 1

VCC Hardware Production StatusVCC Hardware Production StatusVCC Hardware Production StatusVCC Hardware Production Status

Firmware compile issues delayed testing and burn-in.

Last 15 boards passed pre-burn-in testing

Post burn-in testing in progress.

LocationCERN OSU RICE Florida Total

Total 50 23 1 1 75

Disposition

In Per. Crate ? --- --- --- ?

Test Setups ? 2 1 1 4+

Waiting for BGA Replacement

--- 2 --- --- 2

Post Burn-in Testing --- 15 --- --- 15

Ready to Ship --- 4 --- --- 4

Production VCC Locations and Dispositions

Stan Durkin EMU Meeting, Purdue Univ. Oct. 6, 2006 2

VME Crate Controller IssuesVME Crate Controller IssuesVME Crate Controller IssuesVME Crate Controller Issues

User reported firmware issues are resolved by combination of: Replacing 1.5V power inductor with short (Vcore tolerance issue). Installing service pack 2 and recompiling with ISE 8.202i. Saving correct user configuration settings for power up in Flash mem. Resolving driver conflicts with multiple NICs.

However new issues have come up in new compiles (with no logic changes) DCM’s failing to lock or loosing lock before power-on startup finishes. Internal FPGA timing issues with a few (not all) boards even though the

compile passed all timing constraints (like missing data or double data on some VME reads).

Stan Durkin EMU Meeting, Purdue Univ. Oct. 6, 2006 3

VCC: Addressing the IssuesVCC: Addressing the Issues VCC: Addressing the IssuesVCC: Addressing the Issues

DCM issues have been addressed by reconfiguring the clocks and modifying the startup procedure.

Timing issues have been addressed by slowing down the clock. Main clock is 16ns. VME interface front-end clock is 4ns. Changed the 4ns clock to 8ns.

Changing the clock affects VME timing parameters Implementation of VME rules was based on a 4ns clock. Rules that are based on minimum times will be OK (just lengthed

response times). Other rules (such as “release within …”) potentially could be

violated with the 8ns clock. The exact implementation details need to be checked and/or

adjusted.

Stan Durkin EMU Meeting, Purdue Univ. Oct. 6, 2006 4

VCC: Latest RevisionVCC: Latest Revision VCC: Latest RevisionVCC: Latest Revision

Revision 3.69: Uses 8ns VME interface clock. More robust DCM monitoring and startup. Known problems in previous revision are not present in 3.69. Available for downloading on the controller web page

http://www.physics.ohio-state.edu/~cms/GbE_Ctrl

Not extensively tested yet, but very promising.

Stan Durkin EMU Meeting, Purdue Univ. Oct. 6, 2006 5

Hardware Modifications Needed. Replace inductor for 1.5V regulator with short. Add 10 uF Tant. bypass caps for oscillators (these were omitted

during original board assembly).

Firmware Development Work. Investigate consequences of 8ns clock on VME rules.

Adapt the implementation to 8ns clock. Test and verify proper timing. Distribute a reliable firmware revision.

Proceed with firmware development. Packet acknowledgements. Ethernet firmware downloading.

VCC: OutlookVCC: Outlook VCC: OutlookVCC: Outlook