SpaceCube IRAD

8/2/2019 SpaceCube IRAD

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Goddard Space Flight Center

26 June 2006

SpaceCube Development Team

The Shape of Things to Come

SpaceCube IRADpaceCube IRADDevelopment Effortevelopment EffortJohn Godfreyohn GodfreyCode 561ode 561


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26 June 2006

Goddard Space FlightCenter


WARNING: INFORMATION SUBJECT TO U.S. EXPORT CONTROL LAWS. This document contains technical data within the definitionof the International Traffic in Arms Regulations (ITAR) and is subject to the export control laws of the U.S. Government.


SpaceCube IRAD OverviewSpaceCube IRAD Overview

q What is SpaceCube?

SpaceCube is a Goddard IRAD effort to produce a generic, high densityuser-configurable subsystem. It is intended for applications which require alarge amount of processing power and flexible interfaces with minimalmass, power, and cost.

SpaceCube utilizes cutting edge reconfigurable FPGA technology,combined with a Rad-Hard by Architecture approach to allow for a largeamount of logic in a small package.

SpaceCube is capable of performing as a high speed network router,instrument C&DH or communications adaptor.

SpaceCube ArchitectureSpaceCube Architecture


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The Shape of Things to Come SpaceCube ArchitectureSpaceCube Architecture

SpaceCube IRAD History

q The SpaceCube concept was originally developed for theHubble Robotic Servicing and De-orbit Mission (HRSDM) tohandle the need for high speed video processing, Poseestimation and routing to the space network.

q After HRSDMs cancellation, SpaceCube became an

independent IRAD effort for approximately 8 months beforebecoming a center-funded IRAD effort in Jan 2006.

q Currently, SpaceCube is baselined to perform a verificationflight on HST SM 4 as the Relative Navigation System (RNS)C&DH, Pose Processing unit and Bi-Static GPS Processor.

Currently, RNS is scheduled for flight readiness inDecember, 2007.


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SpaceCube IRAD ArchitectureSpaceCube IRAD Architecture

q SpaceCube uses a stackedarchitecture composed of cards orslices connected via a connectorrunning the length of the stack

q Slices can be made redundant and the

stacking architecture allows any sliceto communicate with any other slice thus allowing card level redundancy.

q Each slice has an individual enclosurewhich encloses it on 5 sides.

q Slices are stacked in whatever orderdesired and covered by a top plate.

Up to two Power slices can becombined in a stack (one on the top,one on the bottom) to allow for acomplete warm back-up system.



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SpaceCube IRAD InterfacesSpaceCube IRAD Interfacesq Slice to Slice

communications are handledvia a combination ofconfigurable high and lowspeed serial links.

Redundant I2C Busses(100/400 Kb/S) provide for lowspeed command andtelemetry functions

High Speed busses such asEthernet or SpaceWireprovide for high speedcommunications (125Mb/s 250 Mb/s per bus)

q Current implementation canhandle up to 6 high speedbusses and two low speed

busses on the stack.

q I2C Communication is fromhard microcontroller to hardmicrocontroller for criticalfunctions.


I2C

HighSpeedBus

SpaceRISCMicrocontroller

SpaceRISCMicrocontroller

Voter

Virtex IV

Virtex IV

Power Slice

Processor Slice

q Slices can be configured with a variety of front panel optionsusing either RS-422 or LVDS.

SpaceCube can handle 8 full duplex Ethernet or SpaceWire links perprocessor slice.

q Removable front panels allow for differing connectorconfigurations

Default for Processor Slice is 2 51 pin MDM connectors.


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Space Cube IRAD Baseline CapabilitiesSpace Cube IRAD Baseline CapabilitiesSPECIFICATIONS

CENTRAL PROCESSORS

4 x 450 MHz PowerPC 405, 32-bit RISC processors:

2 x Xilinx XC4VFX60

Redundant to handle SEFI

32K bytes of secondary (L2) on-die cache

Common Processor Features are:-

700+ DMIPS RISC core

32-bit Harvard architecture

16 KB 2-way set-associative instruction and data caches

Auxiliary Processor Unit (APU) controller

1.2V core voltage

RECONFIGURABLE RESOURCES

2 x 56,880 logic cells

2 x 25,280 slices

2 x 4,176 Kb block RAM

232 18K block RAMs

Example: Helion AES core

447 slices, 10 block RAM, 2548Mbps performance

DRAM

3Dplus stacked SDRAM

4 Gbit 75 MHz

Each processor has 1 Gbit dedicated.

ETHERNET CAPACITY

8 x Ethernet Media Access Controllers

IEEE 802.3 compliant

10, 100, 1000 Mb/s

Supports MII, GMII

Does not use any system gates.

DIGITAL SIGNAL PROCESSING

128 XtremeDSP Slices

18-bit by 18-bit, two's complement multiplier with full precision 36-bit result, sign

extended to 48 bits.

FLASH EPROM

256 Mbyte of Flash EPROM

application storage

Flash has separate power switching.

Allows Flash to be powered off when not in use.

ROM

256 Mbyte of ROM

application storage

backup for Flash

SOFTWARE SUPPORT

Support for Linux, VxWorks

WindRiver

MontaVista, BlueCat

GNU GCC Compiler



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Space Cube IRAD Baseline CapabilitiesSpace Cube IRAD Baseline Capabilities

SERIAL INTERFACES

32 x LVDS serial pairs:

Support Ethernet, SpaceWire, or custom interface.

16550 compatible UARTs

Aeroflex LVDS drivers and Receivers

RS422 can be substituted for LVDS if desired

STACKING CONNECTOR INTERFACE

Airborne Connector:

72 pinsDesign uses no backplane or motherboard.

Low speed internal bus 400Kbps Redundant I2C

High speed bus TBD Redundant

Power Pins 3.3V, 5V

RAD-HARD SCRUBBER

UT6325 RadHard Eclipse FPGA

320,000 usable system gates

24 dual-port RadHard SRAM modules

RadHard to 300K rad(Si)/sec

OTHER PERIPHERAL INTERFACES

Available through stacking connector by additional card slices

Low Voltage Power Converter card slice

Same board size as processor

Provides low voltages from spacecraft bus voltage

Has 1553 interface, transformers and signal drivers

ELECTRICAL SPECIFICATION

21V to 35V voltage input through optional low voltage power converter card slice

Power Slice can provide:

+5V@ 2 Amps

+3.3V@ 6 Amps

+2.5V@ 4 Amps

all voltages are tolerant to +10% / -10%

SAFETYSDRAM power is switched separately to handle any potential latchup conditions.

ENVIRONMENTAL SPECIFICATION

-20C to +55C (operating Baseplate temperature)

-40C to +85C (storage baseplate temperature)

10% to 90% Relative Humidity, non-condensing (storage)

MECHANICAL SPECIFICATION

4 inches x 4 inches (PCB)

Box slice 4.25 inches x 4.25 inches x .75 inches/slice

single board, double sided

I/O connectors:

72 pin, Airborne Stacking

2 x 37 pin LVDS



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SpaceCube IRAD ComponentsSpaceCube IRAD Components

The Processor Slice is the brainsof the stack and contains the fourcentral processors (PowerPC 405s)as well as a small RISCmicrocontroller to provide supportand to mitigate single event effects

in the PowerPCs. Processor slice contains the Cubes

high speed external interfaces Upto8 SpaceWire or Ethernet ports perslice.

Each PowerPC is capable ofproviding up to 712 Dhrystone MIPSand has access to approximately 3million reconfigurable gates.

The Processor Slice can be combinedwith additional processor slices toprovide additional computing power orfor redundancy.

q The basic SpaceCube consists of a singleSpaceCube Processor Slice (SCuP) and its Powerconverter (LVPC) Slice

q Power Slice forms the Base of the SpaceCube.

Power Slice provides regulated low voltages from anunregulated 28V supply.

Power Slice also provides support functions such as A/DConversion for housekeeping, POR circuitry, and MIL-STD-1553B Communication.

4 in.

1.5 in.

SpaceCube

Processor Slice

Power Slice

SwitchedFabric

Backplane LVDS

Power

In



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SpaceCube IRAD Processor SliceSpaceCube IRAD Processor Slice

q SpaceCube processor slice is aminiaturized C&DH system on a single 4x 4 inch board

q Processing power is provided by 4PowerPC 405 processors which can berun either in parallel for speed or in aquad redundant voting scheme for SEU

immunity

Each PowerPC has its own independentSDRAM for program code/OS use.

q A soft-core SpaceRISC microcontroller isinstantiated in the radiation hardenedAeroflex FPGA and acts as the monitorand controller for the PowerPCs and the

Virtex logic. SpaceRISC is instruction set compatible with

the PIC16F86 Microcontroller

SpaceRISC is responsible for loading/re-loading the PowerPC code and scrubbing theVirtex configuration memory.

SpaceRISC is also the I2C controller

IBMPower PC

444

MHz444

KB444

Cash

Xilinx

XC VFX4 44

RAM Kb44

RAD-HARD

AEROFLEX

MB444

FlashDPlus4

UT4444

x4SpaceWire/

Ethernet

Pin33MDM

Pin Stack Connector44

in x in4 4

IBMPower PC

333

MHz444M x333 33

SDRAMMB444

Dplus4

M x444 44SDRAM

MB444

Dplus4

Xilinx Bus

I/O

Micro

Controller

AeroFlex IO. Vol t44

MB444Flash

DPlus4. Vol t44. Vol t33

LVDS/444

X Transmit4

X Receive4

SDRAD

Controler

KB444

Cash

SDRAD

Controler

4444

SoftCore

x4SpaceWire/

Ethernet

Pin44

MDM

LVDS/444

X Transmit4

X Receive4

I C Serial Port #4 4

I C Serial Port #4 4

Serial

ROMMb44

X4

Ethernet

MAC(HC)

Dplus4

IBMPower PC

444

MHz444

KB444

Cash

Xilinx

XC VFX4 44

IBMPower PC

444

MHz444

M x444 44

SDRAMMB444

M x444 44SDRAM

MB444

Dplus4

KB444

Cash

SDRAM

Controller

4444

SoftCore

X4

Ethernet

MAC(HC)

Floating

Point

Floating

Point

Floating

PointFloating

Point

3333

SDRAMController



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SpaceCube Processor Slice providesconfigurable LVDS (or RS-422) I/O whichcan be used with IP Cores to implement

a variety of interfaces such as

SpaceWire, Ethernet, USB and

CameraLink.

Cores are available to perform mostencoding functions: Reed-Solomon,

Convolutional, AES Decryption.

Independent

Latchup

S upp ly

A E RO F LE X

R A M

FL A S HFLASH

RO M

R A M

RA M

RA M

MDM44 MDM44

Pin Stacking Connector33

To p

Bottom

I4C( )4

Power

PC

LVDS/( R /T )444 44

L V D S /( R /T)444 44

Power

PC

IndependentLatchup

Supply

IndependentLatchup

Supply

IndependentLatchup

Supply

Independent

Latchup

SupplyIndependent

Latchup

Supply

Temperature I4C ( )4

RA MBuffering

uPVerif icat ion

Conf igurat ionRefresh

I/OValidat ion

Xilinx

VP3 33

Xilinx

VP4 44



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Processor PerformanceProcessor Performance

4

444

444

444

444

4444

4444

4444

4444

Mongoose 4

( Mhz)44

Rad (444444

Mhz)

GD Coldfire (44

Mhz)

PowerPC e333

( Mhz)444

Rad (444444

Mhz)

SpaceCube

PPC (444444

Mhz)

Pentium III (444

Mhz)

Blue Gene PPC

(. Ghz)444 4

Processor

MIPS/MFLO

PS

Drhystone MIPS

(Integer)

Whetstone MIPS

(Floating Point)

Flight Processors CommercialProcessors

SpaceCube

PPC 44

( Mhz)44 4



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Radiation Mitigation & RedundancyRadiation Mitigation & Redundancy

q SpaceCube Processor Slice utilizesXilinx Virtex devices to perform manyof its core functions.

These devices have a very high total dosetolerance, but are susceptible to SEUs.

To eliminate the SEU effects, QMR (Quad

Module Redundancy) is used. In a QMR scheme, the design is

instantiated four times, twice in each Xilinx.These are voted together and if one outputis different, it is discarded.

User logic is scrubbed to prevent SEUsfrom corrupting instantiated designs.

Processors are hard cores within the

devices. SEU performance of processor cores

Tested by GSFC in September 05.

PowerPC PowerPC

Logic Logic

PowerPC PowerPC

Logic Logic

Voter SpaceRISC

q Each Virtex device is split into twofunctional units consisting of a processorand its peripherals

Device level floor planning is used to ensurethat two instantiations are physically separate toreduce the effects of multi-bit SEUs.



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SpaceCube IRAD Power SliceSpaceCube IRAD Power Slice

q Power Slice provides A/D conversion capability to the stack for housekeeping usinga 16 channel Trios ASIC.

Provides voltage monitoring for all Power Slice generated voltages

Provides internal temperature monitoring

q SpaceCube Power Sliceprovides regulated DC power tothe assembled stack.

Provides 5.0 V, 3.3 V, 2.5V, 1.8V

1.2V is locally regulated onProcessor slice from the 1.8V

supply

q Power Slice also provides MIL-STD-1553B transceivers andtransformer.

1553 is controlled remotely fromthe Processor Slice.


VPT V to V44 4

DC-DC

Converter

MSK . V44

Switching

Regulator

MSK . V44

Switching

Regulator

MSK . -33

. V44Switching

Regulator

Stacking

Connector

Power

Connector

I/OC

onnector

MIL-STD-

4444

Driver/Reciever

Buffer

RS-444

Driver

V/F

Converter


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SpaceCube IRAD Power SliceSpaceCube IRAD Power Slice

5V DC-DC Converter

1553 Transformer

3.3V DC-DC Converter



RS-422 Drivers



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SpaceCube IRAD Current StatusSpaceCube IRAD Current Status

q SpaceCube Hardware tested and workhas begun on SpaceCube software.

q 4 EDU PCBs were delivered to theSpaceCube team in Nov 05 All havebeen tested and are serving as platformsfor software/VHDL development

1 Processor Slice delivered to ELC softwareteam in early May 06.

1 Processor Slice / Power Slice delivered June22, 2006 to CCA Team.

q Voting Scheme Development iscontinuing, initial version is currently intesting.

q

Flight Ethernet (D/S) port is currently inprogress.

q RNS on SM 4 will be using SpaceCubeand is currently scheduled for flightreadiness in Dec 2007.

Processor Slice Stacked on Power Slice


q Porting of Linux OS is currently in process

Linux OS Training was held in June.

cFE is being ported to Linux and will be ported toSpaceCube.

Documents

SpaceCube IRAD