Some Characteristics of Spiking Neural P Systems with Anti-Spikes

Some Characteristics of Spiking Some Characteristics of Spiking Neural P Systems with Anti-Neural P Systems with Anti-

SpikesSpikes

Kamala KrithivasanDepartment of Computer Science and Engineering

Indian Institute of Technology, [email protected]

Co-authorsPadmavati Metta

Deepak Garg

OutlineOutlineSpiking Neural P (or SN P) systemSN P system with anti-spikes (or SN PA

system)SN PA system

◦ As generator / transducer◦ Example◦ Simulating Boolean circuits◦ Simulating Binary Arithmetic operations

ConclusionReferences

2Padmavati Metta, Kamala Krithivasan and Deepak Garg CMC 2010

Spiking Neural P system is a computational model that has been inspired by neurobiology

Distributed and parallel computing modelVariant of Membrane System (P System)Uses one type of object called spike (a)Computationally complete

Spiking Neural P systemSpiking Neural P systemIonescu, M., Păun, Gh., Yokomori, T.: Spiking Neural P Systems, Fund. Infor. 71, 279-308 (2006).


O = {a, ā }, the alphabet. a is called spike and ā is called anti-spike. m neurons - σ1, σ2, σ3 ,. . . , σm Syn - Synapses among the neurons. Spike/anti-spike emitted by a neuron i will pass immediately to all neurons j connected to i through synapses. i0 – Output neuron

Spiking Neural P system with anti-Spiking Neural P system with anti-spikesspikes

Π =(O, σ1, σ2, σ3 ,. . . , σm , syn , i0)

Linqiang, P., Păun, Gh.: Spiking Neural P Systems with Anti-Spikes, Int. J. of Computers, Communications and Control 4, 273-282, (2009).


Each neuron σi contains◦ ni -- initial number of spikes/ anti-spikes◦ Ri -- finite set of rules of the form

SN P system with anti-spikes SN P system with anti-spikes (contd.)(contd.)

1. Spiking Rules

• E / br→ b’– used when a neuron has n spikes/anti-spikes such that bn L(E) ∈ and n ≥ r where b , b’ ∈ {a, ā }, E is a regular expression over {a} or {ā }

• r ≥ 0, number of b’s are consumed and a b’ is sent to all neighbouring neurons.

• They cannot of the form ār → ā . • E is omitted if L(E)=br. , we write br/br→ b’ as br→ b’


SN P system with anti-spikes SN P system with anti-spikes (contd.)(contd.)

2. Forgetting Rules

2. bs →λ - used when a neuron has s number of b’s3. s ≥ 0, number of b’s are forgotten by the neuron.4. bs should not be in L(E) for any spiking rule E/br→

b’ in Ri.

3. Annihilation Rule

• It is implicitly present in each neuron • Whenever a spikes and anti-spike meet in a

neuron they annihilate each other using the rule aā →λ and

• The rule has the highest priority and takes no time.


A global clock is there and all neurons work in parallel but each neuron can use one rule at a time.

There can be more than one rule enabled at any time, then a rule is chosen in a non-deterministic way.

At any time a neuron can have either spikes or anti-spikes. After receiving spikes/anti-spikes from neighbouring neurons, if a neuron has r spikes and s anti-spikes, it will be left with r-s spikes if r>s or s-r anti-spikes if s>r.

The configuration of a system at any time is <n1,n2,…,nm>, where ni is the number of spikes present in neuron σi if ni >0 or ni anti-spikes if ni<0, 1 ≤ i ≤ m.

SN P system with anti-spikes (contd.)SN P system with anti-spikes (contd.)


One of the neuron is considered as output neuron From the output neuron, spike/anti-spike is sent to

the environment. The moments of time when a spike is emitted by the output neuron are marked with 1, the moments when it emits an anti-spike is marked with 0. The no output moments are ignored. The sequence is called the spike train of the system .

The spike train can be the output generated by the system.

With a spike train we can also associate various numbers, which can be considered as computed (we also say generated) by an SN P system.

For example distance between the first two spikes of a spike train

Number of spikes present in the output neurons at the end of a halting computation (reaching a configuration where no rule can be used)


SN PA system as GeneratorSN PA system as Generator

SN PA System as generator– SN PA System as generator– ExampleExample

Evolution

< 1 , 1 >

< -1, 2 >

11, 21 - ā

11, 22 - a

1

2Output

ā

r21 : a2 /a ā

r11 : ā a

r22 : a2 a

a 2


SN PA System as generator– at time SN PA System as generator– at time t=1t=1

Evolution

< 1 , 1 >

< -1, 2 >

11, 21 - ā

11, 22 - a

1

2Output

If the neuron 2 uses the first rule the system will be in the same configuration

ā

r21 : a2 /a ā

r11 : ā a

r22 : a2 a

a a ā

a

ā


SN PA System as generator– at any SN PA System as generator– at any time ttime t

Evolution

< 1 , 1 >

< -1, 2 >

11, 21 - ā

11, 22 - a

1

2Output

If the neuron 2 uses the second rule the system halts.

ā

r21 : a2 /a ā

r11 : ā a

r22 : a2 a

a a

a

The system generates 0*1, which cannot be generated using simple SN P systems.Ibarra, O. H., Woodworth, S.: Spiking Neural P Systems: Some Characterizations,

FCT 2007, LNCS, vol. 4639, pp. 23-37, Springer, Heidelberg (2007).


SN PA system is used as SN PA system is used as TransducerTransducer• The system has one or more input and

one output neuron.• Boolean values 1 and 0 are encoded as

spikes and anti-spike respectively.• To input 0/1 , anti-spike /spike is

introduced in the input neurons.• The output is 0/1 (hence false/true) if an

anti-spike/spike is sent out of the output neuron.


Universal GatesUniversal Gates

The NAND and NOR gates are universal gates.

advantageous since NAND and NOR gates are economical and easier to fabricate and are the basic gates used in all IC digital logic families.

Padmavati Metta, Kamala Krithivasan and Deepak Garg CMC 2010 13

SN PA system simulating 2-input NAND SN PA system simulating 2-input NAND gategate

a4 āa3 a a2 a

1

2

ā a a λā a a a

3 ā a a λ

ā a a a4

The output is available after three steps

ā a

a ā

ā a a ā

5

output

Input 1

Input 2

in 1 in 2 n5 out

a a a4 ā

a ā a3 a

ā a a3 a

ā ā a2 a


1

SN PA system simulating 2-input NOR SN PA system simulating 2-input NOR gategate• Simulation of 2-input NOR gate is similar to NAND gate but replace all rules in neuron 5 with a4 ā , a3 ā and a2 a to output a spike(1) if both the inputs are anti- spikes(0).


• The output of the gate is false (0) only if all the inputs are true(1) and is true if any of the inputs is false. • The minimum number of spikes received by the output neuron is n (if all inputs are anti-spikes) and maximum will be 2n (if all inputs are spikes). • The rule a2n ā in the output neuron fires if all inputs are spikes (1).

SN PA system simulating n-input NAND SN PA system simulating n-input NAND gategate

SN PA system simulating n-input NAND SN PA system simulating n-input NAND gategate

a2n āa2n-1

a a2n-2 a

an a

1

2

ā a a λā a a a

2n-1 ā a a λ

ā a a a

2n

ā a

a ā

ā a a ā

5

output

Input 1

Input n


1

Simulation of Boolean formula in SOP Simulation of Boolean formula in SOP formform Boolean function can be represented in sum-of-

product (SOP) and product-of-sum forms (POS). SOP forms can be implemented using only

NAND gates, while POS forms can be implemented using only NOR

gates. In either case, implementation requires two

levels. The first level is for each term and second level for product or sum of the terms.

Consider the Boolean function ¬(x1 x2) (x3 x4). It is written in SOP from as ¬x1 ¬x2 (x3 x4)

Padmavati Metta, Kamala Krithivasan and Deepak Garg CMC 2010 17

SN PA system for SN PA system for ¬x1 ¬x2 (x3 x4)


x4¬ x2¬ x1 x3∏

NAND

(1)∏

(2)∏

(3)

NANDNAND

∏(4)

NAND

SN PA system simulating 2’s complementSN PA system simulating 2’s complement

a3

a4/a a a2 āa āā a 1

2

3

ā a a ā

ā a a ā

output

Input

A simple way to find the 2’s complement of a number is to start from the least significant bit keeping every 0 as it is until you reach the first 1 and then complement the rest of the bits after the first 1.


step input neuron 2 neuron3 outputt =0 - a3 - -t =1 ā (0) a3 - -t =2 ā (0) a4 - -t =3 a (1) a4 a -t =4 a (1) a2 a ā (0)t =5 ā (0) ā ā ā (0)t =6 a a a (1)t =7 ā ā (0)t =8 a (1)

a3

a4/a a a2 āa āā a 1 3

ā a a ā

ā a a ā

2

input output

Moves of the SN PA system for the input 01100

SN PA system simulating 2’s SN PA system simulating 2’s complementcomplement


SN PA system simulating binary SN PA system simulating binary additionaddition

a5/a4 a a4/a3 āa3 aa2 āa a

1

The output is available after three steps

5

output


2

ā a a λā a a a

3 ā a a λ

ā a a a

4

ā a

a ā

ā a a ā

Input 1

Input 2

carry in1 in2 n5 Rule used out carry

0 0 0 a2 a2 ā 0 00 0 1 a3 a3 a 1 00 1 0 a3 a3 a 1 00 1 1 a4 a4/a3 ā 0 11 0 0 a3 a3 a 1 01 0 1 a4 a4/a3 ā 0 11 1 0 a4 a4/a3 ā 0 11 1 1 a5 a5/a4 a 1 11 - - a a a 1 0

SN PA system simulating binary SN PA system simulating binary additionadditionA spike is left in the output neuron to represent the carry


ConclusionConclusion• Spiking neural P systems are used to simulate

fundamental gates in, Ionescu, M., Sburlan, D.: Some Applications of

Spiking Neural P systems, J. of Computing and Informatics 27 515-528 (2008).with two spikes emitting out of the system encoded as 1 and one spike as 0. SN P system with anti-spikes provides a natural way to represent the binary digits using spike and anti-spike.

• Simulating a Boolean circuit with universal gates does not require synchronizing module.

• Some languages that cannot be generated using simple SN P systems can be generated using SN PA systems.

• Here we also consider SN P system with anti-spikes as simple arithmetic device that can perform the arithmetic operations like 2’s complement, addition and subtraction with input and output in binary form.


ReferencesReferences Gutiérréz-Naranjo, M. A., Leporati, A.: First Steps Towards a CPU Made of

Spiking Neural P Systems, Int. J. of Computers, Communications and Control 4 244-252 (2009).

Ibarra, O. H., Woodworth, S.: Spiking Neural P Systems: Some Characterizations, FCT 2007, LNCS, vol. 4639, pp. 23-37, Springer, Heidelberg (2007).

Ionescu, M., Păun, Gh., Yokomori, T.: Spiking Neural P Systems, Fund. Infor. 71, 279-308 (2006).

Ionescu, M., Sburlan, D.: Some Applications of Spiking Neural P systems, J. of Computing and Informatics 27 515-528 (2008).

Linqiang, P., Păun, Gh.: Spiking Neural P Systems with Anti-Spikes, Int. J. of Computers, Communications and Control 4, 273-282, (2009).

Păun, Gh.: Spiking Neural P Systems Used as Acceptors and Transducers, CIAA, LNCS, vol. 4783, pp. 1-4, Springer, Heidelberg (2007).


Thank you Thank you !!

Documents

Some Characteristics of Spiking Neural P Systems with Anti-Spikes