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8/12/2019 Sol_HA12
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Department of Electrical Engineering, IIT Kanpur ESc 201: Introduction to Electronics
4th November, 2013
Home Assignment – 12
1. In a certain chemical process control application, a particular relay must operate for
certain input conditions. There are three input variables A, B and C, where A is the MSBand C is the LSB. The requirements are as follows:
Relay must be ON for 010, 011 and 100. Relay must be OFF for 000, 001 and 110. The
remaining input condition will never occur.
(a) Obtain a minimum expression for the above relay function using K-map.(b) Realize the above expression using NAND gates only.
2. A 4-input NAND gate is defined by the function z y xw z y xw f ...),,,( . Design a 4-input
NAND gate using 2-input NAND gates only.
3. A combinational circuit has 3 outputs F 1, F 2 and F 3 as follows:
y x z y x F
y x z y x F
z x z y x F
...3
...2
...1
Design the circuit with decoder and external gates.
4. BCD (binary coded decimal) is a representation of decimal digits using four bits. The
decimal digit can have values within 0 to 9. The four bit binary number represents a
decimal number N , where 0
0
1
1
2
2
3
3 2222 bbbb N , and 0123 bbbb is binary number
having four bits. We want to use a seven-segment display as shown below to display the
decimal number corresponding to 4-bit BCD input. Each segment of display is an LEDwhich glows when logic is 1. Determine the Boolean expression representing logic for
each element of display. Minimize the expression using K-map.
a
e
c
f
g
b
d
5. The four bit binary number represents a decimal number A, where
0
0
1
1
2
2
3
3 2222 aaaa A , and 0123 aaaa is binary number having four bits. Design a
circuit using 16 to 1 MUX to check whether A is prime number or not. Recall that a
number A is prime number if it is a natural number greater than 1 that has no other
divisors except 1 and the number itself.
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Department of Electrical Engineering, IIT Kanpur ESc 201: Introduction to Electronics
6. Construct an 8-to-1 MUX using minimum number of 4-to-1 and 2-to-1 MUXs as
building blocks.
7. Design the circuit using an 8 x 1 Multiplexer to implement the logic function
)14,13,11,10,9,8,6,5,2(),,,( m DC B A f .
8. Implement half-adder using 2-input NOR gates only.
9. Implement full adder using two 4 x 1 Multiplexers.
8/12/2019 Sol_HA12
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8/12/2019 Sol_HA12
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