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8/6/2019 soc architechture uzair

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SoC ArchitecturesMuhammad Uzair



Outline

Embedded Systems and System-on-Chip

System-on-Chip Design

The parallel Nature of System-on-Chips

Summary



Embedded Systems



Embedded Systems

� Hard requirements are imposed on embedded

systems. They have for instance to:

� guarantee safety (airbag control)

� have a low power consumption (mobile phone,

hearing aid)

The design process has to ensure that an implementation of a system fulfillsThe design process has to ensure that an implementation of a system fulfillsthese requirementsthese requirements





Design Productivity Gap



How to design a system-on-chip?

Specification: Design productivity increases with the level of abstraction

The task of functional verification is very difficult at low abstraction levels

Implementation: Efficient implementations require to exploit the low-level features of the

target architecture



Efficient System Design

The design time is shortened considerably by:

Increasing the level of abstraction Tool support to transform a design on a high abstraction level

to a design on a low abstraction level (Implementation details are

added)

Use of a platform architecture where each component andthe communication is optimized



System-on-Chip Architectures

A system-on-chip architecture integrates several

heterogeneous components on a single chip

A key challenge is to design the communication between the

different entities of a SoC in order to minimize thecommunication overhead



System-on-Chip Architecture:

A bus-based SoC



System-on-Chip Architecture:

Network-on-Chip

The resources are connected to the network via

network interfaces

The topology of the network and the capability of

the switches and communication channels

determines the capacity of the network



SoC Design

� The continuous progress in silicon process technologyallows to increase more and more functionality on asingle chip => Systems on a chip become reality

Market-driven forces: Shorter product design schedules and life spans

Products have to confirm to standards

The design has to be right from the start. An implementation errormeans heavy loss of money or product death

Large designs are integrated into a single chip

The SoC design process must address these driving forces



Design Process

A design specification has to be mapped on an architecture



Design Process

The design process for a SoC applications is a very

complex task:

Many components work in parallel and communicate with

each other A task can be mapped on different components

The overhead for communication depends on how tasks are

located

The designer has to choose an appropriate SoC architecture,since different architectures have different strength and

weaknesses



Design Process:

(System-On-Chip)



Platform-Based Design

The idea of a platform is to simplify the design process



Embedded Systems have to

cope with Parallelism

Provides an alternative to faster clock for performance

Applies at all levels of system design

Is essential within embedded system design, where the

system has to react to several inputs from the environment



System-on-Chip:

A Parallel Architectures

A parallel computer is a collection of processing elements that

cooperate to solve large problems fast

Resources:

Processing capacity of the components Distributed and/or global memory

Data access, Communication and Synchronization:

Communication protocol

Communication capacity

Communication abstraction and primitives

Objectives:

Performance and Scalability



Components in a Parallel SoC

Microprocessor cores or DSPs are cheap and optimized for

their application area

Often each parallel task does not need a tremendous

processing power It is important, how the parallel tasks can be mapped onto

the SoC so that the parallel nature of the system can be fully

exploited



Summary

System-on-Chips are heterogeneous and parallel

A good communication is the key to an efficient

parallel architecture

Digital Signal Processor as an important component

Communication architectures

Buses

Network -o n -chip

Documents

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