SINGLE-CHANNEL 8- SPST ANALOG · PDF fileTS5A4594 SINGLE-CHANNEL 8- SPST ANALOG SWITCH SCDS179 – FEBRUARY 2005 5 Electrical Characteristics for 3-V Supply(1) V+ =

TS5A4594SINGLE-CHANNEL 8-� SPST ANALOG SWITCH

SCDS179 – FEBRUARY 2005

Description

The TS5A4594 is a single-pole single-throw (SPST)analog switch that is designed to operate from 2 V to5.5 V. This device can handle both digital and analogsignals, and signals up to V+ can be transmitted in eitherdirection.

Applications

� Sample-and-Hold Circuits

� Battery-Powered Equipment (Cellular Phones, PDAs)

� Audio and Video Signal Routing

� Communication Circuits

� PCMCIA Cards

SOT-23 OR SC-70 PACKAGE(TOP VIEW)

1

2

3 4

5COM

NO

GND IN

V+

FUNCTION TABLE

INNO TO COM,COM TO NO

L OFF

H ON

Features� Low ON-State Resistance (8 �)

� ON-State Resistance Flatness (1.5 �)

� Control Inputs Are 5.5-V Tolerant

� Low Charge Injection (5 pC Max)

� 450-MHz −3-dB Bandwidth at 25�C

� Low Total Harmonic Distortion (THD) (0.04%)

� 2-V to 5.5-V Single-Supply Operation

� Specified at 5-V and 3.3-V Nodes

� −82-dB OFF-Isolation at 1 MHz

� Latch-Up Performance Exceeds 100 mA PerJESD 78, Class II

� 0.5-nA Max OFF Leakage

� ESD Performance Tested Per JESD 22− 2000-V Human-Body Model

(A114-B, Class II)− 1000-V Charged-Device Model (C101)

� TTL/CMOS-Logic Compatible

Summary of CharacteristicsV+ = 5 V, TA = 25°C

ConfigurationSingle Pole

Single Throw(SPST)

Number of channels 1

ON-state resistance (ron) 8 Ω

ON-state resistance flatness (ron(flat)) 1.5 Ω

Turn-on/turn-off time (tON/tOFF) 17 ns/14 ns

Charge injection (QC) 5 pC

Bandwidth (BW) 450 MHz

OFF isolation (OISO) −82 dB at 1 MHz

Total harmonic distortion (THD) 0.04%

Leakage current (ICOM(OFF)/INO(OFF)) ±0.5 nA

Power-supply current (I+) 0.25 μA

Package option 5-pin SOT-23 or SC-70

ORDERING INFORMATIONTA PACKAGE(1) ORDERABLE PART NUMBER TOP-SIDE MARKING(2)

40°C to 85°CSOT (SOT-23) − DBV Tape and reel TS5A4594DBVR JSA_

−40°C to 85°CSOT (SC−70) − DCK Tape and reel TS5A4594DCKR JS_

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package.(2) DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instrumentssemiconductor products and disclaimers thereto appears at the end of this data sheet.

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Copyright © 2005, Texas Instruments IncorporatedPRODUCTION DATA information is current as of publication date. Productsconform to specifications per the terms of Texas Instruments standard warranty.Production processing does not necessarily include testing of all parameters.



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2

Pin Configurations

1

2

3 4

5COM

NC

GND IN

V+

1

2

3 4

5COM

NO

GND IN

V+

1

2

3

5

4

IN

COM

GND NO

V+ 1

2

3

5

4

IN

COM

GND NC

V+TS5A4594

TS5A4595

TS5A4596 TS5A4597

Available in Other Pin Configurations

Absolute Minimum and Maximum Ratings(1)(2)

over operating free-air temperature range (unless otherwise noted)

MIN MAX UNIT

V+ Supply voltage range(3) −0.3 6 V

VNOVCOM

Analog voltage range(3)(4) −0.3 V+ + 0.3 V

IK Analog port diode current VNO, VCOM < 0 −50 mA

INOICOM

On-state switch current VNO, VCOM = 0 to V+ −20 20 mA

INOICOM

On-state switch current(pulsed at 1 ms, 10% duty cycle)

VNO, VCOM = 0 to V+ −40 40 mA

VI Digital input voltage range(3)(4) −0.3 6 V

IIK Digital input clamp current VI < 0 −50 mA

I+ Continuous current through V+ 100 mA

IGND Continuous current through GND −100 mA

θ Package thermal impedance(5)DBV package 206

°C/WθJA Package thermal impedance(5)DCK package 252

°C/W

Tstg Storage temperature range −65 150 °C(1) Stresses above these ratings may cause permanent damage. Exposure to absolute maximum conditions for extended periods may degrade

device reliability. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those specifiedis not implied.

(2) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum(3) All voltages are with respect to ground, unless otherwise specified.(4) The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed.(5) The package thermal impedance is calculated in accordance with JESD 51-7.



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3

Electrical Characteristics for 5-V Supply(1)

V+ = 4.5 V to 5.5 V, VIH = 2.4 V, VIL = 0.8 V, TA = −40°C to 85°C (unless otherwise noted)

PARAMETER SYMBOL TEST CONDITIONS TA V+ MIN TYP MAX UNIT

Analog Switch

Analog signalrange

VCOM,VNO

0 V+ V

ON-stater

VNO = 3.5 V, Switch ON, 25°C4 5 V

5 8Ω

ON stateresistance ron

VNO = 3.5 V,ICOM = 10 mA,

Switch ON,See Figure 13 Full

4.5 V10

Ω

ON-stateresistance r

VNO = 1.5 V, 2.5 V, 3.5 V, Switch ON, 25°C4 5 V

0.5 1.5Ωresistance

flatnessron(flat)

VNO = 1.5 V, 2.5 V, 3.5 V,ICOM = 10 mA,


4.5 V2

Ω

NOOFF leakage I

VNO = 1 V, VCOM = 4.5 V,or

Switch OFF, 25°C5 5 V

−0.5 0.01 0.5nAOFF leakage

currentINO(OFF) or

VNO = 4.5 V, VCOM = 1 V,

Switch OFF,See Figure 14 Full

5.5 V−5 5

nA

COMOFF leakage I

VCOM = 1 V, VNO = 4.5 V,or



currentICOM(OFF) or

VCOM = 4.5 V, VNO = 1 V,


5.5 V−5 5

nA

NOON leakage I

VNO = 1 V, VCOM = 1 V, orV 4 5 V V 4 5 V

Switch ON,25°C

5 5 V

−1 0.01 1

nAON leakagecurrent

INO(ON) VNO = 4.5 V, VCOM = 4.5 V, orVNO = 1 V, 4.5 V, VCOM = Open,

Switch ON,See Figure 15

Full

5.5 V

−10 10

nA

COMON leakage I

VCOM = 1 V, VNO = 1 V, orV 4 5 V V 4 5 V

Switch ON,25°C

5 5 V

−1 0.01 1

nAON leakagecurrent

ICOM(ON) VCOM = 4.5 V, VNO = 4.5 V, orVCOM = 1 V, 4.5 V, VNO = Open,


Full5.5 V

−10 10nA

Digital Control Input (IN)

Input logic high VIH Full 2.4 5.5 V

Input logic low VIL Full 0 0.8 V

Input leakageI I V V or 0

25°C5 V

−0.5 0.01 0.5A

Input leakagecurrent IIH, IIL VI = V+ or 0

Full5 V

−5 5μA

(1) The algebraic convention, whereby the most negative value is a minimum and the most positive value is a maximum



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Electrical Characteristics for 5-V Supply(1) (continued)V+ = 4.5 V to 5.5 V, TA = −40°C to 85°C (unless otherwise noted)


Dynamic

Turn on time tVNO = 3 V,

S Fi 1725°C 5 V 12 17

Turn-on time tONVNO = 3 V,RL = 300 Ω, CL = 35 pF, See Figure 17

Full 4.5 V to 5.5 V 19ns

Turn off time tVCOM = 3 V,

S Fi 1725°C 5 V 9 14

Turn-off time tOFFVCOM = 3 V,RL = 300 Ω, CL = 35 pF, See Figure 17

Full 4.5 V to 5.5 V 17ns

Charge injection QCVGEN = 0, RGEN = 0 CL = 1 nF,

See Figure 20 25°C 5 V 2 5 pC

NOOFF capacitance

CNO(OFF) VNO = 0 V, f = 1 MHzSwitch OFF,See Figure 16

25°C 5 V 6.5 pF

COMOFF capacitance

CCOM(OFF) VCOM = 0 V, f = 1 MHz,Switch OFF,See Figure 16

25°C 5 V 6.5 pF

NOON capacitance CNO(ON)) VNO = 0 V, f = 1 MHz,


25°C 5 V 13 pF

COM ON capacitance CCOM(ON) VCOM = 0 V, f = 1 MHz,


25°C 5 V 13 pF

Digital inputcapacitance

CI VI = 0 V, See Figure 16 25°C 5 V 3 pF

Bandwidth BWRL = 50 Ω, Signal = 0 dBm,

Switch ON, See Figure 18

25°C 5 V 450 MHz

OFF isolation OISORL = 50 Ω, VNO = 1 VRMSf = 1 MHz, CL = 5 pF

Switch OFF,See Figure 19

25°C 5 V −82 dB

Total harmonicdistortion THD

RL = 600 Ω, CL = 50 pF,VSOURCE = 5 Vp-p,

f = 20 Hz to 20 kHz,See Figure 21

25°C 5 V 0.04 %

Supply

Positive supplyI V V or GND Switch ON or OFF

25°C 5.5 V 0.01 0.25A

Positive supplycurrent I+ VI = V+ or GND, Switch ON or OFF

Full 5.5 V 1μA




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Electrical Characteristics for 3-V Supply(1)

V+ = 2.7 V to 3.6 V, TA = −40°C to 85°C (unless otherwise noted)


Analog Switch

Analog signalrange

VCOM,VNO

0 V+ V

ON-stater

VNO = 1.5 V, Switch ON, 25°C2 7 V

9.5 16Ω

ON stateresistance ron

VNO = 1.5 V,ICOM = 10 mA,


2.7 V20

Ω

ON-stateresistance r

VNO = 1.5 V, 2.5 V, Switch ON, 25°C2 7 V

1.8 6Ωresistance

flatnessron(flat)

VNO = 1.5 V, 2.5 V,ICOM = 10 mA,


2.7 V7

Ω

NOOFF leakage I

VNO = 1 V, VCOM = 3 V,or



currentINO(OFF) or

VNO = 3 V, VCOM = 1 V,


3.6 V−5 5

nA

COMOFF leakage I

VCOM = 1 V, VNO = 3 V,or



currentICOM(OFF) or

VCOM = 3 V, VNO = 1 V,


3.6 V−5 5

nA

NOON leakage I

VNO = 1 V, VCOM = 1 V, orV 3 V V 3 V

Switch ON,25°C

3 6 V

−1 0.01 1

nAON leakagecurrent

INO(ON) VNO = 3 V, VCOM = 3 V, orVNO = 1 V, 3 V, VCOM = Open,


Full3.6 V

−10 10nA

COM ON leakage I

VCOM = 1 V, VNO = 1 V, orV 3 V V 3 V

Switch ON,25°C

3 6 V

−1 0.01 1

nAON leakagecurrent

ICOM(ON) VCOM = 3 V, VNO = 3 V, orVCOM = 1 V, 3 V, VNO = Open,


Full3.6 V

−10 10nA

Digital Control Input (IN)

Input logic high VIH Full 2 5.5 V

Input logic low VIL Full 0 0.8 V

Input leakageI I V V or 0

25°C3 6 V

−0.5 0.01 0.5nA

Input leakagecurrent IIH, IIL VI = V+ or 0

Full3.6 V

−5 5nA




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Electrical Characteristics for 3-V Supply(1) (continued)V+ = 2.7 V to 3.6 V, TA = −40°C to 85°C (unless otherwise noted)


Dynamic

Turn on time tVNO = 2 V, CL = 35 pF, 25°C 3 V 20 30

Turn-on time tONVNO = 2 V,RL = 300 Ω,

CL = 35 pF,See Figure 17 Full 2.7 V to 3.6 V 35

ns

Turn off time tVCOM = 2 V, CL = 35 pF, 25°C 3 V 15 25

Turn-off time tOFFVCOM = 2 V,RL = 300 Ω,

CL = 35 pF,See Figure 17 Full 2.7 V to 3.6 V 30

ns

Charge injection QCVGEN = 0, RGEN = 0,CL = 1 nF,

See Figure 20 25°C 3 V 1 4 pC

NOOFF capacitance

CNO(OFF)VNO = 0 V,f = 1 MHz,


25°C 3 V 6.5 pF

COMOFF capacitance

CCOM(OFF)VCOM = 0 V,f = 1 MHz,


25°C 3 V 6.5 pF

NOON capacitance CNO(ON)

VNO = 0 V,f = 1 MHz,


25°C 3 V 13 pF

COM ON capacitance CCOM(ON)

VCOM = 0 V,f = 1 MHz,


25°C 3 V 13 pF

Digital inputcapacitance

CI VI = 0 V, See Figure 16 25°C 3 V 3 pF

Bandwidth BWRL = 50 Ω, Signal = 0 dBm


25°C 3 V 450 MHz

OFF isolation OISORL = 50 Ω, CL = 5 pF,f = 1 MHz, VNO = 1 VRMS,


25°C 3 V −82 dB

Total harmonicdistortion THD

RL = 600 Ω, CL = 50 pF,VSOURCE = 3 Vp-p

f = 20 Hz to 20 kHz,See Figure 21

25°C 3 V 0.09 %

Supply

Positive supplyI V V or GND Switch ON or OFF

25°C5 5 V

0.01 0.25A

Positive supplycurrent I+ VI = V+ or GND, Switch ON or OFF

Full5.5 V

0.5μA




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7

TYPICAL PERFORMANCE

0

2

4

6

8

10

0 1 2 3 4 5

Figure 1. ron vs VCOM

V+ = 5 V

VCOM (V)

r on �Ω

�

V+ = 3 V

TA = 25�C

0

2

4

6

8

0 1 2 3 4 5

Figure 2. ron vs VCOM (V+ = 5 V)VCOM (V)

r on

(��

85�C25�C

–40�C

0

2

4

6

8

10

0 1 2 3

Figure 3. ron vs VCOM (V+ = 3 V)VCOM (V)

r on

(�)

85�C

25�C

–40�C

0.0

0.2

0.4

0.6

0.8

1.0

TA (°C)

Lea

kag

e C

urr

ent (

nA

)

Figure 4. Leakage Current vs Temperature(V+ = 5 V)

−40°C 25°C 85°C

ICOM(ON)/INO(ON)

INO(OFF)/ICOM(OFF)

−3.0

−2.5

−2.0

−1.5

−1.0

−0.5

0.0

0.5

0 1 2 3 4 5

Bias Voltage (V)

Ch

arg

e In

ject

ion

(pC

)

Figure 5. Charge-Injection (QC) vs VCOM

5

5 V+ = 3 V

V+ = 5 V

6

8

10

12

14

16

18

20

0 1 2 3 4 5 6V+ (V)

t ON

/tO

FF (n

s)

Figure 6. tON and tOFF vs Supply Voltage

tON

tOFF



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8

TYPICAL PERFORMANCE (continued)

6

7

8

9

10

11

12

Figure 7. tON and tOFF vs Temperature (V+ = 5 V)

t ON

/tO

FF (n

s)

TA (�C)

tON

tOFF

−40°C 25°C 85°C

0

1

2

3

0 1 2 3 4 5 6

Figure 8. Logic-Level Threshold vs V+

V+ (V)

Lo

gic

Lev

el T

hre

sho

ld (n

A)

VIH

VIL

−4.0

−3.5

−3.0

−2.5

−2.0

−1.5

−1.0

−0.5

0.0

Figure 9. Bandwidth (Gain vs Frequency)(V+ = 5 V)

Gai

n (d

B)

Frequency (MHz)0.1 1 100010 100

−100

−90

−80

−70

−60

−50

−40

−30

−20

−10

0

Figure 10. OFF Isolation vs Frequency

Att

enu

atio

n (d

B)

Frequency (MHz)0.1 1 100010 100

0

1

2

3

4

5

6

7

8

9

10

−40°C 25°C 85°C

Figure 11. Power-Supply Current vsTemperature

I + (

μA)

TA (�C)

V+ = 3 V

V+ = 5 V

0.00

0.05

0.10

0.15

0.20

Frequency (MHz)

0.1 1 100010 100

V+ = 3 V

V+ = 5 V

Figure 12. Total Harmonic Distortion vsFrequency

TH

D (%

)



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9

PIN DESCRIPTIONPIN

NUMBERNAME DESCRIPTION

1 COM Common

2 NO Normally open

3 GND Digital ground

4 IN Digital control pin to connect COM to NO

5 V+ Power supply

PARAMETER DESCRIPTIONSYMBOL DESCRIPTION

VCOM Voltage at COM

VNO Voltage at NO

ron Resistance between COM and NO ports when the channel is ON

ron(flat) Difference between the maximum and minimum value of ron in a channel over the specified range of conditions

INO(OFF) Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the OFF state

INO(ON)Leakage current measured at the NO port, with the corresponding channel (NO to COM) in the ON state and the output (COM)open

ICOM(OFF) Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the OFF state

ICOM(ON)Leakage current measured at the COM port, with the corresponding channel (COM to NO) in the ON state and the output (NO)open

VIH Minimum input voltage for logic high for the control input (IN)

VIL Maximum input voltage for logic low for the control input (IN)

VI Voltage at the control input (IN)

IIH, IIL Leakage current measured at the control input (IN)

tONTurn-on time for the switch. This parameter is measured under the specified range of conditions and by the propagation delaybetween the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning ON.

tOFFTurn-off time for the switch. This parameter is measured under the specified range of conditions and by the propagation delaybetween the digital control (IN) signal and analog output (COM or NO) signal when the switch is turning OFF.

QC

Charge injection is a measurement of unwanted signal coupling from the control (IN) input to the analog (NO or COM) output.This is measured in coulomb (C) and measured by the total charge induced due to switching of the control input.Charge injection, QC = CL × ΔVCOM, CL is the load capacitance, and ΔVCOM is the change in analog output voltage.

CNO(OFF) Capacitance at the NO port when the corresponding channel (NO to COM) is OFF

CNO(ON) Capacitance at the NO port when the corresponding channel (NO to COM) is ON

CCOM(OFF) Capacitance at the COM port when the corresponding channel (COM to NO) is OFF

CCOM(ON) Capacitance at the COM port when the corresponding channel (COM to NO) is ON

CI Capacitance of control input (IN)

OISOOFF isolation of the switch is a measurement of OFF-state switch impedance. This is measured in dB in a specific frequency,with the corresponding channel (NO to COM) in the OFF state.

BW Bandwidth of the switch. This is the frequency in which the gain of an ON channel is −3 dB below the DC gain.

THDTotal harmonic distortion describes the signal distortion caused by the analog switch. This is defined as the ratio of root meansquare (RMS) value of the second, third, and higher harmonic to the absolute magnitude of the fundamental harmonic.

I+ Static power-supply current with the control (IN) pin at V+ or GND



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PARAMETER MEASUREMENT INFORMATION

V+

ICOM

ron �

VCOM � VNOICOM

�

GND

Channel ON

NO

VI

COM VCOM

VI = VIH or VIL

VNO

IN

+

+

Figure 13. ON-State Resistance (ron)

Channel OFFOFF-State Leakage Current

VI = VIH or VIL

V+

GND

NO

VI

COM VCOM

VNO

IN

+

+

+

Figure 14. OFF-State Leakage Current (ICOM(OFF), INO(OFF))

Channel ONON-State Leakage Current

VI = VIH or VIL

V+

GND

NO

VI

COMVCOM

VNO

IN

+

+

Figure 15. ON-State Leakage Current (ICOM(ON), INO(ON))



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11

V+

GND

INVBIAS

VI

VI = VIH or VIL

VBIAS = 0 V

Capacitance is measured at NO,COM, and IN inputs during ONand OFF conditions.

CapacitanceMeter

VCOM

VNO

COM

NO

Figure 16. Capacitance (CI, CCOM(OFF), CCOM(ON), CNO(OFF), CNO(ON))

CL(2) RL

VCOM(3)

V+

GND

NO

IN

VNO

VI

COM

LogicInput(1)

300 Ω

RL CL

35 pFtON

TEST

300 Ω 35 pFtOFF

50%

tON tOFF

50%

90% 90%

LogicInput

(VI)

V+

SwitchOutput(VCOM)

0

(1) All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf < 5 ns.(2) CL includes probe and jig capacitance.(3) See Electrical Characteristics for VCOM.

Figure 17. Turn-On (tON) and Turn-Off Time (tOFF)

V+

GND

NO

INVI

COM

50 �

50 �

VNO

VCOM

Channel ON: NO to COM

Network Analyzer Setup

Source Power = 0 dBm(632-mV P-P at 50-� load)

DC Bias = 350 mV

Network Analyzer

SourceSignal

+

VI = V+ or GND

Figure 18. Bandwidth (BW)



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12

NO

COM

VNO

VCOM

Channel OFF: NO to COM

Network Analyzer Setup

Source Voltage = 1 VRMS

DC Bias = 350 mV

V+

GND

50 �

50 �

Network Analyzer

SourceSignal

INVI

+

VI = V+ or GND

Figure 19. OFF Isolation (OISO)

V+

GND

NO

IN

RGEN

VI

COM VCOM

CL(1)

OFF

VCOM

ON OFF

ΔVCOMVGEN

+

VI = VIH or VIL

CL = 1 nF

VGEN = 0 to V+

RGEN = 0

QC = CL × ΔVCOMLogic

Input(2)

VIH

VIL

LogicInput

(VI)

(1) CL includes probe and jig capacitance.(2) All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr < 5 ns, tf < 5 ns.

Figure 20. Charge Injection (QC)

V+/2

GND

NO

COM

CL(1)

INVI

600 �

600 �

Audio Analyzer

SourceSignal

RL = 600 ΩCL = 50 pFVSOURCE = V+ P-P fSOURCE = 20 Hz to 20 kHz

Channel ON: COM to NO VI = V+/2 or −V+/2

−V+/2

LP Filter = 80 kHz HP Filter = 10 Hz

(1) CL includes probe and jig capacitance.

Figure 21. Total Harmonic Distortion (THD)

PACKAGE OPTION ADDENDUM

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PACKAGING INFORMATION

Orderable Device Status(1)

Package Type PackageDrawing

Pins PackageQty

Eco Plan(2)

Lead/Ball Finish(6)

MSL Peak Temp(3)

Op Temp (°C) Device Marking(4/5)

Samples

TS5A4594DBVR ACTIVE SOT-23 DBV 5 3000 Green (RoHS& no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM -40 to 85 JSAR

TS5A4594DBVRE4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS& no Sb/Br)


TS5A4594DBVRG4 ACTIVE SOT-23 DBV 5 3000 Green (RoHS& no Sb/Br)


TS5A4594DCKR ACTIVE SC70 DCK 5 3000 Green (RoHS& no Sb/Br)

CU NIPDAU Level-1-260C-UNLIM -40 to 85 (JS5 ~ JSF ~ JSR)

TS5A4594DCKRE4 ACTIVE SC70 DCK 5 3000 Green (RoHS& no Sb/Br)


TS5A4594DCKRG4 ACTIVE SC70 DCK 5 3000 Green (RoHS& no Sb/Br)


(1) The marketing status values are defined as follows:ACTIVE: Product device recommended for new designs.LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.PREVIEW: Device has been announced but is not in production. Samples may or may not be available.OBSOLETE: TI has discontinued the production of the device.

(2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availabilityinformation and additional product content details.TBD: The Pb-Free/Green conversion plan has not been defined.Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement thatlead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used betweenthe die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above.Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weightin homogeneous material)

(3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.

(4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.

(5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuationof the previous line and the two combined represent the entire Device Marking for that device.

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PACKAGE OPTION ADDENDUM

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Addendum-Page 2

(6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finishvalue exceeds the maximum column width.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on informationprovided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken andcontinues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

TAPE AND REEL INFORMATION

*All dimensions are nominal

Device PackageType

PackageDrawing

Pins SPQ ReelDiameter

(mm)

ReelWidth

W1 (mm)

A0(mm)

B0(mm)

K0(mm)

P1(mm)

W(mm)

Pin1Quadrant

TS5A4594DBVR SOT-23 DBV 5 3000 180.0 8.4 3.23 3.17 1.37 4.0 8.0 Q3

TS5A4594DCKR SC70 DCK 5 3000 178.0 9.0 2.4 2.5 1.2 4.0 8.0 Q3

TS5A4594DCKR SC70 DCK 5 3000 178.0 9.2 2.4 2.4 1.22 4.0 8.0 Q3

TS5A4594DCKR SC70 DCK 5 3000 180.0 8.4 2.47 2.3 1.25 4.0 8.0 Q3

PACKAGE MATERIALS INFORMATION

www.ti.com 3-Aug-2017

Pack Materials-Page 1

*All dimensions are nominal

Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm)

TS5A4594DBVR SOT-23 DBV 5 3000 202.0 201.0 28.0

TS5A4594DCKR SC70 DCK 5 3000 180.0 180.0 18.0

TS5A4594DCKR SC70 DCK 5 3000 180.0 180.0 18.0

TS5A4594DCKR SC70 DCK 5 3000 202.0 201.0 28.0

PACKAGE MATERIALS INFORMATION

www.ti.com 3-Aug-2017

Pack Materials-Page 2

www.ti.com

PACKAGE OUTLINE

C

TYP0.220.08

0.25

3.02.6

2X 0.95

1.9

1.45 MAX

TYP0.150.00

5X 0.50.3

TYP0.60.3

TYP80

1.9

A

3.052.75

B1.751.45

(1.1)

SOT-23 - 1.45 mm max heightDBV0005ASMALL OUTLINE TRANSISTOR

4214839/C 04/2017

NOTES: 1. All linear dimensions are in millimeters. Any dimensions in parenthesis are for reference only. Dimensioning and tolerancing per ASME Y14.5M.2. This drawing is subject to change without notice.3. Refernce JEDEC MO-178.

0.2 C A B

1

34

5

2

INDEX AREAPIN 1

GAGE PLANE

SEATING PLANE

0.1 C

SCALE 4.000

www.ti.com

EXAMPLE BOARD LAYOUT

0.07 MAXARROUND

0.07 MINARROUND

5X (1.1)

5X (0.6)

(2.6)

(1.9)

2X (0.95)

(R0.05) TYP

4214839/C 04/2017


NOTES: (continued) 4. Publication IPC-7351 may have alternate designs. 5. Solder mask tolerances between and around signal pads can vary based on board fabrication site.

SYMM

LAND PATTERN EXAMPLEEXPOSED METAL SHOWN

SCALE:15X

PKG

1

3 4

5

2

SOLDER MASKOPENINGMETAL UNDER

SOLDER MASK

SOLDER MASKDEFINED

EXPOSED METAL

METALSOLDER MASKOPENING

NON SOLDER MASKDEFINED

(PREFERRED)

SOLDER MASK DETAILS

EXPOSED METAL

www.ti.com

EXAMPLE STENCIL DESIGN

(2.6)

(1.9)

2X(0.95)

5X (1.1)

5X (0.6)

(R0.05) TYP


4214839/C 04/2017

NOTES: (continued) 6. Laser cutting apertures with trapezoidal walls and rounded corners may offer better paste release. IPC-7525 may have alternate design recommendations. 7. Board assembly site may have different recommendations for stencil design.

SOLDER PASTE EXAMPLEBASED ON 0.125 mm THICK STENCIL

SCALE:15X

SYMM

PKG

1

3 4

5

2

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