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Electronic Supplementary Material

Simulation and structure optimization of triboelectric nanogenerators considering the effects of parasitic capacitance

Keren Dai1, Xiaofeng Wang1 (), Simiao Niu2 (), Fang Yi3, Yajiang Yin1, Long Chen4, Yue Zhang3,

and Zheng You1 ()

1 Collaborative Innovation Center for Micro/Nano Fabrication, Device and System, State Key Laboratory of Precision Measurement

Technology and Instruments, Department of Precision Instrument, Tsinghua University, Beijing 100084, China 2 School of Materials Science and Engineering, Georgia Institute of Technology, Atlanta, GA30332-0245, USA 3 State Key Laboratory for Advanced Metals and Materials, School of Materials Science and Engineering, Beijing Municipal Key

Laboratory of New Energy Materials and Technologies, University of Science and Technology Beijing, Beijing 100083, China 4 Broadcom Ltd., 2901 Via Fortuna #400, Austin, TX, 78746, USA

Supporting information to DOI 10.1007/s12274-016-1275-7

Single electrode mode

Figure S1 shows the impacts of parasitic capacitance on single electrode mode TENGs with different gap.

Figures 2(a) and 2(b) are calculated from the data of Fig. S1.

Figure S2 shows the impacts of parasitic capacitance on single electrode mode TENGs with different side

length.

Figure S3 also shows the impacts of parasitic capacitance on single electrode mode TENGs with different side

length. Figures 2(d) and 2(e) are calculated from the data of Fig. S3.

Figure S4 shows the impacts of parasitic capacitance on the effective open-circuit voltage, effective capacitance

and effective short-circuit charge under single electrode mode. Figures 2(c) and 2(f) are calculated from the

data of Fig. S4.

Address correspondence to Xiaofeng Wang, xfw@mail.tsinghua.edu.cn; Zheng You, yz-dpi@mail.tsinghua.edu.cn; Simiao Niu, sniu6@gatech.edu

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Figure S1 (a) Relations between the power and resistor under different gaps, with zero parasitic capacitance. (b) Relations between the power and resistor under different gaps, with a parasitic capacitance of 1 pF. (c) Relations between the power and resistor under different gaps, with a parasitic capacitance of 10 pF. (d) Relations between the power and resistor under different gaps, with a parasitic capacitance of 100 pF.

Figure S2 (a) Relations between the power and resistor under different side lengths, with zero parasitic capacitance. (b) Relations between the power and resistor under different side lengths, with a parasitic capacitance of 1 pF. (c) Relations between the power and resistor under different side lengths, with a parasitic capacitance of 10 pF. (d) Relations between the power and resistor under different side lengths, with a parasitic capacitance of 20 pF. (e) Relations between maximum output power and the side length under different parasitic capacitances.

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Figure S3 (a) Relations between the power density and resistor under different side lengths, with zero parasitic capacitance. (b) Relations between the power density and resistor under different side lengths, with a parasitic capacitance of 1 pF. (c) Relations between the power density and resistor under different side lengths, with a parasitic capacitance of 10 pF. (d) Relations between the power density and resistor under different side lengths, with a parasitic capacitance of 20 pF.

Figure S4 (a) Relations between effective open-circuit voltage and displacement under different parasitic capacitances. (b) Relations between effective capacitance and displacement under different parasitic capacitances. (c) Relations between effective short-circuit charge and displacement under different parasitic capacitances.

Dielectric-freestanding mode

Figure S5 shows the impacts of parasitic capacitance on dielectric-freestanding mode TENGs with different gap.

Figures 4(a) and 4(b) are calculated from the data of Fig. S5.

Figure S6 shows the impacts of parasitic capacitance on dielectric-freestanding mode TENGs with different

height. Figures 4(d) and 4(e) are calculated from the data of Fig. S6.

Figure S7 shows the impacts of parasitic capacitance on the effective open-circuit voltage, effective capacitance

and effective short-circuit charge under dielectric-freestanding mode. Figures 4(c) and 4(f) are calculated from

the data of Fig. S7.

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Figure S5 (a) Relations between the power and resistor under different gaps, with zero parasitic capacitance. (b) Relations between the power and resistor under different gaps, with a parasitic capacitance of 1 pF. (c) Relations between the power and resistor under different gaps, with a parasitic capacitance of 10 pF. (d) Relations between the power and resistor under different gaps, with a parasitic capacitance of 100 pF.

Figure S6 (a) Relations between the power and resistor under different heights, with zero parasitic capacitance. (b) Relations between the power and resistor under different heights, with a parasitic capacitance of 1 pF. (c) Relations between the power and resistor under different heights, with a parasitic capacitance of 10 pF. (d) Relations between the power and resistor under different heights, with a parasitic capacitance of 100 pF.

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Figure S7 (a) Relations between effective open-circuit voltage and displacement under different parasitic capacitances. (b) Relations between effective capacitance and displacement under different parasitic capacitances. (c) Relations between effective short-circuit charge and displacement under different parasitic capacitances.

Metal-freestanding mode

Figure S8 shows the impacts of parasitic capacitance on metal-freestanding mode TENGs with different gap.

Figures 6(a) and 6(b) are calculated from the data of Fig. S8.

Figure S9 shows the impacts of parasitic capacitance on metal-freestanding mode TENGs with different

height. Figures 6(d) and 6(e) are calculated from the data of Fig. S9.

Figure S10 shows the impacts of parasitic capacitance on the effective open-circuit voltage, effective capacitance

and effective short-circuit charge under metal-freestanding mode. Figures 6(c) and 6(f) are calculated from the

data of Fig. S10.

Figure S8 (a) Relations between the power and resistor under different gaps, with zero parasitic capacitance. (b) Relations between the power and resistor under different gaps, with a parasitic capacitance of 1 pF. (c) Relations between the power and resistor under different gaps, with a parasitic capacitance of 10 pF. (d) Relations between the power and resistor under different gaps, with a parasitic capacitance of 100 pF.

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Figure S9 (a) Relations between the power and resistor under different heights, with zero parasitic capacitance. (b) Relations between the power and resistor under different heights, with a parasitic capacitance of 1 pF. (c) Relations between the power and resistor under different heights, with a parasitic capacitance of 10 pF. (d) Relations between the power and resistor under different heights, with a parasitic capacitance of 100 pF.

Figure S10 (a) Relations between effective open-circuit voltage and displacement under different parasitic capacitances. (b) Relations between effective capacitance and displacement under different parasitic capacitances. (c) Relations between effective short-circuit charge and displacement under different parasitic capacitances.

Simplified equivalent TENG

We can assume that the voltage on the parasitic capacitance is V. So the charges on the parasitic capacitance and

TENG capacitance will be p

C V and p

Q C V , as shown in the left part of Fig. S11.

From the circuit in Fig. S11, we can obtain the following circuit equation

p

OC

t

Q C VV V

C

(S1)

Therefore, it can be easily derived that

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t OC

t p t p

C V QV

C C C C

(S2)

We can define the following parameters

t OCoc ,eq t ,eq t p

t p

,C V

V C C CC C

(S3)

Then, the Eq. (S2) can be written as

oc ,eq

t ,eq

QV V

C (S4)

It is easily seen that the original TENG with consideration of the parasitic capacitance is equivalent to a “new”

TENG, as shown in the right part of Fig. S11, where its open-circuit voltage and inherent capacitance can be

given by

t OCoc ,eq

t p

t ,eq t p

sc ,eq oc ,eq t ,eq t OC SC

C VV

C C

C C C

Q V C C V Q

(S5)

Figure S11 Simplified equivalent TENG analysis.

Optimum gap analysis for the output power

Through the equivalent circuit method shown in Fig. S11, the TENGs with parasitic capacitance can be simplified

to a “new” TENG. So we can consider the optimum gap similar to the case with no parasitic capacitance.

According to Ref. [S1], the open-circuit Voltage oc

V , the short-circuit charge sc

Q and the charge transfer

efficiency ct

can be written as,

when g approaches to 0 ( /x g and /l g is very large),

oc sc ct

10, ,

2 2

wlV Q

(S6)

According to Ref. [S2], the output power P can be written as

ct oc sc0P V Q (S7)

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When g approaches to infinite ( /x g and /l g approaches to 0),

oc sc ct, 0, 0

2a

wlV Q

C

(S8)

According to Ref. [S2], the output power P can be written as

ct oc sc0P V Q (S9)

Obviously, the optimum gap must existence to maximum the power P.

Optimum side length analysis for the output power density

According to the Eqs. (27) and (28) in Ref. [S1], the open-circuit voltage Voc, the short-circuit charge Qsc and the

charge transfer efficiency ηct can be written as,

when l approaches to 0 (x/l and g/l is very large),

2

oc sc ct

0

1, ,

2 2 2

lV l Q

(S10)

According to Ref. [S2], the output power P can be written as

2 3

ct oc sc

08

lP V Q

(S11)

So the output power density Pd can be presented as

2

208

P lPd

l (S12)

So when side length l is relatively small, the output power density increases as the side length increases.

When l approaches to infinity (x/l and g/l is close to 0),

oc sc ct

0

ln( ) ln( ) ln( ), ,

gx l lx l x lV Q

l l

(S13)

The output power density Pd can be presented as

2 3 3

3 30

[ln( )]gx lPd

l (S14)

So when side length l is relatively large, the output power density decreases as the side length increases.

According to the analysis above, we know that there is an optimum side length for which the output power

density can be maximized.

Experiment results of the parasitic effects

In order to simulate the TENG accurately, we first measure the tribo charge density σ of the single electrode

mode with experiment. According to the theoretical analysis, when the displacement is large enough, the

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short-circuit charge Qsc approaches 1

2S . So we can determine the charge density as, sc

2σ

Q

S . The charge

density in our experiment is 27.6 μC·m–2. If there is no parasitic capacitance, according to simulation results, the

open-circuit voltage Voc will finally converge to 949 V with the increase of the displacement. However, experiment

result show that the Voc of the practical TENG device with the same parameters actually converges to about

18.7 V as the displacement becomes large enough, as shown in the Fig. S12.

Figure S12 Open-circuit voltage during the displacement movement.

The parasitic capacitance can be further measured approximately by connect an AC voltage source Ve between

the two electrodes of the TENG device. Then we can measure the AC current le between the two electrodes. The

total capacitance in this experiment can be calculated as, ep t

e

IC C

wV . Here w represents the circular frequency

of the AC voltage source. By this method, we can measure the parasitic capacitance of the TENG device with

the same parameters in section 3, as shown in the Table S1.

Table S1 Experiment results for calculating the parasitic capacitance

Ve le 2π

f

C Cp t

297 mV 6.59 μA 1 MHz 3.53 pF

604 mV 12.41 μA 1 MHz 3.27 pF

913 mV 22.03 μA 1 MHz 3.84 pF

1,287 mV 29.76 μA 1 MHz 3.68 pF

We draw these experiment results in the Fig S13 and get the experiment value of the total capacitance by

averaging the values with different Ve above,

p t

3.53 3.27 3.84 3.683.58 pF

4C C .

Figure S13 Experiment results for calculating the parasitic capacitance.

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Based on the simulation results, the inherent capacitance Ct of TENG is about 0.36 pF. So the experiment value

of the parasitic capacitance is about 3.22 pF. The electrometer Keithley 6514 used for measuring the open-circuit

voltage has another 10 pF input capacitance. So the total parasitic capacitance is 13.22 pF. According to Eq. (14),

the total parasitic capacitance degrades the open-circuit voltage to 2.65% of the theory value. Actually, the

measured ratio of the experiment open-circuit voltage to the theoretical open-circuit voltage is 1.97%, which is

close to the theory value of 2.65%. To sum up, these experiment results prove the degradation effects of

parasitic capacitance and consist with the modeling and simulation results in our paper.

References

[S1] Hu, Y. F.; Yang, J.; Jing, Q. S.; Niu, S. M.; Wu, W. Z.; Wang, Z. L. Triboelectric nanogenerator built on suspended 3D spiral

structure as vibration and positioning sensor and wave energy harvester. ACS Nano 2013, 7, 10424–10432.

[S2] Lu, H. Y.; Zhu, J. G.; Hui, S. Y. R. Experimental determination of stray capacitances in high frequency transformers. IEEE T.

Power Electr. 2003, 18, 1105–1112.