Simplifying Applications Connections - Microchip …ww1.microchip.com/...symplifying-the-design-of-switch-applications.pdf · second chip is the Atmel AVR® ATtiny167 automotive 8-bit

Automotive Compilation Vol. 9

Figure 1. ATA6642 SiP

How LIN Systems Benefit from System-in-Package Devices

Low-cost local interconnect networking (LIN) is a serial protocol used for in-car communications. LIN systems are typically used throughout the automobile in comfort, powertrain, sensor and actuator applications. Atmel® supports these applications with a modular LIN family that ranges from simple transceiver ICs to complex system basis chips (SBCs) and system-in-package (SiP) solutions.

System in package is used for devices that integrate several semiconductor chips within one package, thus forming a complete electronic system. In contrast to standard solutions where the functionalities of a complete system are performed by separate ICs, a SiP can do so with one single device. That said, SiPs are another milestone of continuous IC performance improvement, power loss and cost reduction, as well as miniaturization at the system level.

With the rapid LIN market growth, the requirements for ever-increasing system efficiency, higher integration and lower costs have increased as well. Similarly, the number of control switches for various applications has also increased. Applications where the switches are located very remote from the control

electronics and wires integrated within the wiring harness do require high-voltage switches. The Atmel ATA6642 SiP has been developed to fulfill these increasingly demanding market requirements.

Atmel ATA6642 LIN SiP

The new ATA6642 LIN SiP is designed for complete LIN-bus node applications, in particular for LIN switch applications. Integrating almost the complete LIN node, the device consists of two ICs within one package. The first chip is the ATA6641 LIN SBC, encompassing a LIN transceiver, a 5V regulator (up to 80mA load current), a window watchdog, an 8-channel high-voltage switch interface with high-voltage current sources

Simplifying the Design of Switch Applications with LIN Bus Connections

Daniel Yordanov, Berthold Gruber

© 2012 / www.atmel.com

Figure 2. ATA6641 LIN SBC Block Diagram

16-bit SerialProgramming

Interface(SPI)

HV Input

VoltageDivider

5VVoltage

Regulator

Control LogicInt. Oscillator

Window WatchdogWD Oscillator

LIN Physical LayerInterface

HV SwitchInterface Unit

(8x)

CS1IREFCSPWMMODE CS2 CS3 CS4 CS5 CS6 CS7 CS8

VS

VRLS

VCC

VBATT

VDIV

NCS

GND

AGND

CL15

SCK

MOSI

MISO

LIN

TXD

RXD

NIRQ

NRES

WDOSCNTRIG

Figure 3. AVR Core Block Diagram

PowerSupervisionPOR/ BOD

andRESET

OscillatorCircuits/

ClockGeneration

WatchdogTimer

WatchdogOscillator

ProgramLogic

debugWIRE

AVR CPU

EEPROM

DAT

A B

US

Flash

GND VCC

A/D Conv.

InternalVoltage

References

Timer/Counter-1

Timer/Counter-0

AnalogComp.SPI and USI

11

2

PORT B (8) PORT A (8) LIN/ UART

SRAM

AVCC

AREF

RESETXTAL[1; 2]

PB[0 to 7] PA[0 to 7]

and a 16-bit SPI for configuration and diagnostic purposes. The second chip is the Atmel AVR® ATtiny167 automotive 8-bit microcontroller with advanced RISC architecture and 16KB Flash memory.

With its industry-leading design, the ATA6642 offers designers great flexibility, so that the SiP can be used in various applications such as port/contact monitoring, switches (towards GND or VBAT), LED/ relay/ power transistor control or switches connected through the wiring harness.

Integrated LIN System Basis Chip

The block diagram in Figure 2 provides a basic overview of the structure of the ATA6641 LIN SBC.

The ATA6641 LIN SBC with its flexible operation modes (sleep mode and active low-power mode) guarantees a very low current consumption even in the case of a floating bus line or a short circuit on the LIN bus to GND. Special techniques ensure that the circuit switches back to sleep mode after approximately 10ms if the bus line is floating or if a short circuit occurs to keep the current consumption at a minimum level. In sleep mode the entire SiP is switched off, with a current consumption as low as 8µA. The SiP can be easily woken up via the LIN bus or CL15, and is ready to operate within a couple of microseconds. The LIN transceiver is compliant to LIN2.1 and SAEJ2602-2. The slope control at the LIN driver ensures secure data communication up to 20kBit/s. Data rates of up to 200kBit/s are also possible and enable high-speed data communication (for example, programming at line end over the LIN bus).

The window watchdog ensures a correct function of the microcontroller.

A total of eight high-voltage (HV) current sources with HV comparators and voltage dividers implemented in the HV switch interface are available for switch scanning. Using the HV current sources also enables direct driving of LEDs, relays and transistors. All eight are high-side current sources; three of them can also be switched to low-side current sinks.

The ATA6641 device's functionalities can be configured via the 16-bit SPI. This SPI interface simplifies and speeds up the configuration of the slave/master LIN node for any given application.

Integrated AVR MCU Functionality

The ATA6642 device's high-performance AVR core enables designers to build flexible and cost-effective embedded control applications. By executing powerful instructions within a single clock cycle, engineers can achieve throughputs approaching 1 MIPS per MHz, helping them, optimize power consumption


Figure 4. Basic Application Example

PA7

PB7

PA0

PA3

AVC

C

PA2

PA1

PB

0

PB

1

PB

2

NC

S

SC

K

MO

SI

MIS

O

NIR

Q

NR

ES

RX

D

PB6

VDD

PB4

PB5

CS4

CS5

PB3

48

361

12

24

3

LIN

VBAT

CL15

CS3

CS2

CS1

IREF

AtmelATA6642

CS6

CS7

CS8

VSTX

D

NTR

IG

VC

C

GN

DVDIV

WDOSC

PWM3

PWM2

PWM1

AG

ND

PA6

PA4

PA5

10kΩ 10kΩ

12kΩ

10nF

220pF

51Ω

VS

10nF

100nF

10nF

(1) DEBUG

100nF

100nF 2.2µF

22µF 100nF

NRES

TXD

NTR

IG

RXD

MIS

O

MO

SI

SCK

NC

S

PA2

NIRQ

PWM3

PWM2

NRES

NIRQ

VCC

47nF

+

+

51kΩ

10kΩ

PWM3

PWM2

MOSI_ISPSCK_ISP

VBAT

ISP

CL15

LIN

GND

SCK_

ISP

MO

SI_I

SP

NTR

IG

RXD

PA2

TXD

MIS

O

MO

SI

SCK

NC

S4

1VCCPA2

2

5NRES

6

(1) Note: If the watchdog shall be disabled directly after power-up (e.g. for microcontroller programming or debugging purposes) the pin VDIV must be tied to high level until the reset phase ends (positive slope at pin NRES).

USI used as SPI, because PA2 is used for third PWM signal.

versus processing speed. The AVR core combines a rich instruction set with 32 general-purpose working registers. All 32 registers are directly connected to the arithmetic logic unit (ALU), allowing the access of two independent registers in one single instruction executed within one clock cycle.

One of the AVR core's main features is the LIN UART, designed to match as closely as possible to the LIN software application structure, thus helping to save development time and CPU resourses.

A debug wire and an ISP interface are available to program the microcontroller.

Application Examples

Figure 4 shows a LIN slave application with the ATA6642 where several external devices are connected to the CSx pins of the HV switch interface. Only a minimum number of external parts is needed due to the device's very high level of integration.

Switch Control Application

Eight high-voltage I/O ports are the heart of the ATA6642; these ports make the device perfectly suited for switch control applications with higher ESD requirements. These I/O ports allow a very flexible control of up to eight single switches, a switch matrix or any combinations of both, as shown in Figure 4, supplied by an internal current source in the range of 5mA to 25mA. Three of the I/O ports can be configured either as current sources (i.e., for switches towards ground) or as current sinks (i.e., for switches towards battery); the other five pins serve for current sourcing only.

Each of the eight current sources delivers a constant current level derived from a reference value measured at the IREF pin. This pin is voltage stabilized (VIREF = 1.23 V typ.) so that the reference current directly depends on the externally applied resistor connected between the IREF pin and ground. The resulting current at the CSx pins is (1.23V/ RIref) x rICS. For example, with a 12kΩ resistor between IREF and GND, the value of the current at the CSx pins is 10mA (assuming IMUL


Figure 6. 3 x 3 High-voltage and 3 x 2 Low-voltage Switch Matrix Application

PA7

PB7

PA0

PA3

AVC

C

PA2

PA1

PB

0

PB

1

PB

2

NC

S

SC

K

MO

SI

MIS

O

NIR

Q

NR

ES

RX

D

PB6

VDD

PB4

PB5

CS4

CS5

PB3

48

361

12

24

LIN

VBAT

CL15

CS3

CS2

CS1

IREF

AtmelATA6642

CS6

CS7

CS8

VS

TXD

NTR

IG

VC

C

GN

D

VDIV

WDOSC

PWM3

PWM2

PWM1

AG

ND

PA6

PA4

PA5

10kΩ 10kΩ

10kΩ

12kΩ

10nF

47nF

51Ω

10nF

100nF

10nF

(1)DEBUG

100nF

100nF 2.2µF

22µF 100nF

NRES

3 x 2 Low VoltageSwitch Matrix

3 x 3 High VoltageSwitch Matrix

TXD

NTR

IG

RXD

MIS

O

MO

SI

SCK

NC

S

PA2

NRESNIRQ

VCC

+

+

51kΩ

VBAT

CL15

LIN

GND

SCK

MO

SI

NC

S

RXD

TXD

MIS

O

NIR

Q

NTR

IG

(1)Note: If the watchdog shall be disabled directly after power-up (e.g. for microcontroller programming or debugging purposes) the pin VDIV must be tied to high level until the reset phase ends (positive slope at pin NRES).

Figure 5. Principle Schematic of a High-side / Low-side Switch Interface

StateChangeDetector

AGND

IIREF × rlCS

IIREF × rlCS

VCSxth (4V)

MU

X

HVComp

VS

PWMY

CSx

VDIV

d_statechange_x

dout_cs_x

CSA[2 to 0]

VDIVP

VDIVE

CSE_x

CSSM_x

CSC_x

VBATT3R

R

= `0´ => rICS_H = 100). Missing and short-circuited resistors will be detected for failsafe reasons. In such cases, an internally generated reference current IIREFfs will be used instead to maintain a certain level of functionality.

Each switch input has a HV comparator, a state-change-detection register for wake-up and interrupt request generation, and a voltage divider with a low-voltage output that can be fed through to the measurement pin VDIV.

The I/O interface is shown in Figure 5.

The ATA6642 offers flexible switch monitoring. A state-change detection circuitry is implemented so that each input can be configured to trigger an interrupt upon state change even during low-power mode. Therefore, the respective current source needs to be configured so that it is controlled via the corresponding pin. A rising edge on this pin enables the current source and delivers a stable switch readback signal at the CS pin. With the falling edge on the corresponding PWMy pin, the switch state is updated. If a change of state is monitored, an interrupt request is generated. If no wake-up occurs on a certain switch—either because there is no application demand

for this, or due to a failure, e.g., a hanging switch or a shorted connection line—it can be prevented by disabling the current source in the SPI configuration register.


Port CS1 CS2 CS3 CS4 CS5 CS6 CS7 CS8

PWM1 X - - - - - X X

PWM2 - X - - X X - -

PWM3 - - X X - - - -

Table 1. CSx Port Configuration Table

Figure 7. LIN Slave for HV/ PWM Control with ATA6642 Microcontroller

PA7

PB7

PA0

PA3

AVC

C

PA2

PA1

PB

0

PB

1

PB

2

NC

S

SC

K

MO

SI

MIS

O

NIR

Q

NR

ES

RX

D

PB6

VDD

PB4

PB5

CS4

CS5

PB3

48

361

12

24

LIN

VBAT

CL15

CS3

CS2

CS1

IREF

AtmelATA6642

CS6

CS7

CS8

VS

TXD

NTR

IG

VC

C

GN

D

VDIV

WDOSC

PWM3

PWM2

PWM1

AG

ND

PA6

PA4

PA5

10kΩ 10kΩ

12kΩ

10nF

220pF

51Ω

10nF

100nF

10nF

(1)DEBUG

100nF

100nF 2.2µF

22µF 100nF

NRES

TXD

NTR

IG

RXD

MIS

O

MO

SI

SCK

NC

S

PA2

NIRQ

NRESNIRQ

VCC

47nF

+

+

51kΩ

10kΩ

VBAT

CL15

LIN

GND

SCK_

ISP

MO

SI_I

SP

NTR

IG

RXD

TXD

MIS

O

MO

SI

SCK

NC

S



If switches are placed outside and connected via a wiring harness to the ECU, the ATA6642 permits a complete diagnosis of short circuits or cable breaks. If ports are not used for switch detection, they can be switched off.

The ATA6642 comprises a high-precision current source for multi-resistor coding. The scan current through the switches can be chosen to be sufficiently high so that it cleans the switches.

Voltage Measurement Application

In addition to the high-voltage (HV) comparator for simple switches, the ATA6642 device's HV I/O ports are also equipped with a voltage divider. The low-voltage signal at the tap of the divider is linearly dependant on the input voltage and is provided at the VDIV pin to enable analog voltage measurements on the HV pins by using one of the AVR core's ADC pins.

The VDIV pin guarantees a voltage and temperature-stable output ratio of the selected input. It can be sourced either by the VBATT pin or by one of the switch input pins CS1 to CS8.

PWM Control Application

The ATA6642's switch interface current sources can be used to directly control pulse-width-modulated loads (i.e., switch scanning or LED driving). The PWM signal applied to the PWM1 to PWM3 input pin is used as control signal for the chosen current sources at the corresponding I/O ports. The assignment of the current sources to the three PWM input pins is shown in Table 1.

Depending on the application, it might be required to control the HV I/O ports with different PWM signals. The ATA6642 device's AVR core provides three different PWM signals. In


Figure 8. LIN Slave for RGB LED Control

PA7

PB7

PA0

PA3

AVC

C

PA2

PA1

PB

0

PB

1

PB

2

NC

S

SC

K

MO

SI

MIS

O

NIR

Q

NR

ES

RX

D

PB6

VDD

PB4

PB5

CS4

CS5

PB3

48

361

12

24

3

LIN

VBAT

CL15

CS3

CS2

CS1

IREF

AtmelATA6642

CS6

CS7

CS8

VS

TXD

NTR

IG

VC

C

GN

D

VDIV

WDOSC

PWM3

PWM2

PWM1

AG

ND

PA6

PA4

PA5

10kΩ 10kΩ

12kΩ

10nF

220pF

51Ω

10nF

100nF

10nF

(1)DEBUG

100nF

100nF 2.2µF

22µF 100nF

NRES

TXD

NTR

IG

RXD

MIS

O

MO

SI

SCK

NC

S

PA2

NIRQ

PWM3

PWM2

NRESNIRQ

VCC

100nF

+

+

51kΩ

10kΩ

PWM3

PWM2

MOSI_ISPSCK_ISP

VBAT

ISP

CL15

LIN

GND

SCK_

ISP

MO

SI_I

SP

NTR

IG

RXD

PA2

TXD

MIS

O

MO

SI

SCK

NC

S

4

1VCCPA2

2

5NRES

6

R

G

B

VS

(1)Note: If the watchdog shall be disabled directly after power-up (e.g. for microcontroller programming or debugging purposes) the pin VDIV mustbe tied to high level until the reset phase ends (positive slope at pin NRES).


those applications, a universal serial interface (USI) needs to be used instead of the hardware SPI. This is because of the dual function of the pin PA2 (SPI master input/ slave output and PWM output A for timer/counter0).

The USI provides the basic hardware resources for serial communication. Along with a minimum of control software, the USI allows for significantly higher transfer rates and uses less code space than merely software-based solutions. Interrupts are included to reduce the processor load.

RGB LED Control Application

With its constant current sources, the ATA6642 device is perfectly suited for LED control systems. The most typical application is shown in Figure 8, where the ATA6642 device controls an RGB LED. Depending on the current capability of

the applied LED, this LED can be connected to a single I/O HV port. The ATA6642 device is capable of driving up to 25mA per channel. In case a higher current is needed, two or more I/O HV ports can be combined.

ExampleControlling an RGB LED with the following forward current capabilities:

• Red = 20mA• Green = 20mA• Blue = 10mA

can be done by setting a constant current of 10mA for all I/O HV ports. 20mA are achieved by connecting two I/O ports. In the case of the blue LED, which is only capable of 10mA, only one of the connected I/O ports needs to be switched on.


Figure 9. LIN Slave Relay Driver

PA7

PB7

PA0

PA3

AVC

C

PA2

PA1

PB

0

PB

1

PB

2

NC

S

SC

K

MO

SI

MIS

O

NIR

Q

NR

ES

RX

D

PB6

VDD

PB4

PB5

CS4

CS5

PB3

48

361

12

24

3

LIN

VBAT

CL15

CS3

CS2

CS1

IREF

AtmelATA6642

CS6

CS7

CS8

VS

TXD

NTR

IG

VC

C

GN

D

VDIV

WDOSC

PWM3

PWM2

PWM1

AG

ND

PA6

PA4

PA5

10kΩ 10kΩ

12kΩ

10nF

51Ω

10nF

100nF

10nF

(1)DEBUG

100nF

100nF 2.2µF

22µF 100nF

NRES

TXD

NTR

IG

RXD

MIS

O

MO

SI

SCK

NC

S

PWM

1

PWM2

NRESNIRQ

VCC

+

+

51kΩ

PWM2

MOSISCK

ISP

SCK

MO

SI

RXD

MIS

O

TXD

NIR

Q

NTR

IG

4

1VCCMISO

2

5NRES

6

LIN

GND

VBAT

M

PWM1

NC

S


H-bridge Relay Control Application

The ATA6642 can also be used as a relay driver. In case the 20mA output current of each I/O port is not sufficient to drive the load, the output pins can be interconnected to achieve a higher load current.

In the example shown in Figure 8, three outputs are connected, so that the minimum achievable output current is 3 x 20mA = 60mA. As an additional safety feature, the CS1 and CS2 HV interface pins are used as sense inputs that monitor the proper relay operation.

The relays are configured as an H-bridge, which enables driving of a motor in both directions. A typical application example for such a configuration is a window lifter system.

Conclusion

With its system-in-package (SiP) architecture and rich set of features the ATA6642 fulfills the increasingly demanding market requirements for improved system efficiency, higher integration and lower costs. The SiP device offers designers extended flexibility and is well suited for a broad range of LIN-related applications such as port/contact monitoring, switches (towards GND or VBAT), LED/ relay/ power transistor control or switches connected through the wiring harness.

© 2012 Atmel Corporation. All rights reserved. / Rev.: Article-AC9-Symplifying-The-Design-Of-Switch-Applications_V2_042015

Atmel®, Atmel logo and combinations thereof, and others are registered trademarks or trademarks of Atmel Corporation or its subsidiaries.

Other terms and product names may be trademarks of others.

Disclaimer: The information in this document is provided in connection with Atmel products. No license, express or implied, by estoppel or otherwise, to any intellectual property right is granted by this document or in connection with the sale of Atmel products. EXCEPT AS SET FORTH IN THE ATMEL TERMS AND CONDITIONS OF SALES LOCATED ON THE ATMEL WEBSITE, ATMEL ASSUMES NO LIABILITY WHATSOEVER AND DISCLAIMS ANY EXPRESS, IMPLIED OR STATUTORY WARRANTY RELATING TO ITS PRODUCTS INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, OR NON-INFRINGEMENT. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT, CONSEQUENTIAL, PUNITIVE, SPECIAL OR INCIDENTAL DAMAGES (INCLUDING, WITHOUT LIMITATION, DAMAGES FOR LOSS AND PROFITS, BUSINESS INTERRUPTION, OR LOSS OF INFORMATION) ARISING OUT OF THE USE OR INABILITY TO USE THIS DOCUMENT, EVEN IF ATMEL HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. Atmel makes no representations or warranties with respect to the accuracy or completeness of the contents of this document and reserves the right to make changes to specifications and products descriptions at any time without notice. Atmel does not make any commitment to update the information contained herein. Unless specifically provided otherwise, Atmel products are not suitable for, and shall not be used in, automotive applications. Atmel products are not intended, authorized, or warranted for use as components in applications intended to support or sustain life.

Atmel Corporation 1600 Technology Drive, San Jose, CA 95110 USA T: (+1)(408) 441-0311 F: (+1)(408) 487-2600 | www.atmel.com

Documents

Simplifying Applications Connections - Microchip …ww1.microchip.com/...symplifying-the-design-of-switch-applications.pdf · second chip is the Atmel AVR® ATtiny167 automotive 8-bit