0.5 1 1.5 2Voltage HVL2

468

10Current HmAL

Diode

Material: p-type n-type

Designation: Anode Cathode

Symbol:

PositiveCurrent flow:

Simplified equivalent circuit

Forward bias

Reversebias

Vγ

closed open

Vγ is the cut-in voltage, which is material dependent

Si: Vγ ~ 0.6-0.7 VGe: Vγ ~ 0.2 V

Vγ

Ideal diode

Simplified model

Real diode

Diode: Continues

D1

Half-wave rectifier

VS RL Vout+

-

VD1

-Vm

Vm

VL

D1 ON D1 OND1 OFF D1 OFF

VS

positive cycle

Equivalent circuit

negative cycle

V

t

Diode: Continues

Full-wave rectifier

D1

VS

D2

D3D4

+-

2VD(ON)

-Vm

VmVL

D2 OND4 ON

D1 OND3 ON

D2 OND4 ON

D1 OND3 ON

V

t

VS

Transistor

N P N

VEE VCC

Collector (C)Emitter (E) Base (B)

IB

ICIE

Structure of an npn transistor

PNP

Base

Collector

Emitter

Circuit symbolNPN

Emitter

Base

Collector

Transistor operation modeCut off Switch (Open state)Forward Active AmplifierSaturation Switch (Closed state)Reversed Active Rarely used

Transistor: Forward Active Mode

Characteristic curves for an npn transistor in the common-emitter configuration

C EI Iα=

E C BI I I= +

C BI Iβ=

IB

IE

IC

From KCL, we get

VBE

the base-emitter junction acts as a forward biased diode, thus has a voltage dope of ~ 0.6 V

α values of commercial transistors are betweens 0.95 - 0.99

From transistor action

(1)

(2)

Eq. (1) and (2)

Where β = α/(1−α) =current gain (also used hFE)

V 7.06.0~ −BEV

yesyesyesPower gain

noyesyes Voltage gain

35 Ω200 kΩ3.1 M ΩOutput resistance

580 kΩ3.5 kΩ30 ΩInput resistance

Yesyesno Current gain

Common Collector

Common Emitter

Common Base

Configuration

The values depend upon the particular transistor and other circuit components. To obtain the values int this table, a 2N3904 transistor was uses with RL = 5000 Ω and Rs = 500 Ω

Example of Transistor Circuit Properties

Transistor: Continues

Transistor: Common Collector

VBBVCC

Vout+

-RL

IE

IB

Ri

VCC

VBB

Vout

Simplified diagram 0.7 Vout BB BE BBV V V V= − ≈ −

Thus, we can easily see that Vout follows the input voltage (differed by VBE drop, and also called Emitter follower)

( 1)BB BE E L BE B Li

B B B

V V I R V I RRI I I

β+ + += = =

If VBE can be neglected, the input impedance is therefore equal to (β+1) times RL( 1)i LR Rβ≈ +

Transistor: Common Collector

Given β = 100VCC = 9 V, RL = 10 kΩ

and Vin = 0-5V triangular wave

Simulate using a SPICE progarm:

Vin

Vout

~0.6-0.7V

VoutVin

cut-off

JFET

Source (S)

Gate (G)

Drain (D)

Channel

p pn

S

GG

vGS

vDS (small)

Depletion region

Depletion region

iD

iG

S

GG

vGS (constant

vDS (large)

iD

iG

Depletion Region widens as vDS is increased, until the channel is pinched off

JFET: Continues

2(1 )GSD DSS

P

VI IV

= −

Circuit symbol

n-channel

G

D

S

p-channel

G

D

S

2

2 1 1GS DS GSD DSS

P P P

V V VI IV V V

= − − −

Cutoff: , 0GS P DV V I< =

Triode region: 0, P GS DS GS PV V V V V≤ ≤ ≤ −

Saturation (pinch-off) region:

0, P GS DS GS PV V V V V≤ ≤ ≥ −

where IDSS = the drain-to-source current with the gate shorted to the source

Vp= the pinch-off voltage

JFET: Source Follower

To get ID and Vout, we must solve the above two equaitons simultaneously.

VDD

VGG

Vout

RLRL ID

VGS

Use KVL: 0GG GS D LV V I R− + + =

( )1D GG GS

L

I V VR

= −

If we assume that the n-channel JFET is in the saturation region, therefore, we can write the ID-VGS relation as

2

1 GSD DSS

P

VI IV

= −

(1)

(2)

2

1 GSD DSS

P

VI IV

= −

IDSS

ID

VGS VP

VGG/RL

VGG

( )1D GG GS

L

I V VR

= −

JFET: Source Follower

Given ID = 1 mA, VP = -2 VVDD = 9 V, RL = 10 kΩ

and Vin = 0-5V triangular wave

Simulate using a SPICE progarm:

Vin

Vout

Vin Vout

Given β = 100ID = 1 mA, VP = -2 V

VDD = 9 V, RL = 10 kΩand Vin = 0-5V triangular wave

JFET: Source Follower

Vout

Vin

VinVout

_

+

InvertingInput

VEE(-)

VCC(+)

Non-invertingInput

Output_

+

Operational Amplifier: Op Amp

(a) Electrical Symbol for the op amp (b) Minimum connections to an op amp

Ideal Op Amp Rules:1. No current flows in to either input terminal2. There is no voltage difference between the two input terminals

I1

I2

V-V+

Rule 1: I1 = I2 = 0; R+/- = ∞Rule 2: V+ = V-; Virtually shorted

Vout

Inverting Amplifier

_

+

Rf

R1

vout

+

-vin

KCL

A

Use KCL at point A and apply Rule 1:

1

0A in A out

f

v v v vR R− −

+ =

(no current flows into the inverting input)

Rearrange

1 1

1 1 0in outA

f f

v vvR R R R

+ − + =

Apply Rule 2: (no voltage difference between inverting and non-inverting inputs)

Since V+ at zero volts, therefore V- is also at zero volts too. 0Av =

1

0in out

f

v vR R

+ =1

fout

in

Rvv R

= −

Inverting Amplifier: another approach

Given vin = 5sin3t, R1=4.7 kΩ and Rf =47 kΩ

vout = -10vin = -50 sin 3t mV

_

+

Rf

R1

i

i

vout

+

-vin

No current flows into op amp

Since there is no current into op amp (Rule 1)

0f outV iR v−− + + =

From Rule 2: we know that V- = V+ = 0, and therefore

1

inviR

=1 0inv iR V −− + − =

0

0out fv iR= −

Combine the results, we get

1

fout

in

Rvv R

= −

1 2 3 4 5 6time

-60-40-20

204060

mV

vin

vout

Non-inverting Amplifier

Rf

R1

vout

+

-vin

KCL

A

Use KCL at point A and apply Rule 1:

1

0A outA

f

v vvR R

−+ =

Apply Rule 2:_

+in Av v=

1

1 fout

in

Rvv R

= +

Given vin = 5sin3t, R1=4.7 kΩ and Rf =47 kΩ

vout = 11vin = 55 sin 3t mV 1 2 3 4 5 6time

-60-40-20

204060

mV

vin

vout

Summing Amplifier: Mathematic Operation

Use KCL and apply Rule 1:

31 2 0A A outA A

f

v v v vv v v vR R R R

− −− −+ + + =

_

+

Rf

Ri1

vout

+

-v1

v2

v3

i2

i3

R

R

i

vA

vB

1 2 3i i i i= + +

Since vA = 0 (Rule 2)

( )1 2 3f

out

Rv v v v

R= − + +

Sum of v1, v2 and v3

_

+

Difference Amplifier: Mathematic Operation

Use KCL and apply Rule 1:

1

1 4

0A outA v vv vR R

−−+ =

R1

vout

+

-v1v2

R2

vA

vB Since vA = vB (Rule 2) and

32

2 3A B

Rv v vR R

= = +

Substitute eq. (2) into eq. (1), we get

R3

R4

(1)

(2)

31 4 12

4 1 4 2 3 1

outv RR R vvR R R R R R

+= − +

If R1 = R2 = R and R3 = R4 = Rf ( )2 1f

out

Rv v v

R= −

Difference of v1and v2

Differentiator and Integrator: Mathematic Operation

_

+

_

+

Differentiator

Integrator

R

vin

C

C

R

vin

i

vout

+

-

vout

+

-

i

i

i

vc+ -

outv iR= −

But Cdvi Cdt

= in Cv v=and

inout

dvv RCdt

= −

out Cv v= −

But0

1( ) (0)t

C Cv t idt vC

= +∫ inv iR=and

0

1 (0)t

out in Cv v dt vRC

= − +∫