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RSH Front End Electronic R. Beaujean, S. Böttcher Kiel Nov 07, 2005

RSH Front End Electronic R. Beaujean, S. Böttcher Kiel Nov 07, 2005

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Page 1: RSH Front End Electronic R. Beaujean, S. Böttcher Kiel Nov 07, 2005

RSH Front End Electronic

R. Beaujean, S. Böttcher

Kiel Nov 07, 2005

Page 2: RSH Front End Electronic R. Beaujean, S. Böttcher Kiel Nov 07, 2005

Front End Electronic Block Diagramm

Feed back network: Cf and Rf (parallel)

Cf (pF) defines sensitivity : (44/Cf ) mV/MeV (for Si)

Rf (MegOhm) defines time constant of discharging (pile up)

shaping amplifier: signal level conditioning for ASIC input improves signal to noise ratio can select fast charge collection

Detector FET + OpAmp shaping amp

Feed back

CSA

Page 3: RSH Front End Electronic R. Beaujean, S. Böttcher Kiel Nov 07, 2005

CSA Noise considerations:

increasing with:

detector capacitance (e.g. 85 pF @ 300 um, 2 cm²)

detector dark current ~ SQRT(Id)

(doubles every 8 degree K)

decreasing with: increasing FET current

noise ~ 1/SQRT(gm); gm~SQRT(Id)

gm (mutual conductance, forward transfer admittance)

is the parameter we can influence by selecting the type of FET

and the FET drain current (--> power consumption).

Page 4: RSH Front End Electronic R. Beaujean, S. Böttcher Kiel Nov 07, 2005

CSA noise versus input capacitance (typical FET)

Page 5: RSH Front End Electronic R. Beaujean, S. Böttcher Kiel Nov 07, 2005

Range of Energy Deposit Measurements in Si

The minimum detectable energy deposit must be ~ 60 keV (well below 115 keV of MIPs in 300 um Si)

assuming a dynamic range of 10k for the analogue section, this gives an upper limit of 600 MeV energy deposit

Maximum output voltage of the CSA is ~3 Volt

--> Cf = 44 mV * 600 MeV / 3V = 8.8 pF

the CSA output for 60 keV energy deposit is then 0.3 mV

Page 6: RSH Front End Electronic R. Beaujean, S. Böttcher Kiel Nov 07, 2005

0

1x103

2x103

3x103

0 200 400 600

11/04/05

Cf =2 pF

Cf= 10 pF

11/04/05

energy deposit in Si /MeV

CS

A o

utpu

t /m

V

CSA output with Si detector

Page 7: RSH Front End Electronic R. Beaujean, S. Böttcher Kiel Nov 07, 2005

How to improve the resolution for required energy deposit range at given ADC resolution

For CsI and BC430M:

Photodiode1+ CSA1 with low Cf for low E events (high gain)Photodiode2+ CSA2 with med. Cf for med. E events (med. gain)Photodiode3+ CSA3 with high Cf for high E events (low gain)

For SSD (A, B, C detectors) :

only 1 block of SSD-detector + CSA

behind the CSA two independent shaping amplifiers with low (x1) and high (x16) gain respectively (the CSA defines the dynamic range).

Page 8: RSH Front End Electronic R. Beaujean, S. Böttcher Kiel Nov 07, 2005

Layout of typical CSA (Kiel) for PIN2774

Page 9: RSH Front End Electronic R. Beaujean, S. Böttcher Kiel Nov 07, 2005

0

2x103

4x103

6x103

8x103

10 20 30 40

eqn: y=c*exp(-0.5*(x-a)2/b2), R:305,a=29.6739, b=1.50803, c=5578.24

59.5 keV AM241

11/04/05

channel

coun

ts

PIN2744

Kiel-CSA + 2 cm² detector: rms noise ~ 3 keV

Page 10: RSH Front End Electronic R. Beaujean, S. Böttcher Kiel Nov 07, 2005

Components

small size, SMD active components required

1. FET: BF862 SOT23-3 plastic package

equivalent noise input voltage 0.8 nV/Hz input capacitance 10 pF

transfer admittance gm 45 mS typ.

2. OpAmp: AD8005 SOT23-6 plastic package

low quiescent current ~ 400 uA low noise, high slew rate,

plastic packages have to be qualified for flight

Page 11: RSH Front End Electronic R. Beaujean, S. Böttcher Kiel Nov 07, 2005

Quiescent Power consumption

CSA: FET drain Id~ 4mA @ 3V; amplifier 0.5 mA@ +-5Vnoise critical FETs may be operated with Id>4 mA,

less critical FETs may be operated with Id<4 mA

shaping amplifier: 0.5 mA@ +-5V

Interface to ASIC

positive output signal, shaping time TBD (1-5 us)