RISC-V: Opportunities and Challenges in SoCs · 11/12/2018 · 21 Appeal to the community •Come together, participate and standardize! Bring experience & expertise => build the

RISC-V: Opportunities and Challenges in SoCsGreg Wright

Sr Director, Engineering

Qualcomm Technologies, Inc.

@qualcommDecember 5, 2018 Santa Clara, CA

2

Introductions

• Who am I?

• Why am I here?

3

Quick tour of an SoC

Greg Wright - RISC-V Summit December 2018

4

Quick tour of an SoC


GPU Video Camera Audio GPS

Secure

coreLTE

modem

Wifi PCIePower

mgmt

Sensors

DDR

Power-optimized CPU cluster

Perf-optimized CPU cluster

Crypto

Interconnect

5

Complex system

• Multiple ISAs and software stacks

• Multiple roots of trust

• Multiple power domains

• Multiple product tiers and configurations

• Multiple development cycles across different components


6

All across the spectrumScale of CPUs


Tiny microcontroller

Application processor

Embedded core

DSP

GPU

Minimal area, power Known functionality &

Perf/power requirements

Specialized application processing

Some third party code

General purpose

7

Power envelope


“Always on” ≈2 W

8

ISA & microarchitecture


Single-issue

in-order RISC

Wideout-of-order

RISC + SIMD

VLIW DSP

Multithreaded GPU

Vector

Other customization

9

Software stack complexityLines of code – order of magnitude


80 million*100s

* Not including 3rd party applications

10

ISA features and extensions


High-level features

Multi-vendor standard

3rd party ecosystemMinimal

Customized for

• Signal processing

• Image processing

• Security

• Machine learning

• …

At least 6 different ISAs in use today in a single SoC

11

RISC-V: The opportunityThe power of freedom and open community


Customization

+Harmonization

Mix-and-match extensions

Domain-specific features

Proprietary extensions (“secret sauce”)

Spectrum of implementations (freedom to build)

Common base

Shared toolchains, infrastructure, libraries

Rich software ecosystem

12

What is ISA?Two views


Software

Hardware

Interface “Contract”Software Team

Hardware Team

13

In practice


Time

Software

Interface

Hardware

14

What is ISA?

Instruction Set Architecture, noun

My definition


The art of turning a hardware problem

into a software problem

15Greg Wright - RISC-V Summit December 2018

“Contract”

Software Ecosystem

Hardware

Developers

Design

Points

Solutions

Means to an end

16Greg Wright - RISC-V Summit December 2018

“Multiple

Contracts” ?

Software Ecosystem

Changing over time?Hardware

Developers

Design

Points

17

RISC-V: The opportunityThe power of freedom and open community


Customization

+Harmonization

Mix-and-match extensions

Domain-specific features

Proprietary extensions (“secret sauce”)

Spectrum of implementations (freedom to build)

Common base

Shared toolchains, infrastructure, libraries

Rich software ecosystem

Tension

18

Core spectrum revisited


Tiny microcontroller

Application processor

Embedded core

DSP

Minimize architectural tension

Common toolchains, debug infrastructure, libraries

Third party software ecosystem

Security, Virtualization

19

RISC-V: The opportunity

•Great potential

◦ Common base + ability to specialize where necessary

◦ Enthusiastic community

•Opportunity to rationalize and simplify complex SoC design

◦ Enable new features and capabilities


20

RISC-V: Some challenges

• Success = Attractive platform for solving problems

◦ Software portability• Feature discoverability, not a unique software build per target

◦ Interface stability vs evolution

◦ Balancing hardware vs software needs

• Fragmentation is the enemy

◦ Avoid a labyrinth of options, configurations, platforms• => Software and hardware test nightmare

◦ Complex software needs standardization and stability

◦ Good standards support a range of implementations and future evolution


21

Appeal to the community

• Come together, participate and standardize!

◦ Bring experience & expertise => build the future on lessons of the past

• Lower-end and (future) high-end cores need to play nicely in a complex SoC environment:

◦ Security

◦ Virtualization

◦ Memory models

◦ Cache & TLB management

◦ Power management

◦ Interrupt delivery

◦ Coexistence with current solutions (bus protocols, etc.)

• Great potential – let’s make this happen!


Common platform

= reusable software

= growing ecosystem

22

An announcement

Qualcomm Technologies, Inc., will be

shipping RISC-V in a high volume

product in 2019


Follow us on:

For more information, visit us at:

www.qualcomm.com & www.qualcomm.com/blog

Thank you!

Nothing in these materials is an offer to sell any of the

components or devices referenced herein.

©2018 Qualcomm Technologies, Inc. and/or its affiliated

companies. All Rights Reserved.

Qualcomm is a trademark of Qualcomm Incorporated,

registered in the United States and other countries. Other

products and brand names may be trademarks or registered

trademarks of their respective owners.

References in this presentation to “Qualcomm” may mean Qualcomm

Incorporated, Qualcomm Technologies, Inc., and/or other subsidiaries

or business units within the Qualcomm corporate structure, as

applicable. Qualcomm Incorporated includes Qualcomm’s licensing

business, QTL, and the vast majority of its patent portfolio. Qualcomm

Technologies, Inc., a wholly-owned subsidiary of Qualcomm

Incorporated, operates, along with its subsidiaries, substantially all of

Qualcomm’s engineering, research and development functions, and

substantially all of its product and services businesses, including its

semiconductor business, QCT.

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RISC-V: Opportunities and Challenges in SoCs · 11/12/2018 · 21 Appeal to the community •Come together, participate and standardize! Bring experience & expertise => build the