RF & Microwave Measurement Symposiumand Exhibition

fM Design Techniques in Phuli> Lodr. 1.oops

David Whipple

FM Design Techniques inPhase Lock Loops

General Phase Locked Loop

Building blocks

Bode plot

Out of Band FM

Out of Band Frequency Response

In Band Frequency Response

Combined FM Paths

Phase Deviation Limits

Gain Correction in Variable Frequency Loop

Sag of AC Coupled System

Phase Deviation of Digital Signal

Characterization of a Crystal Filter

Well Behaved VCO

Frequency Errors of DC FM

HP 8656B

Kv Correction

Sample for Fixed Number of VCO Cycles

Three State Prescaler

Analog Comparators

Sample/Hold Integrator

FM Integrator/Comparator Wave Forms

Integrate Waveforms With Square Wave Input

DC FM Spurious Signals

Low Offset Audio Path

FM Integrator With AC Corner

Digital Feedback

HP 8656B FM Specifications

BiographyDavid Whipple

David received his BSEE and MSEE degrees in1972 and 1973 from Purdue University. He wasproduction engineer on the HP 8672A SignalGenerator for the new product introduction. In1979 he accepted the position of productionengineering manager as part of the first wave oftransfers to the new division in Spokane, Washing­ton. In 1981 he moved into the research and devel­opment area as a project manager on the HP 8656BSignal Generator. Technical fields of interestinclude feedback control theory, high-frequencyapplications, and metrology.

FM DESIGNTECHNIQUES

IN PHASE LOCK LOOPS

1173The Phase Locked Loop is the general building block oftoday's indirect synthesizers. Their use in signalgenerators is widespread. The mathematical model ofthe phased locked loop uses linear feedback controltheory. Building blocks are a voltage controlled oscilla­tor (VeO), a divide by N block, a phase detector, ablock simply labeled F(s) which is the gain, poles, andzeroes needed for lock, and a suitable reference frequency.

1174The equations of motion for each of the blocks isshown here. The veo is characterized as having alinear relationship of frequency vs voltage at any givenoperating point. We shall see later that the lack ofconstant sensitivity as a function of frequency can be amajor problem. Note that in all the blocks, the varia­bles of interest are voltage and phase (not frequency).The Laplace operator/'s", in the denominator of the

~. veo equation indicates that its relation betweenvoltage and phase is that of an integrator. This isbecause phase is the integral of frequency, orconversely, the derivative of phase is frequency.

The divide by N block is a linear operator. By thisI mean that the liN equation holds for phase aswell as frequency.

The phase detector has a constant gain, Kv, whichrelates output voltage to input phase difference.

General PhaseLocked Loop

Ref.

Building Blocks

yco-B- .0 Ky

YIn - S

Divider --.j +N ~ ·0 1- --·In N

Phase~~= KDDetector ·In

Loop Yo~I F(s)~ F (I)-Filter Yin

Bode Plot

""'\.

"'", \\

1175The F(s) block contains gain and filtering and sets theloop bandwidth. It will be assumed that there is a gainterm, an integrator, a zero for stability, and anotherpole which will result in a loop Bode plot that lookssomething like this:

The loop bandwidth is chosen for reasons ofnoise, switching speed, spurious rejection, andinformation bandwidth.

40

30

20

1GH1l0

(dB) 0

-10

-20

-30100 lK 10K

Frequency (Hz)lOOK

Out of Band FM1176It is often desirable to frequency modulate the oscillatorin a PLL This works moderately well for frequenciesbeyond the loop bandwidth, but at lower modulatingfrequencies the loop tries to remove the modulation.This can be seen by looking at the transfer function forthis input.

Fout

Fee)

Ky( ).0 S= 211'5 --y-= (21r5) K KIn 1 +-y~ Fee)

5 N= 21rK y

1+ KyK D

5N

Out of BandFrequency Response

1177This is the typical frequency response of the transferfunction. For this I assumed that F(s) is a low passresponse at high frequencies.

21rKy-/-------'I

FOUl I iV:-I : Loop BWIn I

Frequency

In Band Response

1178The modulation bandwidth often needs to extend torates lower than the loop bandwidth. In this case, themodulation is preconditioned by a block which I labelE(s) and then summed in at the output of the phasedetector. E(s) is an integrator.

~--------i~~\--------.-~

veo

1179Shown here is the transfer function for this input.

In Band Response

<1>0Kv

F(s)S= Kv Ko1 +sNF(S)

FOUl _ ( 2 15 ) (<1>0)_VIR - 1/E (a) V1 -

1180This is the typical frequency response. Note that thevertical scale is phase in this case. If E(s) is an integra­tor, then FM vs Yin will have the same shape.

1181The out-of-band, high-pass response and the in-band,low-pass response are governed by the loop dynamics.When added with appropriate gain, the FM responseis flat.

In BandFrequency Response

Ie:: I1t 1------,.

KG ~OP8W~Frequency

Combined FM Paths

Vin

VCO

r----..I~I---~..FOUl

Ns

Combined FM Paths

E(s) = KvKdN s

1182When the two paths are used in parallel, superpositiongives the total response. If the frequency response is tobe flat, the poles and zeroes must be in the samelocations, or

It should be noted here that the frequency response isflat, but the sensitivity changes with both Kv and N. Ifthe PLL is to have a known sensitivity, then both Kvand N must be taken into account.

Note that E(s) is an integrator. If the Kv of the oscilla­tor and the Divide number N of the loop are constant,then the FM sensitivity is held constant. Theseconstraints mean that the PLL must operate at aconstant center frequency, or that additional compensa­tion circuits be added.

Fout _ 21rK v---"----------'--V.n -F (a) E(a) + 2 l' K v

Kv Ko1+sN F(s)

1+E(a) F(a)= 21rKv K Ko

1 v F+sN (al

For Flat Response, Zeroes = Poles orKv KD

E(sl =

Phase Deviation Limits

1183One of the physical limitations is the maximum phasedeviation, or modulation index, Beta (FM deviationdivided by FM rate). This is usually set by the dynamicrange of either the phase detector or the FM integrator.The larger the divide number, N, the larger the Betacan be because the angular displacement seen by thephase detector multiplies by N at the VCO. The outputof the FM integrator also multiplies by N to the VCO.

The negative aspect of the large divide number is thatthe loop bandwidth is very narrow. This causes theloop to be more susceptible to microphonics and theresidual FM might not be as good as could be with awider bandwidth.

Gain Correction inVariable Frequency Loop

veo~

Ref.

Set

1184A major decision to be made in the initial design of asignal generator is how to implement FM. The decisionis whether to increase the complexity in the number ofphase locked loops (a dedicated FM loop), or to imple­ment FM in a variable frequency loop (correction forchanging Kv and N). In general, higher performance isachieved in a dedicated loop.

1185A feature that is becoming increasingly important is DCcoupled FM. Digital radio manufacturers' use DCFM toimprove the accuracy of test signals. AC coupled FMconverts square waves into exponentials. This does twothings. First, it approaches the digital thresholds as thetest stimulus sags. This can significantly degrade the biterror rate, particularly at low signal levels.

The other negative effect is an expansion of the RFsignal. Stated another way, the center frequency walksaround, possibly straying outside radio's IF bandwidth.

1186Another limitation of AC coupled FM is the maximumallowable modulation index, beta. The actual limit maybe due to either the FM integrator or the phase detec­tor. A long string of l's or O's results in an extremelylarge beta. For instance, a 4 kHz deviation will accumu­late more than 2500 radians in only .1 second. This isnot an unreasonable demand for a signal generator.

Sag of AC Coupled System

I

Phase Deviationof Digital Signal

T T

<I> =) 6 W dt = ) 2 1r 6 F dt~o ~o

2513 Radians

o

\ .1<I>= } 211'4000 dt

<1>== 25133t

.1

o

1187Signal Generators are often used as a general purposestimulus. The HP 8505A (opt 005) allows for an exter­nal source which is needed to test narrow banddevices. This basically makes a clean narrow bandsweeper out of the signal generator.

Characterizationof a Crystal Filter

• r.s.,-.... -•.••"'1...

It-+--ft--+---I .........,

Well Behaved VCO

1---- rlIlll-RecoveredDigital 41» M

ThresholdDetector

1188Another application is as a well behaved VCO. In thisexample, the signal generator is the local oscillator for aphase locked receiver. The DC FM port is the feedbackpath to enable the receiver to lock.

\.

Frequency Errorsof DC FM

FrequencyError

Toffset

Slope = Drift Rate

Time

1189DC FM provides exact signal representation. There isno sag, and it allows for infinite beta. There are,however, tradeoffs. The center frequency is no longerlocked to the reference which results in frequency offsetand frequency drift. DC FM is usually implementedwith an unlocked VCO. Several instruments use inter­nal calibration to reduce the frequency offset. Thefrequency drift remains. Typical radio requirements arefor total frequency error to be less than 500 Hz.

794The HP 86568 sets new standards for DC FM perform­ance. A technology has been developed to dramaticallyimprove DC FM. This method allows center frequencyaccuracy to be specified at better than 500 Hz over allcenter frequencies, deviations, and environmentalconditions (0-55°C, 95% humidity).

I--,------j~J---

1190The HP 8656B uses a variable frequency loop for FMgeneration, as did the HP 8656A. This requiresadditional circuitry to compensate for changes in theVCO sensitivity, Kv, and for the variable N number ofthe loop. Shown here is the Kv compensation.

Kv Correction

MultDac

VCO

!'" F =/":, VK/":,V =/":, ~

KyF = 200Khz

Latch AID

ctl2

1191The sensitivity of the phase node is multiplied by N.Compensation is needed as N changes. The summingnode after the phase detector in the HP 8656B is reallya current summing node. The current output of the FMintegrator is sampled for a fixed number of VCO cycles.As the frequency goes up, N increases and the dutycycle of the sampler decreases. As the frequency goesdown, the duty cycle goes up. The relationship isproportional to 1IN.

N CorrectionCurrent Source from

--------,Phase Detector

FM Intergrator

Sample for FIxedNumber of VCOCycles

1192The HP 8656B uses a prescaler in the FM Phase LockedLoop. It has the ability to divide by 9, 10, or 11. Thenormal mode is 10, and the 9 or 11 modes are used toadd an extra cycle or delete one cycle from the overalldivide number. This results in an added or subtractedtwo pi radians at the VCO.

Three State Prescaler

: 9,10,11

Add Delete

Analog Comparators

--1~~Add I IDelete

';'-N-1

';'-N

';'-N+1To FM SumNode(IN Band)

HI

1193The heart of the FM scheme is a transfer of phaseoffset from the FM integrator into the digital dividersinside the loop. This transfer is done in exact cyclesadded or removed. A current source is injected orremoved from the input of the FM integrator for acontrolled period to transfer the phase out of theintegrator. Comparators are used to detect the output ofthe FM integrator (which is the instantaneous phase) tosignal the need to reset the integrator.

FM InPhase UmltDetectors

Lo

Sample/Hold Integrator

FM--Ref.

1194Both the FM integrator reset and the divide numberchange need to happen during the same referenceperiod. The timing diagram for controlling the loopallows integrator reset only when the sampler is off. Inaddition, there is a second integrator (part of the F(s)block) that allows the two events to settle so that theloop is not perturbed.

/

Add

Ideal

FM Integrator WaveformsSinewave Input

~

1195The output of the FM integrator will have a response tovarious inputs that looks something like this:

Delete I I \.

Ideal

1196The output of the FM integrator will have a response tovarious inputs that looks something like this: FM Integrator Waveforms

Square Wave Input

~~ L

Transfer

Add

Delete

II

IIII

III

1197Any inaccuracy in the reset of the integrator will resultin a phase perturbation that is undesirable. If theresets are held to a constant rate (fixed DC deviation),then a discrete spurious will result. In the HP 8656B,the spurious level is better than -50 dBc. These spuri­ous signals are attenuated by the PLL dynamics,which is an equivalent 2 kHz low pass filter. It shouldalso be noted that sinusoidal FM signals result in adistributed spurious.

DC FM Spurious Signals

-50 dBc

~

1198The DC FM performance of a phase locked loop withphase transfer is exceptional. Since the oscillatorremains locked to the reference, the positive character­istics of the PLL are retained. These include the noisecleanup, and suppression of microphonics. In addition,the oscillator is not free running. It is locked to thereference; only the DC offsets at the FM integratorresult in frequency error.

Low Offset Audio Path

LInput

Input Gain• -DC FM Buffers Adjust To PL

1199Many customers need the frequency accuracy of asynthesizer when performing tests that do not requireDC FM. AC FM needs to have synthesized centerfrequency for these tests. Any DC offset at the input ofthe FM integrator will result in a frequency error. Phasefeedback is required to compensate for this effect.Phase feedback is achieved using a feedback resistor inthe integrator and, in addition, using digital feedback.

1200In the AC mode, the feedback current through theresistor should be proportional to the instantaneousphase offset. The steps in the output are lost current inthe feedback path. To make up this lost current, a DAChas been added that has its LSB set to be the equiva­lent of one reset step on the output of the integrator.The counter is set to 50% when entering AC FM, andthe DAC is offset so that there is no extra feedback current.

FM Integrator withAC Corner

1000pF

Digital Feedback

Reset~

eLK

Addl U/D

Subtract

1201The result of the digital FM technologies developed forthe HP 8656B is a new standard for FM performance.AC FM has retained high performance and the DCcoupled FM has achieved better stability than ever before.

Up/Down Counter

HP8656B Signal GeneratorFM Specifications

AC-FM

1000-1094 April 1986

Corner FrequencyBeta Max

DC-FMOffset

Drift

1 Hz

4000 Radians

<500 Hz

<10 HzlHr

Printed in U.s.A.