Rev. Code i.MX6 SMART DEVICE SYSTEM

TITLE PAGE

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Wednesday, July 09, 2014

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SOURCE:SCH-27392 PDF:SPF-27392

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19

MCIMX6Q-SMART DEVICE PLATFORM

PUBI:

FIUO:

FCP:

ICAP Classification:

Page Title:

of

Sheet

Date:

Rev

Document Number

Size

Drawing Title:

CPU SIGNAL

DDR3 MEMORY

eMMC, SPI NOR FLASH

SD CARD, SATA

LVDS, HDMI

EPCD EXP PORTS

CAMERA, EXP PORT

SENSORS

AUDIO

USB

EHTERNET

JTAG, DEBUG

mPCIe CONN

AUX SDIO CONN, CAN

GPS MODULE

AUX VOLT REG

Table of Content

TITLE PAGE

CPU POWER

Page 1

Page 2

Page 3

Page 4

Page 5

Page 6

Page 7

Page 8

Page 9

Page 10

Page 11

Page 12

Page 13

Page 14

Page 15

Page 16

Page 17

Page 18

i.MX6 SMART DEVICE SYSTEM

Revision History

Rev. Code

Date

Description

1. Unless Otherwise Specified:

All resistors are in ohms, 5%, 1/16 Watt

All capacitors are in uF, 20%, 50V

All voltages are DC

All polarized capacitors are Tantalum

3. Interrupted lines coded with the same letter or letter

combinations are electrically connected.

4. Device type number is for reference only. The number

varies with the manufacturer.

5. Special signal usage:

_B or 'n' Denotes - Active-Low Signal

<> or [] Denotes - Vectored Signals

6. Interpret diagram in accordance with American

National Standards Institute specifications, current

revision, with the exception of logic block symbology.

GENERAL DESIGN NOTES

DC Voltage Output: 5VDC

-

+

AC ADAPTER SPECIFICATIONS

Outer Diameter: 5.5mm

Inner Diameter: 2.1mm

Polarity:

Current Output: ~ 5A (depending on application)

Page 19

Page 20

Page 21

BATTERY CHARGER

PF0100 PMIC

BOOT SELECT

BUILD OPTION TABLES

Page 22

Page 23

PIN MUX TABLE

Page 24

COMM CHANNEL STEERING

MCIMX6Q-SDB, MCIMX6Q-SDP, MCIMX6DL-SDP

TEMPORARY DEVIATIONS

Page 25

2. Critical compenents that require tolerances tighter

than listed in Note 1are labeled with required tolerance

on schematic. Non-critical components may be filled

with tighter tolerance parts for BOM consolidation

purposes, but may be changed to meet the general

tolerances of Note 1 if desired.

A

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CPU POWER

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PUBI:

FIUO:

FCP:


Page Title:

of

Sheet

Date:

Rev

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Size

Drawing Title:

-->

-->

MX6 power domains

under-BGA decoupling

(These capacitors are part of i.MX6 DDR3

Power Domain. They decouple pins shown

on Page 4 of these schematics)

{NVCC_CACHE POWER}

Extra Bulk Capacitors

NOTE:

In early designs of the Smart Device board, these bulk capacitors were used.

After testing of the board, it was found that these capacitors could be

removed with no effect. This reduces the capacitve loading on the internal processor

LDOs. The coponents/footprints have been left in place in the event that future

applications and/or software changes show that these capacitors are needed.

NOTE:

Freescale has validated two difference sets of decoupling capacitors and board layouts

for use with the i.MX 6 processor. The customer is free to choose the desired decoupling

scheme. This scheme uses fewer components. The alternate scheme can be found

on the ARD board. Refer to SCH-27142 and LAY-27142.

NOTE:

The VDDARM_CAP and VDDARM23_CAP rails have been optimized for use with the i.MX 6 Quad and i.MX 6 DualLite processors.

To achieve the lowest power mode (preventing internal leakage) when using the i.MX 6 Dual and the i.MX 6 SoloLite

processors, VDDARM_CAP should be split from VDDARM23_CAP and the VDDARM23_CAP pins should be connected to ground.

This can be done on a single board configured for use with all four processors by placing a Zero Ohm resistor between the

VDDARM_CAP and VDDARM23_CAP rails (in place of the straight net connection). To use the board with different processors,

populate the resistor when using Quad and DualLite processors and depopulate resistor when using Dual and SoloLite

processors. When using Dual and SoloLite processors, depopulate the capacitors attached to VDDARM23_CAP pins and

replace one of the capacitors with a zero Ohm resistor to short pins to ground. The configuration in this schematic will work with

all four processors, but will not result in the most power optimized configuration for the i.MX 6 Dual and Solo processors.

LAYOUT NOTE:

It is critical that the bulk and decoupling capacitors placed on the VDDARM_CAP, VDDARM23_CAP, VDDSOC_CAP

and VDDPU rails be placed directly underneath the processors. Development testing has shown that proper

placement of the capacitors can reduce ripple on the voltage rails by as much as 50% compared to placing

capacitors outside the physical boundaries of the processor. These will result in more stable processor operations.

NOTE:

Diode D10 is required to correct a problem on a small number of i.MX6 DualLite parts in which VDDSNVS does

not come up when VDDHIGH_IN is applied. A similar problem was corrected on i.MX6Q TO1.2 processors. The

diode is left populated for similarity across the Smart Device family of boards.

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

SH1

R1

SH2

R2

C656

6.3V

0.22UF

C659

6.3V

0.22UF

C628

6.3V

0.22UF

SH16

SOLDER SHORT

A

C

D10

NSR0320

C40

4V

22UF

C38

4V

22UF

C696

6.3V

0.22UF

R625

0

C689

6.3V

0.22UF

C630

6.3V

0.22UF

C707

6.3V

0.22UF

C669

4V

22UF

C623

6.3V

22UF

C713

6.3V

0.22UF

i.MX6Q - POWER

A13

GND_1

A25

GND_2

A4

GND_3

A8

GND_4

AA10

GND_5

AA13

GND_6

AA16

GND_7

AA19

GND_8

AA22

GND_9

AA7

GND_10

AB24

GND_11

AB3

GND_12

AD10

GND_13

AD13

GND_14

AD16

GND_15

AD19

GND_16

AD22

GND_17

AD4

GND_18

AD7

GND_19

AE1

GND_20

H13

VDDARM_CAP_1

J13

VDDARM_CAP_2

K13

VDDARM_CAP_3

L13

VDDARM_CAP_4

M13

VDDARM_CAP_5

H14

VDDARM_IN_1

J14

VDDARM_IN_2

K14

VDDARM_IN_3

L14

VDDARM_IN_4

M14

VDDARM_IN_5

N14

VDDARM_IN_6

P14

VDDARM_IN_7

P19

NVCC_LCD

G15

NVCC_NANDF

E8

NVCC_PLL_OUT

G18

NVCC_RGMII

G14

NVCC_SD3

R10

VDDSOC_CAP_1

T10

VDDSOC_CAP_2

N16

VDDSOC_IN_6

B5

VDD_FA

N12

VDD_CACHE_CAP

J17

VDDPU_CAP_2

K17

VDDPU_CAP_3

L17

VDDPU_CAP_4

L16

VDDSOC_IN_4

K16

VDDSOC_IN_3

J16

VDDSOC_IN_2

K19

NVCC_EIM0

T13

VDDSOC_CAP_3

C8

GPANAIO

AE25

GND_21

B4

GND_22

C1

GND_23

C10

GND_24

C4

GND_25

C6

GND_26

J7

NVCC_JTAG

D3

GND_27

D6

GND_28

D8

GND_29

N13

VDDARM_CAP_6

P13

VDDARM_CAP_7

R13

VDDARM_CAP_8

H11

VDDARM23_CAP_1

J11

VDDARM23_CAP_2

K11

VDDARM23_CAP_3

L11

VDDARM23_CAP_4

R14

VDDARM_IN_8

P16

VDDSOC_IN_7

T14

VDDSOC_CAP_4

R16

VDDSOC_IN_8

L19

NVCC_EIM1

R19

NVCC_ENET

H17

VDDPU_CAP_1

G17

NVCC_SD2

R11

VDDARM23_CAP_8

M11

VDDARM23_CAP_5

N11

VDDARM23_CAP_6

P7

NVCC_GPIO

P11

VDDARM23_CAP_7

G16

NVCC_SD1

E5

GND_30

E6

GND_31

E7

GND_32

F5

GND_33

F6

GND_34

F7

GND_35

F8

GND_36

G10

GND_37

G19

GND_38

G3

GND_39

H12

GND_40

H15

GND_41

H18

GND_42

H8

GND_43

J12

GND_44

J15

GND_45

J18

GND_46

J2

GND_47

J8

GND_48

K10

GND_49

K12

GND_50

H10

VDDHIGH_CAP_1

J10

VDDHIGH_CAP_2

G9

VDD_SNVS_CAP

J9

VDDHIGH_IN_2

H9

VDDHIGH_IN_1

G11

VDD_SNVS_IN

N7

NVCC_CSI

M19

NVCC_EIM2

M16

VDDSOC_IN_5

H16

VDDSOC_IN_1

T16

VDDSOC_IN_9

U16

VDDSOC_IN_10

M17

VDDPU_CAP_5

U10

VDDSOC_CAP_5

K15

GND_51

K18

GND_52

K8

GND_53

L10

GND_54

L12

GND_55

L15

GND_56

L18

GND_57

L2

GND_58

L5

GND_59

P8

GND_74

R12

GND_75

R15

GND_76

R17

GND_77

R8

GND_78

T11

GND_79

L8

GND_60

M10

GND_61

M12

GND_62

M15

GND_63

M18

GND_64

M8

GND_65

N10

GND_66

N15

GND_67

N18

GND_68

P15

GND_72

P18

GND_73

P12

GND_71

P10

GND_70

N8

GND_69

K7

NVCC_MIPI

T12

GND_80

T15

GND_81

T17

GND_82

T19

GND_83

T8

GND_84

U11

GND_85

U12

GND_86

U15

GND_87

U17

GND_88

K9

VDDARM23_IN_1

L9

VDDARM23_IN_2

M9

VDDARM23_IN_3

N9

VDDARM23_IN_4

P9

VDDARM23_IN_5

R9

VDDARM23_IN_6

T9

VDDARM23_IN_7

U9

VDDARM23_IN_8

N17

VDDPU_CAP_6

P17

VDDPU_CAP_7

U13

VDDSOC_CAP_6

U14

VDDSOC_CAP_7

A5

FA_ANA

U8

GND_89

U19

GND_90

V8

GND_91

V19

GND_92

W3

GND_93

W7

GND_94

W8

GND_95

W9

GND_96

W10

GND_97

W11

GND_98

W12

GND_99

W13

GND_100

W15

GND_101

W16

GND_102

W17

GND_103

W18

GND_104

W19

GND_105

Y5

GND_106

Y24

GND_107

U1-E

MCIMX6Q6AVT10AC

C650

6.3V

0.22UF

C701

6.3V

0.22UF

C709

6.3V

0.22UF

C682

4V

22UF

C664

6.3V

0.22UF

C714

6.3V

0.22UF

C694

4V

22UF

C723

6.3V

0.22UF

C693

6.3V

0.22UF

C720

6.3V

0.22UF

C612

DNP

C729

6.3V

22UF

C675

6.3V

0.22UF

C629

6.3V

0.22UF

C648

6.3V

0.22UF

C725

6.3V

0.22UF

C652

6.3V

0.22UF

R85

0.5%

DNP

0.02

C703

6.3V

0.22UF

C690

6.3V

0.22UF

C643

6.3V

0.22UF

C719

6.3V

0.22UF

C705

6.3V

0.22UF

C721

6.3V

0.22UF

C649

4V

22UF

C68

DNP

C702

6.3V

0.22UF

C686

6.3V

0.22UF

R47

0

C657

6.3V

0.22UF

C672

6.3V

0.22UF

C636

6.3V

0.22UF

C634

6.3V

0.22UF

C722

6.3V

0.22UF

C704

6.3V

0.22UF

C661

6.3V

0.22UF

C680

4V

22UF

C654

6.3V

22UF

C660

6.3V

0.22UF

C644

6.3V

0.22UF

C54

DNP

C716

4V

22UF

C706

6.3V

0.22UF

C715

6.3V

0.22UF

C69

6.3V

22UF

C683

4V

22UF

C637

6.3V

0.22UF

C677

6.3V

0.22UF

C674

6.3V

0.22UF

C658

6.3V

0.22UF

C695

6.3V

0.22UF

R104

0

C611

DNP

C670

6.3V

0.22UF

C645

6.3V

0.22UF

C730

6.3V

22UF

C708

6.3V

0.22UF

C667

6.3V

0.22UF

C712

6.3V

0.22UF

C698

6.3V

0.22UF

C679

4V

22UF

C605

6.3V

22UF

C687

6.3V

0.22UF

C684

6.3V

0.22UF

C671

6.3V

0.22UF

C685

6.3V

0.22UF

C646

6.3V

0.22UF

SH503

SOLDER SHORT

C676

6.3V

0.22UF

C663

6.3V

0.22UF

R727

0

C665

6.3V

0.22UF

C710

6.3V

0.22UF

R45

0

C691

6.3V

0.22UF

C692

6.3V

0.22UF

C655

6.3V

0.01UF

C688

6.3V

0.22UF

C711

6.3V

0.22UF

C604

4V

22UF

C662

6.3V

0.22UF

C724

6.3V

0.22UF

SH27

SOLDER SHORT

SH28

SOLDER SHORT

R9

DNP

0R

R24

DNP

0R

GND

GND

GND

GND

VDDSOC_VP

VDDSOC_CAP

VDD_SNVS_CAP

VDDCORE

VGEN5_2V8

NVCC_PLL_OUT

VSNVS_3V0

GND

VDDPU

VDDHIGH_VPH

GND

GND

GND

VDDSOC

GND

GEN_1V8

GND

NVCC_RGMII

GEN_2V5

VGEN5_2V8

GND

GND

GND

GND

GEN_1V8

GND

GND

GND

VDDSOC_CAP

GND

GND

GND

GND

GND

GND

VDDHIGH_VPH

GND

GND

GND

NVCC_3V3

GEN_3V3

GEN_3V3

GND

GND

DDR_1V5

NVCC_3V3

NVCC_3V3

NVCC_3V3

GEN_2V5

ETH_3V3

VDD_ARM_CAP

GND

VGEN3_2V5

GND

GND

GND

VDDSOC_CAP

VDDPU

VDD_SNVS_CAP

NVCC_MIPI

NVCC_CSI

NVCC_EIM

NVCC_SD1

NVCC_MIPI

NVCC_CSI

NVCC_EIM

NVCC_EIM

NVCC_EIM

NVCC_SD1

___

___


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19

X

C3


3

CPU SIGNAL

PUBI:

FIUO:

FCP:


Page Title:

of

Sheet

Date:

Rev

Document Number

Size

Drawing Title:

Layout: High speed data lines : 50 ohms

CSI_MCLK

Refer to build options table for assembly

options on muxed signal resistors.

Place C726

close to i.MX6.

Extra Bulk Capacitors

NOTE:

In early designs of the Smart Device board, these bulk capacitors were used.

After testing of the board, it was found that these capacitors could be

removed with no effect. This reduces the capacitve loading on the internal processor

LDOs. The coponents/footprints have been left in place in the event that future

applications and/or software changes show that these capacitors are needed.

NOTE:

R302 is provided for testing with an alternate power supply

for USB_H1_VBUS. It has not yet been tested. See the

Freescale HW User Guide for the Smart Device board

for details (to be published 4Q12).

Note:

1) R216 is required to correct

a known 24MHz slow starting

issue present on some iMX 6

part. Please refer to the i.MX 6

Processor Errata, issue

# ERR003745 for more details.

2) Per bulletin EB830, the i.MX6

processor may drive the 24 MHz

crystal up to 250 uW. Freescale

recommends following the guidelines

contained in the bulletin.

The HW Developer Guide contains

additional information.

NVCC_LVDS2P5 also powers on-chip DDR I/O predrivers,

and must be powered whether LVDS is used or not.

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

15

15

15

15

15

15

6

6

6

6

6

6

6

6

5

5

5

5

5

5

5

5

15

15

15

15

6

6

6

6

15

15

6

6

5

5

7

7

22

22

22

22

7

6

6

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

7

8,9

8,9

13

22

22

8,9

8,9

8,9

8,9

8,9

8,9

8,9

8,9

8,9

8,9

8,9

8

8

8

8

8

8

8

8

10

10

10

10

10

10

11

11

11

11

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

12

13

14

14

16

16

16

16

16

16

16

16

8,9

11

17

17

19

19

19

16

21

21

21

21

21

21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

9,21

21

9,21

9,21

9,21

9,21

9,21

21

9

9

9

9

9

9

9

9

9

9

9,18

9

9

22

22

22

22

9

9

11

11

19

9

9

9,15

9,15

9

9

9

9,15

9

9

9

9

9

8

8

7,8

20

11,18

19

12

10

6

9

16

13,19

9,21

C606

DNP

C607

DNP

R48

0

NVCC_LVDS2P5

NVCC_LVDS2P5

i.MX6Q - LVDS

V4

LVDS0_CLK_N

V3

LVDS0_CLK_P

U2

LVDS0_TX0_N

U1

LVDS0_TX0_P

U4

LVDS0_TX1_N

U3

LVDS0_TX1_P

V2

LVDS0_TX2_N

V1

LVDS0_TX2_P

W2

LVDS0_TX3_N

W1

LVDS0_TX3_P

Y3

LVDS1_CLK_N

Y4

LVDS1_CLK_P

Y1

LVDS1_TX0_N

Y2

LVDS1_TX0_P

AA2

LVDS1_TX1_N

AA1

LVDS1_TX1_P

AB1

LVDS1_TX2_N

AB2

LVDS1_TX2_P

AA3

LVDS1_TX3_N

AA4

LVDS1_TX3_P

V7

NVCC_LVDS2P5

U1-H

MCIMX6Q6AVT10AC

C635

6.3V

0.22UF

i.MX6Q - USB

E9

USB_OTG_VBUS

B8

USB_OTG_CHD

B6

USB_OTG_DN

A6

USB_OTG_DP

E10

USB_H1_DP

F10

USB_H1_DN

D10

USB_H1_VBUS

F9

VDDUSB_CAP

U1-G

MCIMX6Q6AVT10AC

R300

0

i.MX6Q - PCIe

B1

PCIE_RXM

B3

PCIE_TXP

B2

PCIE_RXP

H7

PCIE_VP

A3

PCIE_TXM

G7

PCIE_VPH

A2

PCIE_REXT

G8

PCIE_VPTX

U1-L

MCIMX6Q6AVT10AC

R38

1%

6.04K

C610

DNP

R553

0

R49

0

R96

0

R623

68K

R588

0

C608

DNP

R216

2.2M

R653

DNP

0

R125

0

C609

DNP

R624

68K

R126

0

R37

1%

1.6K

1

VC

CA

6

VC

CB

2

A

3

GN

D

4

B

5

NC

U514

NLSV1T34

R652

0

C640

6.3V

0.22UF

R46

0

C651

10V

0.22UF

1

2

QZ500

32.768KHZ

i.MX6Q - SATA

G12

SATA_VPH

B12

SATA_TXM

A12

SATA_TXP

B14

SATA_RXP

A14

SATA_RXM

C14

SATA_REXT

G13

SATA_VP

U1-F

MCIMX6Q6AVT10AC

C639

50V

18PF

C726

10V

1.0UF

R87

0

C642

10V

0.22UF

R127

0

C624

50V

18PF

C51

50V

18PF

R301

0

C626

6.3V

0.22UF

R137

0

R134

0

NVCC_EIM1

NVCC_EIM0

NVCC_EIM2

i.MX6Q - EIM

J24

EIM_OE

M25

EIM_WAIT

N22

EIM_BCLK

K22

EIM_LBA

K20

EIM_RW

K21

EIM_EB0

K23

EIM_EB1

E22

EIM_EB2

F23

EIM_EB3

H24

EIM_CS0

J23

EIM_CS1

H25

EIM_A16

G24

EIM_A17

J22

EIM_A18

G25

EIM_A19

H22

EIM_A20

H23

EIM_A21

F24

EIM_A22

J21

EIM_A23

F25

EIM_A24

H19

EIM_A25

C25

EIM_D16

F21

EIM_D17

D24

EIM_D18

G21

EIM_D19

G20

EIM_D20

H20

EIM_D21

E23

EIM_D22

D25

EIM_D23

F22

EIM_D24

G22

EIM_D25

E24

EIM_D26

E25

EIM_D27

G23

EIM_D28

J19

EIM_D29

J20

EIM_D30

H21

EIM_D31

L20

EIM_DA0

J25

EIM_DA1

L21

EIM_DA2

K24

EIM_DA3

L22

EIM_DA4

L23

EIM_DA5

K25

EIM_DA6

L25

EIM_DA7

L24

EIM_DA8

M21

EIM_DA9

M22

EIM_DA10

M20

EIM_DA11

M24

EIM_DA12

M23

EIM_DA13

N23

EIM_DA14

N24

EIM_DA15

U1-A

MCIMX6Q6AVT10AC

R600

0

C622

6.3V

0.22UF

C55

50V

18PF

R171

0

C633

6.3V

0.22UF

R610

DNP

10M

C638

6.3V

0.22UF

C673

DNP

TP31

R50

0

2

1

L13

120OHM

R302

DNP

0

C678

6.3V

0.22UF

NVCC_NANDF

NVCC_SD1

NVCC_SD2

NVCC_SD3

NVCC_GPIO

NVCC_ENET

i.MX6Q

W5

KEY_COL0

U7

KEY_COL1

W6

KEY_COL2

U5

KEY_COL3

T6

KEY_COL4

V6

KEY_ROW0

U6

KEY_ROW1

W4

KEY_ROW2

T7

KEY_ROW3

V5

KEY_ROW4

B21

SD1_CMD

D20

SD1_CLK

A21

SD1_DAT0

C20

SD1_DAT1

E19

SD1_DAT2

F18

SD1_DAT3

F19

SD2_CMD

C21

SD2_CLK

A22

SD2_DAT0

E20

SD2_DAT1

A23

SD2_DAT2

B22

SD2_DAT3

U21

ENET_CRS_DV

V20

ENET_MDC

V23

ENET_MDIO

V22

ENET_REF_CLK

W21

ENET_RXD0

W23

ENET_RX_ER

W22

ENET_RXD1

V21

ENET_TX_EN

U20

ENET_TXD0

W20

ENET_TXD1

T5

GPIO_0

T4

GPIO_1

T2

GPIO_9

R7

GPIO_3

T3

GPIO_6

T1

GPIO_2

R6

GPIO_4

R4

GPIO_5

R3

GPIO_7

R5

GPIO_8

R2

GPIO_16

R1

GPIO_17

P6

GPIO_18

P5

GPIO_19

F13

SD3_DAT7

E13

SD3_DAT6

C13

SD3_DAT5

D13

SD3_DAT4

B13

SD3_CMD

D14

SD3_CLK

E14

SD3_DAT0

F14

SD3_DAT1

A15

SD3_DAT2

B15

SD3_DAT3

D15

SD3_RST

B11

MLB_CP

A11

MLB_CN

B9

MLB_SP

A9

MLB_SN

A10

MLB_DP

B10

MLB_DN

F15

NANDF_CS0

C16

NANDF_CS1

A17

NANDF_CS2

D16

NANDF_CS3

A16

NANDF_ALE

C15

NANDF_CLE

E15

NANDF_WP

B16

NANDF_RB0

A18

NANDF_D0

C17

NANDF_D1

F16

NANDF_D2

D17

NANDF_D3

A19

NANDF_D4

B18

NANDF_D5

E17

NANDF_D6

C18

NANDF_D7

E16

SD4_CLK

B17

SD4_CMD

D18

SD4_DAT0

B19

SD4_DAT1

F17

SD4_DAT2

A20

SD4_DAT3

E18

SD4_DAT4

C19

SD4_DAT5

B20

SD4_DAT6

D19

SD4_DAT7

U1-B

MCIMX6Q6AVT10AC

R605

1%

6.04K

C641

6.3V

0.22UF

VDD_SNVS_IN

NVCC_JTAG

i.MX6Q - CONTROL

H5

JTAG_TCK

C3

JTAG_TMS

G5

JTAG_TDI

G6

JTAG_TDO

C2

JTAG_TRST

H6

JTAG_MOD

C12

BOOT_MODE0

F12

BOOT_MODE1

C11

POR

D12

ONOFF

D7

CLK1_P

D9

RTC_XTALI

E12

TEST_MODE

B7

XTALO

A7

XTALI

F11

PMIC_STBY_REQ

D11

PMIC_ON_REQ

C7

CLK1_N

C9

RTC_XTALO

E11

TAMPER

D5

CLK2_P

C5

CLK2_N

U1-C

MCIMX6Q6AVT10AC

TP32

NVCC_MIPI

NVCC_MIPI

NVCC_LCD

NVCC_CSI

i.MX6Q - DISP; CSI

N6

CSI0_DAT8

N5

CSI0_DAT9

M1

CSI0_DAT10

M3

CSI0_DAT11

M2

CSI0_DAT12

L1

CSI0_DAT13

M4

CSI0_DAT14

M5

CSI0_DAT15

L4

CSI0_DAT16

L3

CSI0_DAT17

M6

CSI0_DAT18

L6

CSI0_DAT19

N2

CSI0_VSYNC

P1

CSI0_PIXCLK

P4

CSI0_MCLK

P25

DI0_PIN4

P24

DISP0_DAT0

P22

DISP0_DAT1

P23

DISP0_DAT2

P21

DISP0_DAT3

P20

DISP0_DAT4

R25

DISP0_DAT5

R23

DISP0_DAT6

R24

DISP0_DAT7

R22

DISP0_DAT8

T25

DISP0_DAT9

R21

DISP0_DAT10

T23

DISP0_DAT11

T24

DISP0_DAT12

R20

DISP0_DAT13

U25

DISP0_DAT14

T22

DISP0_DAT15

T21

DISP0_DAT16

U24

DISP0_DAT17

V25

DISP0_DAT18

U23

DISP0_DAT19

U22

DISP0_DAT20

T20

DISP0_DAT21

V24

DISP0_DAT22

W24

DISP0_DAT23

N20

DI0_PIN3

N19

DI0_DISP_CLK

N25

DI0_PIN2

N21

DI0_PIN15

N1

CSI0_DAT4

P2

CSI0_DAT5

N4

CSI0_DAT6

N3

CSI0_DAT7

P3

CSI0_DATA_EN

F4

CSI_CLK0M

F3

CSI_CLK0P

E4

CSI_D0M

E3

CSI_D0P

D1

CSI_D1M

D2

CSI_D1P

E1

CSI_D2M

E2

CSI_D2P

F2

CSI_D3M

F1

CSI_D3P

D4

CSI_REXT

H3

DSI_CLK0M

H4

DSI_CLK0P

G2

DSI_D0M

G1

DSI_D0P

H2

DSI_D1M

H1

DSI_D1P

G4

DSI_REXT

U1-D

MCIMX6Q6AVT10AC

R604

1%

200

C681

DNP

i.MX6Q - RGMII

D21

RGMII_TXC

C22

RGMII_TD0

F20

RGMII_TD1

E21

RGMII_TD2

A24

RGMII_TD3

D22

RGMII_RX_CTL

C24

RGMII_RD0

C23

RGMII_TX_CTL

B23

RGMII_RD1

B24

RGMII_RD2

D23

RGMII_RD3

B25

RGMII_RXC

U1-K

MCIMX6Q6AVT10AC

C39

DNP

R75

DNP

10M

C668

6.3V

0.22UF

C632

6.3V

0.22UF

C625

6.3V

0.22UF

R619

1%

191.0

C627

6.3V

10UF

1

4

3

2

Y1

24MHz

R676

0

R656

0

i.MX6Q - HDMI

J1

HDMI_REF

K6

HDMI_D0P

J4

HDMI_D1P

J3

HDMI_D1M

K5

HDMI_D0M

K4

HDMI_D2P

L7

HDMI_VP

M7

HDMI_VPH

K3

HDMI_D2M

J5

HDMI_CLKM

K1

HDMI_HPD

K2

HDMI_DDCCEC

J6

HDMI_CLKP

U1-I

MCIMX6Q6AVT10AC

R57

0

R59

0

R62

0

R593

4.7K

VDDSOC_VP

GND

GND

VDDSOC_VP

VDDSOC_VP

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GEN_2V5

GEN_2V5

GEN_2V5

GEN_2V5

GEN_1V8

GEN_3V3

GND

GND

GND

GND

GND

GND

USB_OTG_VBUS

ETH_3V3

PMIC_5V

USB_H1_VBUS

GND

GND

GND

GND

GND

SD2_DATA0

SD2_DATA1

SD2_DATA2

SD2_DATA3

SD2_CLK

SD2_CMD

SD3_DATA0

SD3_DATA1

SD3_DATA2

SD3_DATA3

SD3_DATA4

SD3_DATA5

SD3_DATA6

SD3_DATA7

SD4_DATA0

SD4_DATA1

SD4_DATA2

SD4_DATA3

SD4_DATA4

SD4_DATA5

SD4_DATA6

SD4_DATA7

SD2_DATA4

SD2_DATA5

SD2_DATA6

SD2_DATA7

SATA_RXN

SATA_RXP

SATA_TXN

SATA_TXP

SD2_CD_B

SD2_WP

SD3_CD_B

SD3_WP

SD4_CMD

SD4_CLK

CABC_EN0

CAP_TCH_INT0

I2C3_SDA

I2C3_SCL

I2C2_SCL

I2C2_SDA

HDMI_CEC_IN

SD3_CMD

SD3_CLK

HDMI_CLKM

HDMI_CLKP

HDMI_D0M

HDMI_D0P

HDMI_D1M

HDMI_D1P

HDMI_D2M

HDMI_D2P

HDMI_HPD

LVDS0_TX0_N

LVDS0_TX0_P

LVDS0_TX1_N

LVDS0_TX1_P

LVDS0_TX2_N

LVDS0_TX2_P

LVDS0_CLK_N

LVDS0_CLK_P

LVDS1_TX0_N

LVDS1_TX0_P

LVDS1_TX1_N

LVDS1_TX1_P

LVDS1_TX2_N

LVDS1_TX2_P

LVDS1_CLK_N

LVDS1_CLK_P

CABC_EN1

CAP_TCH_INT1

CSI0_PWN

CSI0_RST_B

UART1_TX

I2C1_SCL

I2C1_SDA

CSI0_DAT12

CSI0_DAT13

CSI0_DAT14

CSI0_DAT15

CSI0_DAT16

CSI0_DAT17

CSI0_DAT18

CSI0_DAT19

CSI0_HSYNCH

CSI0_VSYNCH

CSI0_PIXCLK

CSI_CLK0M

CSI_CLK0P

CSI_D0M

CSI_D0P

CSI_D1M

CSI_D1P

CODEC_PWR_EN

AUD3_RXD

AUD3_TXFS

AUD3_TXD

AUD3_TXC

HEADPHONE_DET

USB_OTG_DN

USB_OTG_DP

USB_OTG_PWR_EN

USB_OTG_OC

RGMII_TXCLK

RGMII_RXCLK

RGMII_TXD0

RGMII_TXD1

RGMII_TXD2

RGMII_TXD3

RGMII_TXEN

RGMII_RXD0

RGMII_RXD1

RGMII_RXD2

RGMII_RXD3

RGMII_RXDV

RGMII_MDIO

RGMII_MDC

ENET_REF_CLK

RGMII_INT

RGMII_NRST

UART1_RX

TS1_INT

CLK1_N

CLK1_P

PCIE_TXM

PCIE_RXM

PCIE_TXP

PCIE_RXP

USB_HOST_DN

USB_HOST_DP

GPIO_0_CLKO

USB_OTG_ID

UART3_TXD

UART3_RXD

PMIC_ON_REQ

PMIC_STBY_REQ

PMIC_INT_B

USR_DEF_RED_LED

WDOG_B

BOOT_MODE0

BOOT_MODE1

TEST_MODE

TAMPER

EIM_A16

EIM_A17

EIM_A18

EIM_A19

EIM_A20

EIM_A21

EIM_A22

EIM_A23

EIM_A24

EIM_DA0

EIM_DA1

EIM_DA2

EIM_DA3

EIM_DA4

EIM_DA5

EIM_DA6

EIM_DA7

EIM_DA8

EIM_DA10

EIM_DA11

EIM_DA12

EIM_DA13

EIM_DA14

EIM_DA15

EIM_WAIT

EIM_LBA

EIM_EB0

EIM_EB1

EIM_RW

EIM_EB2

EIM_EB3

EIM_A25

EIM_D16

EIM_D17

EIM_D18

EIM_D19

EIM_D20

EIM_D23

EIM_D26

EIM_D27

EIM_D28

EIM_D30

EIM_BCLK

CSPI1_MISO

CSPI1_CLK

CSPI1_MOSI

CSPI1_CS0

EIM_CS0

USB_H1_PWR_EN

USB_H1_OC

PWR_BTN_SNS

EIM_CS1

KEY_COL4

KEY_ROW4

KEY_BACK

KEY_ROW5

GPIO1

KEY_ROW6

KEY_MEUN

TWI2-SCK

KEY_HOME

GPIO2

KEY_UBOOT

CSI_PWN

CSI_RST_B

DISP0_CONTRAST

AUX_5V_EN

UOK_B

MX6_ONOFF

ETH_WOL_INT

SATA_DEVSLP

AA

POR_B

EIM_DA9

SATA_VP

EIM_D21

EIM_D22

DSI_REXT

PCIE_VPH

ENET_REFCLK

SATA_REXT

LDO_USB_IN

CSI_REXT

PCIE_VPTX

LVDS_2V5

HDMI_RESREF

EIM_D24

HDMI_DDCCEC

PCIE_VP

EIM_D25

CPU_XTALI

HDMI_VP

SATA_VPH

CPU_XTALO

KEY_ROW4

DISP0_PWM

KEY_ROW5

HDMI_VPH

RTC_XTALO

KEY_ROW6

TP32_16767721

RTC_XTALI

VDDUSB

HDMI_CEC_IN

KEY_ROW2

PCIE_REXT

SD3_RST

TP31_16767721

SATA_VP

EIM_D21

EIM_D22

PCIE_VPH

PCIE_VPTX

LVDS_2V5

EIM_D24

PCIE_VP

EIM_D25

HDMI_VP

EIM_D30

SATA_VPH

DISP0_PWM

HDMI_VPH

EIM_DA9

TWI2-DAT

IR-AP

PWM0

PWM1

PWM2

PWM3

SPI0_MOSI

SPI0_MISO

SPI0_CLK

SPI0_CS0

GPIO3

GPIO4

GPIO5

GPIO6

GPIO7

GPIO8

TS_INT

EIM_D26

CODEC_RES

GND

___

___


D

DDR3 MEMORY

4

X

C3



19

PUBI:

FIUO:

FCP:


Page Title:

of

Sheet

Date:

Rev

Document Number

Size

Drawing Title:

Note

1

Note

1

NOTE 1:

Using bit swapping for DATA bus to allow easy pcb routing.

When using data bit swapping the low order bit of each

byte must reside at bit 0 of the byte. The remaining 7 data

bits can be swapped freely. This restriction is for write

leveling calibration.

Example D0 to D0 or D0 to D8, and D1-7 can be swapped.

When swapping byte lanes on 16-bit memories, remember

to move the DQMx, DQSx, and DQSx_B signals for that byte

lane.

Clock access points

Top right

Top left

Bottom under U3

Bottom under U2

GND probe pads

Clock terminators: Place at end of route at each DDR pair

1 GByte

DDR3

GND probe pad

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

C616

16V

0.22UF

R119

1%

240

C41

16V

0.22UF

R602

1%

10.0K

TP16

C58

16V

0.22UF

C47

16V

0.22UF

SH20

0

C42

16V

0.22UF

C35

6.3V

22UF

C620

16V

0.22UF

TP17

C70

16V

0.22UF

C733

16V

0.22UF

R43

1%

200

C49

6.3V

22UF

C618

16V

0.22UF

SH19

0

C46

16V

0.22UF

C59

16V

0.22UF

R635

1%

10.0K

C73

16V

0.22UF

C619

6.3V

0.22UF

C76

16V

0.22UF

C43

16V

0.22UF

R599

1%

240

2G_DDR3_SDRAM_128MX16

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

M2

BA0

N8

BA1

M3

BA2

B2

VD

D1

D9

VD

D2

G7

VD

D3

K2

VD

D4

K8

VD

D5

N1

VD

D6

N9

VD

D7

R1

VD

D8

R9

VD

D9

A1

VD

DQ

1

A8

VD

DQ

2

C1

VD

DQ

3

C9

VD

DQ

4

A9

VS

S1

B3

VS

S2

E1

VS

S3

G8

VS

S4

J2

VS

S5

J8

VS

S6

M1

VS

S7

M9

VS

S8

P1

VS

S9

P9

VS

S1

0

T1

VS

S1

1

T9

VS

S1

2

B1

VS

SQ

1

B9

VS

SQ

2

D1

VS

SQ

3

D8

VS

SQ

4

E2

VS

SQ

5

L1

NC_L1

L9

NC_L9

M7

NC_M7

T7

NC_T7

E3

DQ0

F7

DQ1

F2

DQ2

F8

DQ3

H3

DQ4

H8

DQ5

G2

DQ6

H7

DQ7

L7

A10/AP

R7

A11

N7

A12/BC

F3

LDQS

G3

LDQS

C7

UDQS

B7

UDQS

D7

DQ8

C3

DQ9

C8

DQ10

C2

DQ11

A7

DQ12

A2

DQ13

B8

DQ14

A3

DQ15

D2

VD

DQ

5

E9

VD

DQ

6

F1

VD

DQ

7

H2

VD

DQ

8

H9

VD

DQ

9

E8

VS

SQ

6

F9

VS

SQ

7

G1

VS

SQ

8

G9

VS

SQ

9

T3

A13

J9

NC_J9

J1

NC_J1

J7

CK

K7

CK

K9

CKE

L2

CS

J3

RAS

K3

CAS

L3

WE

T2

RESET

K1

ODT

M8

VREFCA

H1

VREFDQ

L8

ZQ

E7

LDM

D3

UDM

U3

MT41K128M16JT

R107

1%

240

C52

16V

0.22UF

C728

6.3V

0.22UF

C735

16V

0.22UF

C72

16V

0.22UF

C74

16V

0.22UF

C37

16V

0.22UF

C53

16V

0.22UF

C653

16V

0.22UF

C77

6.3V

22UF

C736

16V

0.22UF

C79

6.3V

22UF

C64

16V

0.22UF

C727

6.3V

0.22UF

TP15

C78

6.3V

22UF

C718

16V

0.22UF

C737

16V

0.22UF

R89

1%

240

C621

16V

0.1UF

C48

6.3V

0.22UF


N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

M2

BA0

N8

BA1

M3

BA2

B2

VD

D1

D9

VD

D2

G7

VD

D3

K2

VD

D4

K8

VD

D5

N1

VD

D6

N9

VD

D7

R1

VD

D8

R9

VD

D9

A1

VD

DQ

1

A8

VD

DQ

2

C1

VD

DQ

3

C9

VD

DQ

4

A9

VS

S1

B3

VS

S2

E1

VS

S3

G8

VS

S4

J2

VS

S5

J8

VS

S6

M1

VS

S7

M9

VS

S8

P1

VS

S9

P9

VS

S1

0

T1

VS

S1

1

T9

VS

S1

2

B1

VS

SQ

1

B9

VS

SQ

2

D1

VS

SQ

3

D8

VS

SQ

4

E2

VS

SQ

5

L1

NC_L1

L9

NC_L9

M7

NC_M7

T7

NC_T7

E3

DQ0

F7

DQ1

F2

DQ2

F8

DQ3

H3

DQ4

H8

DQ5

G2

DQ6

H7

DQ7

L7

A10/AP

R7

A11

N7

A12/BC

F3

LDQS

G3

LDQS

C7

UDQS

B7

UDQS

D7

DQ8

C3

DQ9

C8

DQ10

C2

DQ11

A7

DQ12

A2

DQ13

B8

DQ14

A3

DQ15

D2

VD

DQ

5

E9

VD

DQ

6

F1

VD

DQ

7

H2

VD

DQ

8

H9

VD

DQ

9

E8

VS

SQ

6

F9

VS

SQ

7

G1

VS

SQ

8

G9

VS

SQ

9

T3

A13

J9

NC_J9

J1

NC_J1

J7

CK

K7

CK

K9

CKE

L2

CS

J3

RAS

K3

CAS

L3

WE

T2

RESET

K1

ODT

M8

VREFCA

H1

VREFDQ

L8

ZQ

E7

LDM

D3

UDM

U2

MT41K128M16JT

C44

16V

0.22UF

C717

16V

0.22UF


N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

M2

BA0

N8

BA1

M3

BA2

B2

VD

D1

D9

VD

D2

G7

VD

D3

K2

VD

D4

K8

VD

D5

N1

VD

D6

N9

VD

D7

R1

VD

D8

R9

VD

D9

A1

VD

DQ

1

A8

VD

DQ

2

C1

VD

DQ

3

C9

VD

DQ

4

A9

VS

S1

B3

VS

S2

E1

VS

S3

G8

VS

S4

J2

VS

S5

J8

VS

S6

M1

VS

S7

M9

VS

S8

P1

VS

S9

P9

VS

S1

0

T1

VS

S1

1

T9

VS

S1

2

B1

VS

SQ

1

B9

VS

SQ

2

D1

VS

SQ

3

D8

VS

SQ

4

E2

VS

SQ

5

L1

NC_L1

L9

NC_L9

M7

NC_M7

T7

NC_T7

E3

DQ0

F7

DQ1

F2

DQ2

F8

DQ3

H3

DQ4

H8

DQ5

G2

DQ6

H7

DQ7

L7

A10/AP

R7

A11

N7

A12/BC

F3

LDQS

G3

LDQS

C7

UDQS

B7

UDQS

D7

DQ8

C3

DQ9

C8

DQ10

C2

DQ11

A7

DQ12

A2

DQ13

B8

DQ14

A3

DQ15

D2

VD

DQ

5

E9

VD

DQ

6

F1

VD

DQ

7

H2

VD

DQ

8

H9

VD

DQ

9

E8

VS

SQ

6

F9

VS

SQ

7

G1

VS

SQ

8

G9

VS

SQ

9

T3

A13

J9

NC_J9

J1

NC_J1

J7

CK

K7

CK

K9

CKE

L2

CS

J3

RAS

K3

CAS

L3

WE

T2

RESET

K1

ODT

M8

VREFCA

H1

VREFDQ

L8

ZQ

E7

LDM

D3

UDM

U5

MT41K128M16JT

C67

16V

0.22UF

C647

16V

0.22UF

C45

16V

0.22UF

C617

16V

0.22UF

R99

1%

240

C734

16V

0.22UF

i.MX6Q - DDR

AC2

DRAM_VREF

Y19

DRAM_D40

AB20

DRAM_D41

AB21

DRAM_D42

AD21

DRAM_D43

Y20

DRAM_D44

AA20

DRAM_D45

AE21

DRAM_D46

AC21

DRAM_D47

AD20

DRAM_SDQS5

AE20

DRAM_SDQS5

AC20

DRAM_DQM5

AA17

DRAM_D32

AA18

DRAM_D33

AC18

DRAM_D34

AE19

DRAM_D35

Y17

DRAM_D36

Y18

DRAM_D37

AB19

DRAM_D38

AC19

DRAM_D39

AB18

DRAM_DQM4

AD18

DRAM_SDQS4

AE18

DRAM_SDQS4

AE9

DRAM_D24

Y10

DRAM_D25

AE11

DRAM_D26

AB11

DRAM_D27

AC9

DRAM_D28

AD9

DRAM_D29

AC10

DRAM_SDQS3

AB10

DRAM_SDQS3

AD11

DRAM_D30

AC11

DRAM_D31

AE10

DRAM_DQM3

AB7

DRAM_D16

AA8

DRAM_D17

AB9

DRAM_D18

Y9

DRAM_D19

Y7

DRAM_D20

Y8

DRAM_D21

AC8

DRAM_D22

AD8

DRAM_SDQS2

AE8

DRAM_SDQS2

AA9

DRAM_D23

AB8

DRAM_DQM2

AC14

DRAM_A0

AB14

DRAM_A1

AA14

DRAM_A2

Y14

DRAM_A3

W14

DRAM_A4

AE13

DRAM_A5

AC13

DRAM_A6

Y13

DRAM_A7

AB13

DRAM_A8

AE12

DRAM_A9

AA15

DRAM_A10

AC12

DRAM_A11

AD12

DRAM_A12

AC17

DRAM_A13

AA12

DRAM_A14

Y12

DRAM_A15

AE17

ZQPAD

AE16

DRAM_CAS

Y16

DRAM_CS0

AD17

DRAM_CS1

AB15

DRAM_RAS

Y6

DRAM_RESET

AC15

DRAM_SDBA0

Y15

DRAM_SDBA1

AD15

DRAM_SDCLK_0

AE15

DRAM_SDCLK_0

AB12

DRAM_SDBA2

Y11

DRAM_SDCKE0

AD14

DRAM_SDCLK_1

AE14

DRAM_SDCLK_1

AA11

DRAM_SDCKE1

AC16

DRAM_SDODT0

AB17

DRAM_SDODT1

AB16

DRAM_SDWE

AD2

DRAM_D0

AE2

DRAM_D1

AC4

DRAM_D2

AA5

DRAM_D3

AC1

DRAM_D4

AD1

DRAM_D5

AE3

DRAM_SDQS0

AD3

DRAM_SDQS0

AB4

DRAM_D6

AE4

DRAM_D7

AC3

DRAM_DQM0

AD5

DRAM_D8

AE5

DRAM_D9

AA6

DRAM_D10

AE7

DRAM_D11

AB5

DRAM_D12

AC5

DRAM_D13

AB6

DRAM_D14

AD6

DRAM_SDQS1

AE6

DRAM_SDQS1

AC7

DRAM_D15

AC6

DRAM_DQM1

AC22

DRAM_D48

AE22

DRAM_D49

AE24

DRAM_D50

AC24

DRAM_D51

AB22

DRAM_D52

AC23

DRAM_D53

AD25

DRAM_D54

AC25

DRAM_D55

AD23

DRAM_SDQS6

AE23

DRAM_SDQS6

AD24

DRAM_DQM6

AB25

DRAM_D56

AA25

DRAM_SDQS7

AA24

DRAM_SDQS7

AA21

DRAM_D57

Y25

DRAM_D58

Y22

DRAM_D59

AB23

DRAM_D60

Y21

DRAM_DQM7

AA23

DRAM_D61

Y23

DRAM_D62

W25

DRAM_D63

V14

NVCC_DRAM_8

V15

NVCC_DRAM_9

V16

NVCC_DRAM_10

V17

NVCC_DRAM_11

V18

NVCC_DRAM_12

V9

NVCC_DRAM_13

R18

NVCC_DRAM_1

T18

NVCC_DRAM_2

U18

NVCC_DRAM_3

V10

NVCC_DRAM_4

V11

NVCC_DRAM_5

V12

NVCC_DRAM_6

V13

NVCC_DRAM_7

U1-J

MCIMX6Q6AVT10AC

C731

16V

0.22UF

C75

16V

0.22UF

C613

16V

0.22UF

C615

16V

0.22UF

SH21

0

C732

16V

0.22UF

C56

16V

0.22UF

C36

6.3V

22UF

C666

16V

0.22UF

C57

16V

0.22UF

SH18

0

R118

1%

200


N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

M2

BA0

N8

BA1

M3

BA2

B2

VD

D1

D9

VD

D2

G7

VD

D3

K2

VD

D4

K8

VD

D5

N1

VD

D6

N9

VD

D7

R1

VD

D8

R9

VD

D9

A1

VD

DQ

1

A8

VD

DQ

2

C1

VD

DQ

3

C9

VD

DQ

4

A9

VS

S1

B3

VS

S2

E1

VS

S3

G8

VS

S4

J2

VS

S5

J8

VS

S6

M1

VS

S7

M9

VS

S8

P1

VS

S9

P9

VS

S1

0

T1

VS

S1

1

T9

VS

S1

2

B1

VS

SQ

1

B9

VS

SQ

2

D1

VS

SQ

3

D8

VS

SQ

4

E2

VS

SQ

5

L1

NC_L1

L9

NC_L9

M7

NC_M7

T7

NC_T7

E3

DQ0

F7

DQ1

F2

DQ2

F8

DQ3

H3

DQ4

H8

DQ5

G2

DQ6

H7

DQ7

L7

A10/AP

R7

A11

N7

A12/BC

F3

LDQS

G3

LDQS

C7

UDQS

B7

UDQS

D7

DQ8

C3

DQ9

C8

DQ10

C2

DQ11

A7

DQ12

A2

DQ13

B8

DQ14

A3

DQ15

D2

VD

DQ

5

E9

VD

DQ

6

F1

VD

DQ

7

H2

VD

DQ

8

H9

VD

DQ

9

E8

VS

SQ

6

F9

VS

SQ

7

G1

VS

SQ

8

G9

VS

SQ

9

T3

A13

J9

NC_J9

J1

NC_J1

J7

CK

K7

CK

K9

CKE

L2

CS

J3

RAS

K3

CAS

L3

WE

T2

RESET

K1

ODT

M8

VREFCA

H1

VREFDQ

L8

ZQ

E7

LDM

D3

UDM

U4

MT41K128M16JT

C614

16V

0.22UF

C71

16V

0.22UF

GND

DDR_1V5

GND

DDR_1V5

DDR_VREF

GND

DDR_1V5

GND

GND

DDR_1V5

GND

DDR_1V5

GND

DDR_1V5

GND

GND

DDR_1V5

GND

GND

DDR_VREF

DDR_1V5

GND

GND

DDR_VREF

GND

GND

GND

DDR_1V5

GND

GND

GND

DDR_1V5

GND

DDR_VREF

GND

DDR_VREF

GND

GND

GND

GND

GND

GND

GND

GND

DRAM_A[0:15]

DRAM_D[0:63]

DRAM_A1

DRAM_DQM6

DRAM_SDQS1_B

DRAM_D10

DRAM_D51

DRAM_SDCLK1

DRAM_D8

DRAM_SDCLK0

DRAM_A14

DRAM_D28

DRAM_D39

DRAM_D19

DRAM_A2

DRAM_SDQS7

DRAM_SDQS5_B

DRAM_DQM7

DRAM_SDCLK0_B

DRAM_D62

DRAM_A0

DRAM_RESET_B

DRAM_A9

DRAM_SDQS1

DRAM_D18

DRAM_D40

DRAM0_ZQ

DRAM_D61

DRAM_SDQS2_B

DRAM_DQM2

DRAM_A15

DRAM_D38

DRAM_D60

DRAM3_ZQ

DRAM_SDQS0_B

DRAM_DQM3

DRAM_SDCLK1_B

DRAM_A8

DRAM_A11

DRAM_D41

DRAM_A3

DRAM_D37

DRAM_D59

DRAM_D17

DRAM_A7

DRAM_D52

DRAM_A10

DRAM_D46

DRAM_D50

DRAM_SDQS7_B

DRAM_DQM1

DRAM_A6

DRAM_D49

DRAM_SDQS6_B

DRAM_A13

DRAM_D58

DRAM_D35

DRAM_D36

DRAM_D23

DDR_SDCLK1_B

DRAM_D4

DRAM_A5

DRAM_D16

DRAM_D57

DRAM_DQM5

DRAM_D20

DRAM_D6

DDR_SDCLK1

DRAM_A4

DRAM_D43

DRAM_D53

DRAM_SDQS6

DRAM_DQM4

DRAM_D3

DRAM_D45

DRAM_D33

DRAM_D0

DRAM_A12

DRAM_D24

DRAM_D2

DRAM_D44

DRAM_D1

DRAM_D21

DRAM_SDQS2

DRAM_D5

DRAM_D22

ZQPAD

DRAM_D42

DRAM_SDQS0

DRAM_D63

DRAM_SDQS3

DDR_SDCLK0

DDR_SDCLK0_B

DRAM_D14

DRAM_D12

DRAM_SDQS4_B

DRAM_D55

DRAM_SDQS3_B

DRAM_D13

DRAM_D9

DRAM_D30

DRAM1_ZQ

DRAM_D29

DRAM_D54

DRAM_D32

DRAM_D15

DRAM_D7

DRAM_D27

DRAM_D34

DRAM_D48

DRAM_D11

DRAM_D31

DRAM_SDQS5

DRAM_D47

DRAM_D26

DRAM2_ZQ

DRAM_SDQS4

DRAM_D25

DRAM_DQM0

DRAM_D56

DRAM_A1

DRAM_A1

DRAM_A1

DRAM_A1

DRAM_SDODT0

DRAM_SDODT0

DRAM_SDODT0

DRAM_SDODT0

DRAM_SDODT0

DRAM_DQM6

DRAM_SDQS1_B

DRAM_D10

DRAM_D51

DRAM_SDCLK1

DRAM_SDCLK1

DRAM_SDCLK1

DRAM_D8

DRAM_SDCLK0

DRAM_SDCLK0

DRAM_SDCLK0

DRAM_A14

DRAM_A14

DRAM_A14

DRAM_A14

DRAM_D28

DRAM_D39

DRAM_D19

DRAM_A2

DRAM_A2

DRAM_A2

DRAM_A2

DRAM_SDQS7

DRAM_SDQS5_B

DRAM_DQM7

DRAM_SDCLK0_B

DRAM_SDCLK0_B

DRAM_SDCLK0_B

DRAM_D62

DRAM_A0

DRAM_A0

DRAM_A0

DRAM_A0

DRAM_RESET_B

DRAM_RESET_B

DRAM_RESET_B

DRAM_RESET_B

DRAM_A9

DRAM_A9

DRAM_A9

DRAM_A9

DRAM_WE_B

DRAM_WE_B

DRAM_WE_B

DRAM_WE_B

DRAM_WE_B

DRAM_SDQS1

DRAM_D18

DRAM_D40

DRAM_CAS_B

DRAM_CAS_B

DRAM_CAS_B

DRAM_CAS_B

DRAM_CAS_B

DRAM_D61

DRAM_SDCKE0

DRAM_SDCKE0

DRAM_SDCKE0

DRAM_SDCKE0

DRAM_SDCKE0

DRAM_SDQS2_B

DRAM_DQM2

DRAM_A15

DRAM_A15

DRAM_A15

DRAM_A15

DRAM_D38

DRAM_RAS_B

DRAM_RAS_B

DRAM_RAS_B

DRAM_RAS_B

DRAM_RAS_B

DRAM_D60

DRAM_SDQS0_B

DRAM_DQM3

DRAM_SDCLK1_B

DRAM_SDCLK1_B

DRAM_SDCLK1_B

DRAM_A8

DRAM_A8

DRAM_A8

DRAM_A8

DRAM_A11

DRAM_A11

DRAM_A11

DRAM_A11

DRAM_D41

DRAM_A3

DRAM_A3

DRAM_A3

DRAM_A3

DRAM_D37

DRAM_D59

DRAM_D17

DRAM_A7

DRAM_A7

DRAM_A7

DRAM_A7

DRAM_D52

DRAM_A10

DRAM_A10

DRAM_A10

DRAM_A10

DRAM_D46

DRAM_D50

DRAM_SDQS7_B

DRAM_DQM1

DRAM_CS0_B

DRAM_CS0_B

DRAM_CS0_B

DRAM_CS0_B

DRAM_CS0_B

DRAM_A6

DRAM_A6

DRAM_A6

DRAM_A6

DRAM_D49

DRAM_SDQS6_B

DRAM_A13

DRAM_A13

DRAM_A13

DRAM_A13

DRAM_D58

DRAM_D35

DRAM_D36

DRAM_SDBA2

DRAM_SDBA2

DRAM_SDBA2

DRAM_SDBA2

DRAM_SDBA2

DRAM_D23

DRAM_D4

DRAM_A5

DRAM_A5

DRAM_A5

DRAM_A5

DRAM_D16

DRAM_D57

DRAM_DQM5

DRAM_SDBA1

DRAM_SDBA1

DRAM_SDBA1

DRAM_SDBA1

DRAM_SDBA1

DRAM_D20

DRAM_D6

DRAM_A4

DRAM_A4

DRAM_A4

DRAM_A4

DRAM_D43

DRAM_D53

DRAM_SDQS6

DRAM_SDBA0

DRAM_SDBA0

DRAM_SDBA0

DRAM_SDBA0

DRAM_SDBA0

DRAM_DQM4

DRAM_D3

DRAM_D45

DRAM_D33

DRAM_D0

DRAM_A12

DRAM_A12

DRAM_A12

DRAM_A12

DRAM_D24

DRAM_D2

DRAM_D44

DRAM_D1

DRAM_D21

DRAM_SDQS2

DRAM_D5

DRAM_D22

DRAM_D42

DRAM_SDQS0

DRAM_D63

DRAM_SDQS3

DRAM_D14

DRAM_D12

DRAM_SDQS4_B

DRAM_D55

DRAM_SDQS3_B

DRAM_D13

DRAM_D9

DRAM_D30

DRAM_D29

DRAM_D54

DRAM_D32

DRAM_D15

DRAM_D7

DRAM_D27

DRAM_D34

DRAM_D48

DRAM_D11

DRAM_D31

DRAM_SDQS5

DRAM_D47

DRAM_D26

DRAM_SDQS4

DRAM_D25

DRAM_DQM0

DRAM_D56

___

___


D


5


C3

19

eMMC, SPI NOR FLASH

X

PUBI:

FIUO:

FCP:


Page Title:

of

Sheet

Date:

Rev

Document Number

Size

Drawing Title:

Layout:

50ohm, SD singals(SD_DATAx, SD_CMD, SD_CLK) control.

4MB SPI NOR FLASH

8GB eMMC MEMORY

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

3

3

3

3

3

3

3

3

15,22

15,22

15,22

15,22

3

3

C19

6.3V

0.1UF

R20

10.0K

R643

200K

C22

6.3V

4.7UF

C83

16V

0.1UF

C26

6.3V

4.7UF

C25

6.3V

0.1UF

C27

6.3V

0.1UF

R149

10.0K

A4

NC_A4

A6

NC_A6

A9

NC_A9

A11

NC_A11

B2

NC_B2

B13

NC_B13

D1

NC_D1

D14

NC_D14

H1

NC_H1

H2

NC_H2

H6

NC_H6

H7

NC_H7

H8

NC_H8

H9

NC_H9

H10

NC_H10

H11

NC_H11

H12

NC_H12

H13

NC_H13

H14

NC_H14

J1

NC_J1

J7

NC_J7

J8

NC_J8

J9

NC_J9

J10

NC_J10

J11

NC_J11

J12

NC_J12

J14

NC_J14

J13

NC_J13

K1

NC_K1

R1

NC_R1

R2

NC_R2

R3

NC_R3

R5

NC_R5

R12

NC_R12

R14

NC_R14

R13

NC_R13

T1

NC_T1

T2

NC_T2

T3

NC_T3

T5

NC_T5

T12

NC_T12

T13

NC_T13

T14

NC_T14

U1

NC_U1

U2

NC_U2

U3

NC_U3

U6

NC_U6

U7

NC_U7

U10

NC_U10

U12

NC_U12

U13

NC_U13

U14

NC_U14

V1

NC_V1

V2

NC_V2

V3

NC_V3

V12

NC_V12

V13

NC_V13

V14

NC_V14

W1

NC_W1

W2

NC_W2

W3

NC_W3

W7

NC_W7

W8

NC_W8

W9

NC_W9

W10

NC_W10

W11

NC_W11

W12

NC_W12

W13

NC_W13

W14

NC_W14

Y1

NC_Y1

Y3

NC_Y3

Y6

NC_Y6

Y7

NC_Y7

Y8

NC_Y8

Y9

NC_Y9

Y10

NC_Y10

Y11

NC_Y11

Y12

NC_Y12

Y13

NC_Y13

Y14

NC_Y14

AA1

NC_AA1

AA2

NC_AA2

AA7

NC_AA7

AA8

NC_AA8

AA9

NC_AA9

AA10

NC_AA10

AA11

NC_AA11

AA12

NC_AA12

AA13

NC_AA13

AA14

NC_AA14

AE1

NC_AE1

AE14

NC_AE14

AG2

NC_AG2

AG13

NC_AG13

AH4

NC_AH4

AH6

NC_AH6

P12

NC_P12

P13

NC_P13

P10

NC_P10

P3

NC_P3

P2

NC_P2

P1

NC_P1

N14

NC_N14

N13

NC_N13

N12

NC_N12

N10

NC_N10

K3

NC_K3

K5

NC_K5

K7

NC_K7

K8

NC_K8

K9

NC_K9

K10

NC_K10

K11

NC_K11

K12

NC_K12

K13

NC_K13

K14

NC_K14

L1

NC_L1

L2

NC_L2

L3

NC_L3

L4

NC_L4

L12

NC_L12

L13

NC_L13

L14

NC_L14

M1

NC_M1

M2

NC_M2

M3

NC_M3

M5

NC_M5

M8

NC_M8

M9

NC_M9

M10

NC_M10

M12

NC_M12

M13

NC_M13

M14

NC_M14

N1

NC_N1

N2

NC_N2

N3

NC_N3

P14

NC_P14

AH9

NC_AH9

AH11

NC_AH11

U512-B

SDIN5C2-8G

C20

6.3V

0.1UF

1

S

2

Q

3

W/VPP

4

VSS

5

D

6

C

7

HOLD

8

VCC

U14

M25P32-VMW6TG

C21

6.3V

0.1UF

C23

6.3V

0.1UF

R646

DNP

10.0K

J6

DAT7

K6

VC

CQ

3

T1

0

VC

C3

U9

VC

C4

Y4

VC

CQ

5

W4

VC

CQ

4

K4

VS

SQ

3

AA

6

VS

SQ

2

AA

5

VC

CQ

2

R1

0

VS

S3

U8

VS

S4

U5

RESET

P5

VS

S2

AA

3

VC

CQ

1

M7

VS

S1

Y5

VS

SQ

5

Y2

VS

SQ

4

J5

DAT6

M6

VC

C1

N5

VC

C2

W5

CMD

AA

4

VS

SQ

1

W6

CLK

H3

DAT0

H4

DAT1

H5

DAT2

J2

DAT3

J3

DAT4

J4

DAT5

K2

VD

DI

U512-A

SDIN5C2-8G

GEN_3V3

GND

GND

GND

GND

GEN_3V3

GEN_3V3

GND

GEN_3V3

GND

GND

GEN_3V3

GEN_3V3

SD4_DATA0

SD4_DATA1

SD4_DATA2

SD4_DATA3

SD4_DATA4

SD4_DATA5

SD4_DATA6

SD4_DATA7

SPINOR_MISO

SPINOR_MOSI

SPINOR_CLK

SPINOR_CS0

SD4_CLK

SD4_CMD

SPI_NOR_WP

GEN_3V3

SPI_NOR_HOLD_B

EMMC_VDDI

___

___


D

SD CARD, SATA

19

C3


6


X

PUBI:

FIUO:

FCP:


Page Title:

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Rev

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Drawing Title:

Layout:

50ohm, SD signals(SD_DATAx, SD_CMD, SD_CLK) length equal

Layout:

1. 100ohm diff pairs, length equal

2. Mount these capacitors very close to the connector J506.

hard drive standoff

SD CARD SOCKET

SATA CONNECTOR

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

3

3

3

3

3

3

3

3

3

3

3

3

Power Trace

C756

25V

0.01UF

R667

DNP

10.0K

C752

25V

0.01UF

R674

10.0K

C751

25V

0.01UF

R670

10.0K

BH1

SMTSO-M2-2.0ET

BH2

SMTSO-M2-2.0ET

C763

16V

0.1UF

1

2

C762

10V

47uF

C761

6.3V

10UF

C757

25V

0.01UF

1

GND1

2

TXP

3

TXN

4

GND2

5

RXN

6

RXP

7

GND3

8

GND5

9

GND4

J3

SATA-DATA-1

SATA-DATA

R100

R0402

10K

R220

R0402

47K

1

2

3

Q7

SOT-23

AO3401

R221

R0402

47K

1

VDD5V

2

GND1

J14

SIP-2P-2.54

SATA-POWER

+

1

2

CT1

C1206

22uF/16V

C131

C0402

100nF

C132

C0402

100nF

Q8

MMBT3904

9

SW

7

D0

8

D1

1

D2

2

D3/CD

3

CMD

5

CLK

4

VCC

15

NC

14

NC

13

GND

12

GND

11

GND

10

GND

6

GND

J6

MICOR-SD

R69

0R

R70

0R

R72

0R

R73

0R

R74

0R

R76

0R

R79

0R

GEN_3V3

GEN_3V3

GND

GND

GND

GND

GND

SD3_DATA0

SD3_DATA1

SD3_DATA2

SD3_DATA3

SD3_CMD

SD3_CLK

SD3_CD_B

SATA_TXN

SATA_TXP

SATA_RXN

SATA_RXP

SATA_RXN_CON

SATA_RXP_CON

SATA_TXP_CON

SATA_TXN_CON

5V_IN

GND

SATA_DEVSLP

SD3_CD_B

SD3_DATA0

SD3_DATA1

SD3_DATA2

SD3_DATA3

SD3_CMD

SD3_CLK

___

___


D

19

7

C3


LVDS, HDMI


X

PUBI:

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Page Title:

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Size

Drawing Title:

NOTE:

When using HDMI, I2C2 bus is limited to 100 kHz

to read EDID values due to HDMI standards.

I2C2 bus speed should be limited to 100 kHz whenever

Hot Plug Detect is high.

Layout: HDMI 100 ohm differential pairs

LVDS

HDMI

LVDS0

Place L515, L516, L517 and L518

CMCs close to J403 connector.

LVDS Connector notes:

Pin 1: This pin is the Display Enable pin. It is used to

Enable/Disable the HannStar display.

Pin 5: This pin is the Display Brightness control. It

provides a PWM signal to the display to increase/

decrease display brightness depending on PWM

duty cycle. This signal is shared by all displays, so all

displays will change brightness together.

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

3

3

3

3

3

3

3

3

3,8

22

3

22

22

22

22

22

3

3

2

1

4

3

L515

90OHM

R647

47K

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

16

17

18

19

20

21

22

23

24

25

26

27

28

29

30

S1

S2

J503

CON 30

2

1

4

3

L516

90OHM

R152

47K

C745

16V

10%

0.1UF

R655

27K

C598

10%

10V

4.7uF

2

1

4

3

L517

90OHM

R649

4.7K

C742

10%

16V

0.1UF

2

1

4

3

L518

90OHM

C86

16V

10%

0.1UF

R651

4.7K

C631

16V

10%

2.2uF

C744

10%

16V

0.1UF

R582

0.5%

0.02

TP503

C87

10%

16V

0.1UF

R579

10.0K

1

5V_SUPPLY

2

LV_SUPPLY

3

GND3

4

TMDS_D2+_4

5

TMDS_GND5

6

TMDS_D2-_6

7

TMDS_D1+_7

8

TMDS_GND8

9

TMDS_D1-_9

10

TMDS_D0+_10

11

TMDS_GND11

12

TMDS_D0-_12

13

TMDS_CK+_13

14

TMDS_GND14

15

TMDS_CK-_15

16

CE_REMOTE_IN

17

DDC_CLK_IN

18

DDC_DAT_IN

19

HOTPLUG_DET_IN

20

HOTPLUG_DET_OUT

21

DDC_DAT_OUT

22

DDC_CLK_OUT

23

CE_REMOTE_OUT

24

TMDS_CK-_24

25

TMDS_GND25

26

TMDS_CK+_26

27

TMDS_D0-_27

28

TMDS_GND28

29

TMDS_D0+_29

30

TMDS_D1-_30

31

TMDS_GND31

32

TMDS_D1+_32

33

TMDS_D2-_33

34

TMDS_GND34

35

TMDS_D2+_35

36

GND36

37

ESD_BYP

38

5V_OUT

U16

CM2020

C743

10V

10%

4.7uF

R151

15K

A

C

D504

BAT54HT1

R614

10.0K

C749

10%

16V

0.1UF

1

TX2+

2

TX2SD1

3

TX2-

4

TX1+

5

TX1SD2

6

TX1-

7

TX0+

8

TX0SD3

9

TX0-

10

TXC+

11

TXCSD4

12

TXC-

13

CEC

14

RSVD

15

SCL

16

SDA

17

GND_1

18

+5V

19

HPD

20

GN

D_

2

21

GN

D_

3

J27

ZX-HDMI-07A

C194

0.1uF

C13

4.7uF

GEN_3V3

GND

GND

GND

GND

GND

GND

GND

GEN_3V3

GEN_3V3

GEN_3V3

PMIC_5V

PMIC_5V

GND

GND

GND

GND

GEN_3V3

GEN_3V3

GND

GND

LVDS0_TX0_N

LVDS0_TX0_P

LVDS0_TX1_N

LVDS0_TX1_P

LVDS0_TX2_N

LVDS0_TX2_P

LVDS0_CLK_N

LVDS0_CLK_P

DISP0_CONTRAST

LVDS0_EDID_SCL

CABC_EN0

LVDS0_EDID_SDA

LVDS0_TOUCH_SCL

LVDS0_TOUCH_SDA

CAP_TCH_INT0

HDMI_DDC_CLK_IN

HDMI_DDC_DAT_IN

HDMI_CEC_IN

HDMI_HPD

HDMI_D0M

HDMI_D0P

HDMI_D1M

HDMI_D1P

HDMI_D2M

HDMI_D2P

HDMI_CLKM

HDMI_CLKP

LVDS0_CLK_NEG

LVDS0_TX2_POS

HP_DET_OUT

HDMI_CLKP

HDMI_D1M

HDMI_D1P

LVDS0_5V

HDMI_DDC_CLK_OUT

LVDS0_TX0_NEG

HDMI_CEC_OUT

HDMI_D0M

HDMI_D0P

CEC_BCK_PRO

LVDS0_CLK_POS

LVDS0_TX1_NEG

LVDS0_TX0_POS

HDMI_D2M

HDMI_ESD

LVDS0_TX2_NEG

HDMI_D2P

TP23

HDMI_5V_OUT

LVDS0_TX1_POS

HDMI_CLKM

HP_DET_OUT

HDMI_CLKP

HDMI_D2P

HDMI_DDC_DAT_OUT

HDMI_D1M

HDMI_CLKM

HDMI_DDC_CLK_OUT

HDMI_D0M

HDMI_D1P

HDMI_D0P

HDMI_D2M

HDMI_5V_OUT

HDMI_DDC_DAT_OUT

HDMI_CEC_OUT

___

___


D

X


CAMERA, EXP PORT


C3

8

19

PUBI:

FIUO:

FCP:


Page Title:

of

Sheet

Date:

Rev

Document Number

Size

Drawing Title:

CSI CMOS Sensor

OV5642 5M Pixel

Place R158 and R159 near U15.

Acts as source termination.

Place R180 close to connector J9 to in the event

a reflected signal from camera needs to be supressed.

MIPI CMOS Sensor

OV5640 5M Pixel

Layout: 100 ohm differential pairs

NOTE:

The Camera Analog Power supply has been moved to VGEN3. Freescale SW will program VGEN3

to operate at 2.8V. L25 and L26 are now populated and L10 and L17 are depopulated. See the

Freescale HW User Guide for the Smart Device board for details (to be published 4Q12).

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

3,8,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3

3

3

3

3

3

3,8,9

22

22

3

3

3

3

22

22

3,7

3

3

3

3

3

3

22

22

10

R180

0

C587

16V

0.1UF

38

34

30

26

22

18

14

10

6

2

40

36

32

28

24

20

16

12

8

4

41

42

43

44

45

46

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

J9

CONN PLUG 40

38

34

30

26

22

18

14

10

6

2

40

36

32

28

24

20

16

12

8

4

41

42

43

44

45

46

1

3

5

7

9

11

13

15

17

19

21

23

25

27

29

31

33

35

37

39

J5

CONN PLUG 40

C746

6.3V

0.22UF

R159

33

C28

6.3V

4.7UF

2

1

L17

DNP

120OHM

C94

6.3V

0.22UF

C100

6.3V

4.7UF

R165

DNP

0

R26

4.7K

C602

6.3V

0.22UF

C50

6.3V

0.22UF

R157

0

R162

4.7K

C29

16V

0.1UF

C102

16V

0.1UF

C588

16V

0.1UF

2

1

L25

120OHM

C103

16V

0.1UF

C101

6.3V

4.7UF

R726

0

6

OE

1

B2

8

B1

7

VC

CB

3

VC

CA

5

A1

4

A2

2

GN

D

U10

TXS0102

C585

16V

0.1UF

C104

16V

0.1UF

2

1

L26

120OHM

C30

6.3V

4.7UF

1

VC

CA

6

VC

CB

2

A

3

GN

D

4

B

5

NC

U15

NLSV1T34

2

1

L10

DNP

120OHM

C105

16V

0.1UF

GEN_3V3

GND

GEN_1V8

GEN_3V3

GND

GND

GND

GND

GND

GND

GND

GND

GEN_1V8

VGEN3_2V5

VGEN2_1V5

GND

GND

GND

GND

GND

GEN_1V8

VGEN3_2V5

VGEN2_1V5

GND

GND

GND

GND

GEN_1V8

GEN_3V3

VGEN5_2V8

VGEN5_2V8

GPIO_0_CLKO

CSI0_PWN

CSI0_RST_B

CSI0_DAT12

CSI0_DAT13

CSI0_DAT14

CSI0_DAT15

CSI0_DAT16

CSI0_DAT17

CSI0_DAT18

CSI0_DAT19

CSI0_HSYNCH

CSI0_VSYNCH

CSI0_PIXCLK

CSI_PWN

CSI_RST_B

CSI0_SCL

CSI0_SDA

CSI_D1P

CSI_D1M

CSI_CLK0P

CSI_CLK0M

CSI_D0P

CSI_D0M

CSI2_SCL

CSI2_SDA

CAM2_1V5

COMS_2V8

COMS_3V3

COMS2_1V8

CSI_MCLK

MCLK_1V8

COMS2_2V8

CAM_1V5

CSI_PIXCLK

COMS_1V8

CSI_SDA

CSI_SCL

ArduinoSocket

Drawing Title:

Size

Document Number

Rev

Date:

Sheet

of

Page Title:


FCP:

FIUO:

PUBI:


19

X


C3

9

___

D


___

I2C Address:

10010xx(R/W)

Touch Panel decoder,

Analog to Digital converter.

1.7V to 3.6V

1

2

3

4

5

22

22

3

I2C Address:

10010xx(R/W)

Touch Panel decoder,

Analog to Digital converter.

1.7V to 3.6V

22

22

3

A

1

R64

0

R102

DNP

0

R61

0

C63

16V

0.1UF

R55

0

1

2

L14

120OHM

R58

0

R101

DNP

0

R92

100K

R110

0

R111

100K

1

X+

2

VD

D

3

GN

D

4

X-

5

Y-

6

TIRQ

7

SDA

8

SCL

9

A0

10

A1

11

AUX

12

Y+

13

EP

U11

MAX11801

R93

100K

C65

6.3V

4.7UF

C60

16V

0.1UF

R222

DNP

R223

10K

0

R224

DNP

C133

16V

0.1UF

R226

0

1

2

L27

120OHM

R227

0

R228

10K

0

R229

DNP

R230

0

R231

100K

1

X+

2

VD

D

3

GN

D

4

X-

5

Y-

6

TIRQ

7

SDA

8

SCL

9

A0

10

A1

11

AUX

12

Y+

13

EP

U23

MAX11801

R233

DNP

C134

6.3V

4.7UF

C135

16V

0.1UF

1

2

3

4

5

6

7

8

J17

DIP_2.54_CONN_8P

1

2

3

4

5

6

7

8

9

10

J15

DIP_2.54_CON_10P

1

2

3

4

5

6

7

8

J11

DIP_2.54_CONN_8P

1

2

3

4

5

6

J16

DIP_2.54_CON_6P

R77

R0402

2K2

R78

R0402

2K2

ES

D1

6

ES

DP

SA

04

02

V0

5

ES

D1

7

ES

DP

SA

04

02

V0

5

ES

D1

8

ES

DP

SA

04

02

V0

5

ES

D1

9

ES

DP

SA

04

02

V0

5

ES

D2

0

ES

DP

SA

04

02

V0

5

ES

D2

1

ES

DP

SA

04

02

V0

5

ES

D2

2

ES

DP

SA

04

02

V0

5

ES

D2

3

ES

DP

SA

04

02

V0

5

ES

D3

0

ES

DP

SA

04

02

V0

5

ES

D3

1

ES

DP

SA

04

02

V0

5

ES

D3

2

ES

DP

SA

04

02

V0

5

ES

D3

3

ES

DP

SA

04

02

V0

5

ES

D3

4

ES

DP

SA

04

02

V0

5

ES

D3

5

ES

DP

SA

04

02

V0

5

ES

D3

6

ES

DP

SA

04

02

V0

5

ES

D3

7

ES

DP

SA

04

02

V0

5

R83

R0402

2K2

R115

0R

R0402

ES

D2

4

ES

DP

SA

04

02

V0

5

ES

D2

5

ES

DP

SA

04

02

V0

5

ES

D2

6

ES

DP

SA

04

02

V0

5

ES

D2

7

ES

DP

SA

04

02

V0

5

ES

D2

8

ES

DP

SA

04

02

V0

5

ES

D2

9

ES

DP

SA

04

02

V0

5

C1

36

C0

40

2

33

P

C1

37

C0

40

2

33

P

C1

38

C0

40

2

33

P

C1

39

C0

40

2

33

P

C1

40

C0

40

2

33

P

C1

41

C0

40

2

33

P

R2

34

0R

R0

40

2

R2

35

0R

R0

40

2

R2

36

0R

R0

40

2

R2

37

0R

R0

40

2

R2

38

0R

R0

40

2

R2

39

0R

R0

40

2

IR R

ece

iver

3

VC

C

1

OU

T

2

GN

D

U17

HS/VS1838

C3

C0402

100nF

R185

4K7

R0402

GND

GND

GND

GND

GND

GND

AUX_3V15

AUX_3V15

TS_SCL

TS_SDA

TS_INT

ADC3

ADC0

ADC1

ADC2

GND

GND

GND

GND

GND

GND

AUX_3V15

AUX_3V15

TS1_SCL

TS1_SDA

TS1_INT

ADC7

ADC4

ADC5

ADC6

TWI2-DAT

TWI2-SCK

SPI0_CLK

SPI0_MISO

SPI0_MOSI

SPI0_CS0

PWM3

GPIO8

GEN_3V3

GEN_3V3

GND

GND

GPIO7

PWM2

PWM1

GPIO6

PWM0

GPIO5

UART3_TXD

UART3_RXD

GND

GEN_3V3

GEN_3V3

PWRON

5V_IN

ADC0

ADC1

ADC2

ADC3

ADC4

ADC5

GND

GND

TWI2-DAT

TWI2-SCK

GPIO1

GPIO2

GPIO3

GPIO4

IR-AP

GEN_3V3

GEN_3V3

___

___


D

X

AUDIO

19


C3

10


PUBI:

FIUO:

FCP:


Page Title:

of

Sheet

Date:

Rev

Document Number

Size

Drawing Title:

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

8

3

3

3

3

L

R

GND

MIC

1

2

3

4

¿¿½üMIC°Ú·Å

R10

22

R14

22

R13

0

R18

0

R16

0

5

7

6

4

3

2

J4

PJ-328Z

R6

10.0K

37

MCLK

38

SCLK

36

SDOUT

39

SDIN

40

LRCK

1

SDA

2

SCL

3

AD0

32

RESET

29

AIN1A

30

AIN1B

11

FLYN

12

FLYP

10

VHPFILY

25

AIN2A

26

AIN2B

17

AG

ND

35

DG

ND

41

GN

D

28

AFILTB

27

AFILTA

19

VQ

18

FILT+

14

HPLINE_OUTB

15

HPLINE_OUTA

31

SPKRHP

24

AIN3B/MIC2-/MIC1B

22

AIN4B/MIC2+/MIC2B

20

MICBIAS

21

AIN4A/MIC1+/MIC2A

23

AIN3A/MIC1-/MIC1A

9

SPKR_OUTB-

7

SPKR_OUTB+

6

SPKR_OUTA-

4

SPKR_OUTA+

8

VP

1

5

VP

33

VL

13

+V

HP

16

VA

34

VD

U6

CS42L52_8

CS42L52

E:WORKCC1900RICKYHXFEE-E_BOOK-SC01 V1.0.DSN

C1

1uF

C2

10UF/10V

C8

0.1

uF

C9

0.1

uF

R5

2

0R

R3

33R

R54

33R

C10

1uF

C142

1uF

C1

43

15

0p

F

C1

44

15

0p

F

C1

45

1uF

C1

46

10

UF

/10

V

C147

0.1uF

C148

10UF/10V

C149

0.1uF

R4

10

K

R5

2.2K

C150

105

C151

1uF

R56

0R

R6

0

2.2

K

R7

2.2

K

C159

0.1uF

R5

1

1K

1

TP

X2

1

TP

X3

1

TP

X4

1

TP

X5

GPIO_0_CLKO

AUD3_TXD

AUD3_RXD

AUD3_TXC

AUD3_TXFS

AUDIO_CLK

ADCDAT1

DACDAT1

LRCLK1

BCLK1

HEADPHONE_DET

HP_R

HP_L

MICBIAS2_RAW

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

CODEC_RES

CODEC_I2C_CLK

CODEC_I2C_DAT

N51769707

N51769522

N51769697

N51769783

N51769763

N51769761

N51908325

N51908321

N51908319

MIC1_IN

MIC1_IN

MICBIAS

MICBIAS

MICGND

MICGND

VGEN3_2V5

5V_IN

GEN_3V3

GEN_3V3

MICBIAS2_RAW

HEADPHONE_DET

HP_L

HP_R

GEN_3V3

GND

GND

USB

Drawing Title:

Size

Document Number

Rev

Date:

Sheet

of

Page Title:


FCP:

FIUO:

PUBI:


19

X


C3

11

___

D


___

Layout: 90ohm differential pairs

NOTE:

Due to placement requirements on the SABRE SD board set,

layout routing for the USB_OTG_DP and USB_OTG_DN traces

are sub-optimal. It is recommended that customers consider using

the USB layout on the Freescale i.MX6 SABRE AI board as a

better example of proper USB trace routing.

3

3

3

3

3

3

3

3,18

A

1

USB-OTG

USB-HOST-HUB

Close to GL850G

Close to PIN24

HUB supply voltage

USB to hub

C66

16V

0.1UF

C697

16V

0.1UF

R723

DNP

0

2

1

4

3

L520

90OHM

1

2

TVS1

R724

0

R112

DNP

100K

R620

100

R639

DNP

100K

R629

DNP

100K

1

ENA

2

FLGA

3

FLGB

4

ENB

5

OUTB

6

GND

7

IN

8

OUTA

U515

MIC2026-1YM

1

2

L519

470OHM

R628

4.7K

R644

10.0K

G

ID

D+

D-

5V

1

2

3

4

S2

5

S1

S3

S4

J505

MICRO USB AB 5

3

1

2

Q515

2N7002

R645

4.7K

C61

10V

4.7uF

1

3

2

Q514

IRLML6401

GND

VCC

1

2

3

4

5

U13

M74VHC1GT126DF1G

1

2

L15

470OHM

C62

16V

1.0 UF

GL850G Decal:(IC_SSOP_28-PIN)

2

DM2

3

DP2

4

RREF

5

AVDD2

6

XTAL1

7

XTAL2

8

DM3

9

DP3

10

AVDD3

11

DM4

12

DP4

13

RESET#

14

TEST

16

DVDD

28

DP1

27

DM1

26

DP0

21

OVCUR1#

20

PWREN2

19

OVCUR2#

18

PGANG

1

AVDD1

15

GND

24

V33

23

V5

22

PWREN1

25

DM0

17

PSELF

1

2

3

4

Y5

12MHz_20ppm

FB36

100MHz;220ohm¡À25%

C188

100nF

C197

10uF

C172

100nF

C176

100nF

C191

100nF

C163

100nF

C190

100nF

C119

27pF NPO

C158

27pF NPO

C199

0.1uF

1

2

TVS3

NC/0521P

1

2

TVS7

NC/0521P

1

2

F2

500mA

1

2

TVS4

NC/0521P

1

2

TVS8

NC/0521P

CT4

100uF/6.3V

R150

10K

FB5

100MHz;220ohm¡À25%

R155

680ohm1%

R156

D:PROJECTTCC760È¸·ÎµµTCC760_DEMO_FOR_2.7_V0.1.DSN

10K

R160


10K

R184


100K

SHIELD

SHIELD

GNDB

DB+

DB-

VBUSB

GNDA

DA+

DA-

VBUSA

SHIELD

SHIELD

A1

A3

A2

A4

MH1

MH2

B1

B2

B3

B4

MH3

MH4

P2

USB-A Conn.

GND

GND

GND

PMIC_5V

GND

GND

OTG_VBUS

USB_OTG_VBUS

OTG_VBUS

GND

GEN_3V3

ETH_3V3

ETH_3V3

ETH_3V3

USB_H1_VBUS

GND

GEN_3V3

USB_OTG_DP

USB_OTG_ID

USB_OTG_DN

USB_OTG_OC

USB_OTG_PWR_EN

USB_H1_OC

USB_H1_PWR_EN

UOK_B

IMX_PWR_CNTL

OTG_SHELL_GND

USB_OTG_CON_GND

USB_OTG_CON_VBUS

USB_OTG_CON_DN

USB_CBL_ATT

IMX_PWR_B

USB_OTG_CON_DP

USB_OTG_PWR_EN

HUB_VDD

HUB_AVDD

HUB_VDD

HUB_AVDD

HUB_VDD

GEN_3V3

HUB_VDD

HUB_DM2

HUB_DP2

HUB_DM3

HUB_DP3

HUB_DM4

HUB_DP4

USB_HOST_DP

USB_HOST_DN

PGANG

12M_X1

RESET#

12M_X2

OVCUR1#

HUB_DM1

12M_X1

12M_X2

HUB_DP1

5V_IN

HUB_DM1

HUB_DP1

HUB_DM2

HUB_DP2

___

___


D

X


ETHERNET


C3

12

19

PUBI:

FIUO:

FCP:


Page Title:

of

Sheet

Date:

Rev

Document Number

Size

Drawing Title:

470pF are for LED

EMI Filter Reserved

1.1V

Power-on Strapping Pins

PHYADDRESS0

PHYADDRESS1

MODE2[2]

SEL_GPIO_INT

Pin 5 mode:

0: INT ; 1:GPIO

MODE2[0]

MODE2[3]

MODE2[1]

Select the core voltage level:

0:1.1V, 1:1.2V

ANA_MOD

(Default assemble: 0000)

1100 BaseT, RMII1;

1101 BaseT, RMII2;

1110 100X, RGMII, 75OHMS;

1111 100X, TRANS, 75OHMS;

0000 BaseT, RGMII;

0001 BaseT, SGMII;

0010 1000X, RGMII, 50OHMS;

0011 1000X, RGMII, 75OHMS;

0100 1000X, TRANS, 50OHMS;

0101 1000X, TRANS, 75OHMS;

0110 100X, RGMII, 50OHMS;

0111 100X, TRANS, 50OHMS;

Others Reserved

MODE2[3:0]

Layout: High speed data lines : 50 ohms

Place R634 near the AR8031 PHY.

Layout: 100 ohm differential pairs

Place LED D11 near LED for

pins 11 - 12 of RJ-45 connector.

Orange LED indicates 1000 speed.

Alternate power source

for processor I/O

To Processor

I/O supply

NOTE:

Place R626 close

to Ethernet PHY.

NOTE:

Solder short normally connects NVCC_RGMII to ETH_VDDIO.

To connect NVCC_RGMII to VGEN1_1V5, cut the trace between

pads 1 - 2 and solder a 0 Ohm resistor between pads 2 - 3.

NOTE:

R657 pull up required to

support AR8031 open

drain MDIO pin, when

AR8031 is outputting

data. Pull up not required

on MDC since line is

only driven by i.MX 6.

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

3

3

3

3

3

3

3

3

3

3

3

3

3

3

3

3

3

3

100 ohm

C95

16V

0.1UF

R631

10.0K

1

2

L19

4.7UH

C748

50V

22PF

C84

16V

1.0 UF

R146

10.0K

R164

10.0K

C739

DNP

50V

470PF

C98

16V

0.1UF

R141

10.0K

2

RST

3

LX

4

VD

D3

3

6

XTLO

7

XTLI

8

AVDDL1

9

RBIAS

10

VD

DH

_R

EG

11

TRXP0

12

TRXN0

13

AVDDL3

14

TRXP1

15

TRXN1

16

AV

DD

33

17

TRXP2

18

TRXN2

19

AVDDL4

20

TRXP3

21

TRXN3

22

PPS

23

LED_ACT

24

LED_LINK1000

25

CLK_25M

26

LED_LINK10_100

27

RXD3

28

RXD2

29

VD

DIO

_R

EG

30

RXD1

31

RXD0

32

RX_DV

33

RX_CLK

34

TX_EN

35

GTX_CLK

36

TXD0

37

TXD1

38

TXD2

39

TXD3

40

WOL_INT

41

SD

42

SON

49

GN

D

1

MDC

5

INT

43

SOP

44

AVDDL2

45

SIN

46

SIP

47

DVDDL

48

MDIO

U516

AR8031

2

1

L18

120OHM

R161

DNP

10.0K

SH24

SOLDER SHORT

C91

6.3V

10UF

R166

1%

2.37K

R145

10.0K

C99

16V

0.1UF

R659

0

R638

DNP

10.0K

C740

DNP

50V

470PF

C88

16V

1.0 UF

C97

6.3V

10UF

R143

10.0K

C93

16V

0.1UF

2

1

L16

120OHM

R626

22

R142

10.0K

R654

4.7K

C85

16V

0.1UF

R144

DNP

10.0K

C96

16V

1.0 UF

R634

0

C92

16V

0.1UF

R147

DNP

10.0K

C90

16V

0.1UF

TP18

R140

10.0K

R636

10.0K

C741

50V

DNP

470PF

R657

1.5K

A

C

D1

1

LE

D_

OR

AN

GE

C89

16V

0.1UF

R148

DNP

10.0K

R641

270

R163

10.0K

C750

50V

22PF

C196

C0603

102-1KV

C4

C0603

104-50V

10/100/1000

MAGNETICS &&

RJ45

2

TD0+

3

TD0-

4

TD1+

5

TD2+

6

TD2-

7

TD1-

8

TD3+

9

TD3-

11

GREEN+

12

GREEN-

10

CHSGND

1

GND

13

YELLOW-

14

YELLOW+

15

SHELL1

16

SHELL2

17

FIX1

18

FIX2

19

G+

20

G-

21

Y-

22

Y+

U35

HY911130A

C195

C0603

104-1KV

R640

270

R186

270

1

XIN

2

GND

3

XOUT

4

GND

X1

25M_20pF_10PPM

R91

0R

R103

DNP

2V5_RGMII

DVDDL_RGMII

DVDDL_RGMII

ETH_3V3

ETH_3V3

NVCC_RGMII

2V5_RGMII

ETH_VDDIO_REG

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

VGEN6_3V3

ETH_3V3

GND

VGEN1_1V5

ETH_3V3

ETH_3V3

ETH_VDDIO_REG

ETH_3V3

RGMII_RXCLK

RGMII_TXCLK

RGMII_TXD0

RGMII_TXD1

RGMII_TXD2

RGMII_TXD3

RGMII_TXEN

RGMII_RXD0

RGMII_RXD1

RGMII_RXD2

RGMII_RXD3

RGMII_RXDV

RGMII_INT

ENET_REF_CLK

RGMII_NRST

RGMII_MDC

RGMII_MDIO

ETH_WOL_INT

PHY_XTLO

ETH_SD

PHY_RX_CLK

ETH_AVDDL

RGMII_TRXN0

ETH_RBIAS

ETH_LX

PHY_CLKO

RGMII_TRXP0

RGMII_LED_1000

ETH_AVDD33

RGMII_RXD1

RGMII_TRXP3

RGMII_TRXN2

RGMII_RXD0

PHY_RST

RGMII_TRXP2

RGMII_LED_10_100

RGMII_TRXN1

TP25

RGMII_TRXP1

RGMII_LED_ACT

PHY_XTLI

RGMII_TRXN3

LE

D_

10

00

_O

PHY_RX_CLK

RGMII_LED_1000

RGMII_LED_1000

RGMII_RXD2

RGMII_LED_ACT

RGMII_RXDV

RGMII_RXD3

GND

CHASIS-GND

CHASIS-GND

CHASIS-GND

TRM-CTR

RGMII_TRXP0

RGMII_TRXN0

RGMII_TRXN1

RGMII_TRXP2

RGMII_TRXN2

RGMII_TRXN3

RGMII_TRXP3

RGMII_TRXP1

RGMII_LED_10_100

RGMII_LED_ACT

___

___


D

X


JTAG, DEBUG


C3

13

19

PUBI:

FIUO:

FCP:


Page Title:

of

Sheet

Date:

Rev

Document Number

Size

Drawing Title:

Library Revision - A

{5V logic level}

{5V logic level}

DEBUG UART TO USB CONVERSION

{VCCIO 1.8V-5.25V}

{VCC 4.0V-5.25V}

GPIOs

200K PU to VCCIO

Vin Switch pt - 1.0 to 1.5V

for all Vccs

Level-Shifter to

insure no IO backfeed

Drivers located at:

http://www.ftdichip.com/Products/ICs/FT232R.htm

{50mOhms DC @2A}

USB Device Only

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

3

3

2

1

L24

120OHM

R694

10.0K

R711

4.7K

C127

10V

0.22UF

4

GN

D1

24

AG

ND

3

RI#

7

DCD#

6

DSR#

31

DTR#

16

3V3OUT

1

VCCIO

27

OSCI

18

RESET#

23

NC6

28

OSCO

9

CBUS4

11

CBUS3

21

CBUS1

22

CBUS0

10

CBUS2

29

NC5

25

NC4

13

NC3

12

NC2

5

NC1

14

USBDP

15

USBDM

19

VCC

20

GN

D4

17

GN

D2

26

TE

ST

8

CTS#

32

RTS#

2

RXD

30

TXD

33

EP

U22

FT232RQ

R206

1K

R207

1K

C768

10V

4.7uF

C125

10V

0.22UF

C767

6.3V

0.22UF

C126

6.3V

0.22UF

6

1Y

4

GND

3

2Y

2

1A

1

1OE

8

VCC

7

2OE

5

2A

U519

SN74LVC2G126

3

1

2

Q2

2N7002

R8

10.0K

1

2

3

J2

DIP_2.54_CONN_3P

ES

D1

ES

DP

SA

04

02

V0

5

ES

D2

ES

DP

SA

04

02

V0

5

R116

10.0K

3

1

2

Q3

2N7002

R117

10.0K

R130

10.0K

1

VB

US

2

D-

3

D+

4

ID

5

8

GND

7

GND

9

GND

6

GND

J10

USB_CONN_5P

D1

D5

GND

GND

GND

GND

GND

GND

GND

GEN_1V8

GEN_1V8

UART1_TX

UART1_RX

DBUG_USB_DP

DBUG_VBUS

DBUG_RST

RXD232

DBG_TXLED

DBG_RXLED

DBUG_5V

DBUG_5V

DBUG_5V

DBUG_5V

TXD233

USB_SUSPEND_B

DBUG_USB_DM

DBG_OUT_3V3

UART1_RX

GEN_1V8

UART-RX

UART-RX

UART-TX

GEN_3V3

UART1_TX

GEN_1V8

UART-TX

GEN_3V3

___

___


D

19

14

C3


AUX SDIO CONN, CAN


X

PUBI:

FIUO:

FCP:


Page Title:

of

Sheet

Date:

Rev

Document Number

Size

Drawing Title:

AUX SDIO CARD SOCKET

Layout:

50ohm, SD signals(SD_DATAx, SD_CMD, SD_CLK) length equal

NOTE:

The AUX SDIO CARD SOCKET and the

BLUETOOTH CABLE CONNECTOR

have been designed and tested

specifically for use with the WIFI/BT

combo card SX-SDCAN-2830BT

Developed and sold by

Silex Technolgy. The developer

may need to consult the datasheet

of other WIFI solutions for compatibility

with this card socket.

NOTE:

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

3

3

3

3

3

3

3

3

R503

10.0K

R544

10.0K

R549

DNP

10.0K

C5

16V

0.1UF

C6

6.3V

10UF

9

SW

7

D0

8

D1

1

D2

2

D3/CD

3

CMD

5

CLK

4

VCC

15

NC

14

NC

13

GND

12

GND

11

GND

10

GND

6

GND

J7

MICOR-SD

R80

0R

R81

0R

R82

0R

R84

0R

R86

0R

R88

0R

R90

0R

SD2_3V3

GND

SD2_DATA0

SD2_DATA1

SD2_DATA2

SD2_DATA3

SD2_CLK

SD2_CMD

SD2_CD_B

GEN_3V3

GND

SD2_CD_B

SD2_DATA0

SD2_DATA1

SD2_DATA2

SD2_DATA3

SD2_CMD

SD2_CLK

___

___


D

19

15

C3


BATTERY CHARGER


X

PUBI:

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Drawing Title:

External

Power

5 Vdc

Note: Populate either

Option #1 for the Smart Device Board, or

Option #2 for the Smart Device Platform

NOTE:

R728 is provided for testing a means to suspend battery charging so that an acurate voltage reading

can be taken during the battery charge cycle. It has not yet been tested. When populating R728, R134

should be depopulated. See the Freescale HW User Guide for the Smart Device board

for details (to be published 4Q12).

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

3

3

9

1

2

J501

DNP

HDR 1X2 TH

D13

SS24

C7

0.1uF

C11

10uF

C12

1nF

C16

10

UF

/10

V

1

2

D1

4

SS

24

C80

1nF

D15

SS24

1

2

FB

1

PD

Z5

.6/1

W

CT

10

10

0uF

/6.3

V

C81

10uF

C82

0.1uF

C106

10pF

D16

SS24

D17

SS24

NC

4

5

6

1

2

3

J1

DC-030

DC-030

GND

5V_IN

SYS_4V2

GND

5V_IN

___

___


D

X


PF0100 PMIC


C3

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Drawing Title:

PMIC Powered-ON

LED indicator

PMIC LDO Outputs

PMIC Switched Outputs

PMIC Control

VDDOTP -

Connect TP14 to 8 volts to

program PMIC OTP fuses

SW1A

SW1B

SW1C

SW2

SW3A

SW3B

POWER

OPTIONAL:

PMIC Power On Circuit

Note:

To turn off board "AUTO ON" feature, depopulate

R30 and R31, and populate U509. This feature has not

yet been tested. See the Freescale HW User

Guide for the Smart

Device board for

details (to be

published 2Q13).

Note:

Bulk capacitors on VGEN1-6 are all 4.7uF

for BOM consolidation purposes. Freescale

recommended guidance for minimum

capacitance on VGEN1, VGEN3, VGEN5,

VGEN6 is 2.2uF.

Note:

PMPF0100 Pass1.0 through Pass1.2 are subject to boot issues if power is removed from the board and reapplied within ~ 2 minutes.

PMPF0100 Pass2.0 will correct this issue. For more details, see the PMPF0100 ERRATA, Issue #ER19

NOTE:

R632 is provided for testing an alternate gating source

for PMIC_5V power. The circuit has not yet been tested.

See the Freescale HW User Guide for the Smart Device

board for details (to be published 2Q13).

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

22

22

3

3

3

3

3,13

21

3

TP508

C554

10V

4.7uF

3

1

2

Q510

2N7002

C590

16V

0.1UF

C552

10V

4.7uF

C561

16V

1uF

C546

6.3V

22UF

TP506

C545

6.3V

22UF

R507

270

C553

10V

4.7uF

C596

16V

0.47uF

C566

6.3V

22UF

R632

DNP

10.0K

TP1

CONSUMER/INDUSTRIAL

5

ICTEST

1

INTB

3

RESETBMCU

54

SCL

53

SDA

2

SDWNB

4

STANDBY

51

VCOREDIG

52

VCOREREF

55

VDDIO

47

VDDOTP

56

PWRON

49

VCORE

48

GNDREF

50

VIN

U8-A

MMPF0100NPEP

C562

16V

1uF

C559

6.3V

22UF

C556

10V

2.2uF

C584

10V

2.2uF

C601

10V

DNP

10uF

1

2

L11

1uH

R22

0

TP19

C24

16V

0.1UF

C579

16V

0.1UF

R29

68K

C586

16V

1uF

C600

10V

1.0UF

C595

10V

2.2uF

1

2

L8

1UH

TP26

C565

16V

0.1UF

C576

16V

0.1UF

1

2

L2

1UH

C583

6.3V

22UF

1

3

2

Q511

IRLML6401

1

2

L9

1uH

C569

16V

0.1UF

16

VGEN1

18

VGEN2

40

VIN3

29

VHALF

17

VIN1

41

VGEN6

30

VINREFDDR

31

VREFDDR

43

VSNVS

26

VGEN3

28

VGEN4

27

VIN2

42

LICELL

39

VGEN5

U8-B

MMPF0100NPEP

C594

16V

0.22UF

TP14

2

3

1

D4

BAT54CLT1

TP13

DUAL FET

FDC6321C

N

P

3

G2

6

D1

1

G1

2

S2

4

D2

5

S1

U509

DNP

FDC6321C_NL

C571

6.3V

22UF

1

2

L3

1UH

R28

68K

C560

6.3V

22UF

C564

16V

0.1UF

C592

10V

1.0UF

R591

10.0K

C567

6.3V

22UF

R592

10.0K

C550

10V

4.7uF

C570

10V

1.0UF

R33

DNP

100.0K

R589

10.0K

C577

6.3V

22UF

C575

16V

0.1UF

C580

10V

4.7uF

R572

200K

C578

10V

4.7uF

1

2

3

4

SW1

EVQPUA02K

C582

16V

0.1UF

C572

10V

4.7uF

C563

16V

0.1UF

R31

10.0K

A

C

D2

LE

D_

OR

AN

GE

R571

200K

C544

6.3V

22UF

C551

10V

4.7uF

C581

6.3V

22UF

C573

10V

4.7uF

C593

16V

0.1UF

C589

10V

10uF

1

2

C31

10V

47uF

C591

6.3V

22UF

12

SW1CIN

14

SW1VSSSNS

23

SW2IN_1

38

SW3AFB

37

SW3AIN

36

SW3ALX

33

SW3BFB

34

SW3BIN

35

SW3BLX

32

SW3VSSSNS

19

SW4FB

20

SW4IN

44

SWBSTFB

45

SWBSTIN

46

SWBSTLX

7

SW1AIN

8

SW1ALX

10

SW1BIN

9

SW1BLX

13

SW1CFB

11

SW1CLX

6

SW1FB

25

SW2FB

22

SW2LX

21

SW4LX

57

EP

GN

D

15

GN

DR

EF

1

24

SW2IN_2

U8-C

MMPF0100NPEP

TP500

R30

1K

C574

6.3V

22UF

-

+

1

3

2

BT500

BK414

C568

10V

4.7uF

1

2

L12

2.2uH

A

C

D9

MBR140SFT

C599

10V

1.0UF

C555

6.3V

22UF

R21

68K

GND

GND

GND

GND

GND

GND

GND

VGEN5_2V8

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

PMIC_VSNVS

GND

VCOREDIG

GND

VGEN2_1V5

GEN_1V8

VGEN5_2V8

VGEN6_3V3

DDR_VREF

DDR_1V5

GND

VCOREDIG

GND

GND

GEN_3V3

GND

DDR_1V5

AUX_3V15

P3V3_LICELL

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

GND

SYS_4V2

SYS_4V2

SYS_4V2

SYS_4V2

SYS_4V2

SYS_4V2

SYS_4V2

SYS_4V2

SYS_4V2

VSNVS_3V0

SYS_4V2

SYS_4V2

VDDCORE

VDDSOC

PMIC_5V

GND

P3V3_LICELL

GEN_3V3

VGEN1_1V5

VGEN3_2V5

GND

GND

AUX_3V15

GEN_3V3

GEN_3V3

VSNVS_3V0

GND

GND

GND

GND

VDDSOC

AUX_3V15

PMIC_SDA

PMIC_SCL

PMIC_STBY_REQ

PMIC_ON_REQ

PMIC_INT_B

PWR_BTN_SNS

POR_B

PWRON

MX6_ONOFF

SWBST_SUP

SDWNB

VDDCORE

SWBST_PWR_EN

PMIC_VCOREREF

GEN_3V3

PMIC_VHALF

PMIC_LED_ON

PMIC_VCORE

CP

UP

WR

ON

AUX_3V15

ONFET_CTL

SWBSTLX

SW3LX

PWRON

SW1LX

PMIC_5V

SW1CLX

PMIC_ON_REQ

DDR_1V5

SW

BS

T_

SW

SW4LX

PMIC_VDDOTP

SW2LX

PWRON

GEN_3V3

___

___


D

X


AUX VOLT REG


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Drawing Title:

(R2)

(R1)

Optional LDO

U9 is no longer required for PF0100 VSNVS issue, but may be desired for NVCC_PLL_VOUT.

It is being left in a depopulated condition. If the LDO is needed, R34 and R35 should be populated as follows:

For VSNVS (3.0V): R34 = 47K, R35 = 309K

For NVCC_PLL_OUT (1.1V): R34 = 47K, R35 = 82.5K

3.0V@ 300mA max

Vout =

0.4x(1+R2/R1)

NOTE FOR VDDHIGH_IN LOADING ON VGEN5:

VDDHIGH was placed on VGEN5 early in the design as a

compromise solution for a board designed primarily for

software development. Validation of the i.MX6 processor

has shown that operations at elevated temperatures may

cause VDDHIGH_IN to require much more current than

VGEN5 can supply. It is recommended for robust designs

potentially operating at more extreme temperatures for

VDDHIGH to be supplied from a power rail that can supply

250 mA or more.

This allows for datasheet maximum of 125 mA for internal

VDDHIGH_IN loads plus 125 mA for external PHY IO loads.

The optional LDO U9 shown on this page could be

reconfigured to supply both VDDHIGH_IN and VDD_SNVS_IN

loads to meet the additional current requirments

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

R35

DNP

1%

309K

C32

DNP

10V

10uF

R208

DNP

0

C33

DNP

10V

10uF

1

BIAS

7

GND

2

GND

3

IN

4

OUT

5

ADJ

6

SHDN

U9

DNP

LTC3025

R32

DNP

0

R34

DNP

5%

47K

R65

0

R66

DNP

0

GND

GND

GND

GND

SYS_4V2

VSNVS_3V0

PMIC_VSNVS

NVCC_PLL_OUT

LDO_REG_IN

LDO_REG_FB

LDO_REG_OUT

___

___


D

X


BOOT SELECT


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Drawing Title:

U/I KEY

VOL-DN

VOL-UP

Boot Configuration Select

BOOT MODES:

00 Boot from fuses

01 Serial downloader

10 Boot from board settings

11 Reserved

Boot Select Table

RESET

NOTE:

On Rev B4 and later designs, the RESET button is

connected directly to the PWRON input of the PMIC.

This will cause a complete board reset (Processor &

PMIC) when the RESET button is pressed.

NOTE:

Place series resistors so as to minimize EIM portion of

trace length. Two layout possibilites include:

1) As close to processor as possbile.

2) Close to other componets using EIM signals.

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

3

3

3

3

3

3

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3,9

3

3,9

3,9

3,9

3,9

3,9

3,9

3

3,9

3,9

3,9

3,9

3,9

3

19,21

19,21

3

3

R713

DNP

0

R682

4.7K

1

2

3

4

5

6

7

8

9

10

RN503

10K

R698

4.7K

R686

4.7K

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

SW6

SW

DIP

-8

R687

4.7K

R697

4.7K

R695

4.7K

R714

DNP

0

1

2

3

4

SW4

EVQPUA02K

R693

4.7K

R689

4.7K

R716

DNP

0

1

2

3

4

SW5

EVQPUA02K

R709

4.7K

R108

DNP

10.0K

R696

4.7K

1

2

3

4

5

6

7

8

9

10

RN502

10K

C597

16V

0.1UF

2

3

1

Q501

MMBT3904LT1G

R715

DNP

0

R703

4.7K

R690

4.7K

R105

DNP

10.0K

R683

4.7K

R523

1.0K

R708

4.7K

R710

4.7K

R717

DNP

0

R701

4.7K

R98

DNP

10.0K

R705

4.7K

R702

4.7K

R688

4.7K

GND

VCC

1

2

3

4

5

U507

NC7SP125P5X

R680

4.7K

R718

DNP

0

R706

4.7K

R97

4.7K

R678

4.7K

R304

DNP

10.0K

R704

4.7K

R719

DNP

0

R305

470

R691

4.7K

R19

10.0K

R707

4.7K

R681

4.7K

R106

4.7K

R94

DNP

10.0K

A

C

D3

LE

D_

OR

AN

GE

R692

4.7K

R700

4.7K

C504

16V

2.2uF

1

2

3

4

5

6

7

8

9

10

RN501

10K

R712

DNP

0

R679

4.7K

R684

4.7K

R95

4.7K

1

2

3

4

5

6

7

8

9

10

RN500

10K

R685

4.7K

R109

DNP

0

R699

4.7K

1

2

3

4

SW7

EVQPUA02K

1

2

3

4

SW8

EVQPUA02K

1

2

3

4

SW2

EVQPUA02K

R509

470

R506

470

A

C

D8

LE

D_

OR

AN

GE

A

C

D7

LE

D_

OR

AN

GE

2

3

1

Q1

MMBT3904LT1G

R67

1.0K

2

3

1

Q4

MMBT3904LT1G

R68

1.0K

GND

GND

GEN_3V3

GND

GND

GND

GEN_3V3

GND

VSNVS_3V0

VSNVS_3V0

GEN_3V3

GND

KEY_MEUN

KEY_BACK

USR_DEF_RED_LED

WDOG_B

BOOT_MODE0

BOOT_MODE1

TAMPER

TEST_MODE

EIM_A16

EIM_A17

EIM_A18

EIM_A19

EIM_A20

EIM_A21

EIM_A22

EIM_A23

EIM_A24

EIM_DA0

EIM_DA1

EIM_DA2

EIM_DA3

EIM_DA4

EIM_DA5

EIM_DA6

EIM_DA7

EIM_DA8

EIM_DA9

EIM_DA10

EIM_DA11

EIM_DA12

EIM_DA13

EIM_DA14

EIM_DA15

EIM_WAIT

EIM_LBA

EIM_EB0

EIM_EB1

EIM_RW

EIM_EB2

EIM_EB3

PWRON

PWRON

BT_CFG2_1

BT_CFG1_6

BT_CFG1_1

BT_CFG4_4

BT_CFG4_3

BT_CFG1_0

BT_CFG3_2

BT_CFG4_2

BT_CFG4_1

BT_CFG2_4

BT_CFG3_6

BT_CFG3_1

BT_CFG1_2

BT_CFG1_3

BT_CFG3_5

CH

G_

NW

_L

ED

_A

BT_CFG4_7

CH

G_

NW

_L

ED

_B

BT_CFG3_4

WDOG_BUF

BT_CFG4_6

BT_CFG3_3

BT_CFG4_5

BT_CFG2_3

BT_CFG2_0

BT_CFG3_0

BT_CFG2_2

BT_CFG1_7

BT_CFG1_5

BT_CFG2_7

BT_CFG3_7

BT_CFG2_5

BT_CFG4_0

BT_CFG2_6

BT_CFG1_4

GND

KEY_HOME

GND

KEY_UBOOT

GEN_3V3

GND

EIM_D17

GND

EIM_D20

___

___


D

19

19

C3


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Drawing Title:

I2C1

I2C2

I2C3

CSPI1

NOTE:

On all three pad resistor options, resistors are to be initially

populated on pads 1 - 2 (Option A). Users may move resistors

from their default locations as needed.

NOTE:

R183 and R189 were changed to bring I2C rise time from

LOW >> HIGH within electric specification. If using a

CODEC other than the one used in this design, it may

be possbile to switch pull up resistors back to 4.7K.

A

B

C

D

5

4

3

2

1

D

C

B

A

1

2

3

4

5

3

3

8

8

3

3

3

3

7

7

7

7

7

7

3,7

3,7

9

10

10

9

9

14

3

3

3

5,15

5,15

5,15

5,15

3

19

19

8

8

R154

0

R11

0

R153

0

R182

0

R12

0

R181

0

R39

0

R169

4.7K

R550

0

R170

4.7K

R178

4.7K

R189

2.37K

R622

0

R179

4.7K

R306

0

R183

2.37K

R621

0

R53

0

R17

0

R173

0

R175

0

R187

0

R40

0

R41

0

R42

0

R44

0

R1

0

R2

0

GEN_3V3

GEN_3V3

GEN_1V8

GEN_1V8

GEN_3V3

GEN_3V3

I2C1_SCL

I2C1_SDA

CSI0_SCL

CSI0_SDA

I2C2_SCL

I2C2_SDA

I2C3_SDA

I2C3_SCL

LVDS0_EDID_SCL

LVDS0_EDID_SDA

LVDS0_TOUCH_SCL

LVDS0_TOUCH_SDA

HDMI_DDC_CLK_IN

HDMI_DDC_DAT_IN

CODEC_I2C_CLK

CODEC_I2C_DAT

TS_SCL

TS_SDA

CSPI1_MOSI

CSPI1_CLK

CSPI1_CS0

SPINOR_MISO

SPINOR_CLK

SPINOR_MOSI

SPINOR_CS0

CSPI1_MISO

PMIC_SCL

PMIC_SDA

CSI2_SDA

CSI2_SCL

TS1_SDA

TS1_SCL

Documents

Rev. Code i.MX6 SMART DEVICE SYSTEM