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DJM3063 DIGITAL SYSTEM

SR FLIP-FLOP REPORT

NAME : MUHAMAD DINIY B. HJ MOHAMAD

KAMAL(16DEM14F106!

MOHAMAD ASYRAF B. MANSOR

(16DEM14F10"0!

MOHAMAD SYAMIM B. HASSAN

(16DEM14F10#4!

MASS AMMINUDDIN B. MASS ARIFFIN

(16DEM14F10$4!

1.0 E%PERIMENT OUT&OMES


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At the end of the lab session we should be able:

- to connect the NOR gate SR Flip-Flop and NAND gate SR flip-

flop circuit.

- to observe the characteristic of NOR gate SR flip-flop and NAND

gate SR flip-flop.

#.0 THEORY


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There are three distinct fors of ultivibrator used in digital

electronics:-

!. "istable#. $onostable

%. Astable

The ost basic can be constructed fro two NAND gates or two NOR

gates. The output of the NOR gate flip-flop and the NAND gate flip-flop

will change if there are an input. This circuit is also &nown as

as'nchronous flip-flops which operate independentl' of the s'nchronous

inputs and cloc& input. The output of the latch can be divided into fourstages( which are hold( set( reset and invalid.

S and R inputs of the SR flip-flop with cloc& signal are called

s'nchronous inputs because data on these inputs are transferred to the

flip-flop output onl' on the triggering edge of the cloc& pulse. The

outputs of flip-flop change depend on positive trigger )*+T, or negative

trigger )N+T,.

3.0 APPARATUS'EUIPMENTS


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! Digital Trainer D %%

# /0 12 and 12#

% 3ire connector

4.0 SAFETY PRE&AUTIONS


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! Do not wor& alone while wor&ing with high voltages or on

energi4ed electrical e5uipent or electricall' operated achiner'.

# *ower ust be switched off whenever an e6perient or pro7ect isbeing assebled( disassebled( or odified.

% /f a person coes in contact with a high voltage( iediatel' shuf

off power. Do not attept to reove a person in contact with a high

voltage unless 'ou are insulated fro the. /f the victi is not

breathing( appl' 0*R iediatel' continuing until he8she is revived(

and dial eergenc' nubers for assistance.

2 Running or practical 7o&es ust not occur in the laborator'.

9 Read aterials related to e6perient before hand and a&e sure

that apparatus to be used are in good condition. See& help fro

technicians or the lab deonstrator in charge should an' proble arises.

$.0 E%PERIMENTS


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A. NOR gate SR flip-flop )/0 12#,

PRO&EDURE:

! 0onnect the circuit as shown in Figure !.!

# S and R inputs are connected to the ! bit binar' switches );D,

while < and


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PRO&EDURE:

! 0onnect the circuit as shown in Figure !.#

# S and R inputs are connected to the bit ! binar' switches );D,

while < and


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R)*+,* (A! :


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Truth Table of NOR gate SR flip-flop

/nitial 0ondition /nputs Outputs

/ S R /

0 0 !

! 1 0 !

! 0 0 !

! 0 1 !

! 0 0 !

! 1 0 !

! 1 1 1 0 !

! 0 0 !

! 0 1 !

! 1 1

0 1 !

! 0 0 !

T,) 1


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RESULTS (B! :


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Truth Table of NAND gate SR flip-flop

/nitial 0ondition /nputs Outputs

/ S R /

1 1 !

! 1 0 !

! 1 1 !

! 0 1 ! !

! ! 1 1 !

! 1 0 ! !

! ! 0 0 ! !! ! 1 0 ! !

! ! 1 1 !

! 0 1 ! !

! ! 0 0 ! !

! ! 0 1 !

! 1 1 !

T,) #

".0 DIS&USSION


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I. B+2, ) *5 5+ ,) 75 NOR 8) SR ,29-,79 NAND 8) SR ,29-

,79.

NOR G) SR ,29-,79

S R /

! !

!

! !

!

! !

NAND G) SR ,29-,79

S R /

! !

! ! !

! !

! ! !

! !

II. R))5 7 +)*27 1;


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I>. E?9,2 ) 79)527 SR ,29-,79.

The SR flip-flop( also &nown as a SR Latch( can be considered as one of the ost basic

se5uential logic circuit possible. This siple flip-flop is basicall' a one-bit eor' bistabledevice that has two inputs( one which will >S;T? the device )eaning the output @ >!?,( and is

labelled S and another which will >R;S;T? the device )eaning the output @ >?,( labelled R.

Then the SR description stands for >Set-Reset?. The reset input resets the flip-flop bac& to itsoriginal state with an output < that will be either at a logic level >!? or logic >? depending upon

this set8reset condition.A basic NAND gate SR flip-flop circuit provides feedbac& fro both of its outputs bac& to its

opposing inputs and is coonl' used in eor' circuits to store a single data bit. Then the SRflip-flop actuall' has three inputs( Set( Reset and its current output < relating to its current state

or histor'. The ter >Flip-flop? relates to the actual operation of the device( as it can be >flipped?

into one logic Set state or >flopped? bac& into the opposing logic Reset state.

.0 &ON&LUSION AND RE&OMMENDATION


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/n conclusion( a flip flop is a se5uential digital electronic circuit. /t is the basic

eor' unit in digital electronics. /t needs a rising cloc& edge or a falling cloc&

edge to trigger an output- an output that is based on the input which is applied

during the cloc& activit'. The logical conclusion would be according to the inputapplied. There wouldn=t be an' change in the output as long as the input reains

unchanged )and the cloc& doesn=t transition,. The change in the output would be

possible onl' if the input changes and there is a cloc& transition.

@.0 REFEREN&ES


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