Islamic University – Gaza Engineering Faculty

Department of Computer Engineering

ECOM 4011: VHDL Discussion

CH# 11

REGISTER TRANSFER

METHODOLOGY

Eng. Ahmed K. Aldali January,2015

Problem 11.5

pseudo algorithm

ASMD chart

Conceptual diagram:

Question 5 .. Part d

VHDL Code

Simulation

Analysis

The results were as expected; 4/2 = 2.0

TestBench

Question 5 .. Part e

VHDL code

Simulation

Analysis

The results were as expected; 10/3 = 3.33

Remander = 0.333 * 3 = 1

TestBench