February 2016 411527-3342/16©2016IEEE

Raymond Pengelly (raypengelly@gmail.com) is with Prism Consulting NC, Hillsborough, North Carolina, United States. Christian Fager (christian.fager@chalmers.se ) and Mustafa Özen (mustafa.ozen@chalmers.se) are with Chalmers University

of Technology, Gothenburg, Sweden.

Doherty’s Legacy

illiam H. Doherty was an American electrical engineer, best known for his invention of the Doherty amplifier. Born

in Cambridge, Massachusetts, in 1907, Doherty attended Harvard University, where he received his bachelor’s degree

in communication engineering (1927) and his master’s degree in engineering (1928). He then joined the American Telegraph and Telephone Company Long Lines Department in Boston. He remained there for a few

Raymond Pengelly, Christian Fager, and Mustafa Özen

Digital Object Identifier 10.1109/MMM.2015.2498081Date of publication: 14 January 2016

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months before joining the National Bureau of Standards, where he researched radio phenomena. Doherty joined Bell Telephone Laboratories (now Bell Labs) in 1929 and, while there, worked on the development of high power radio transmitters that were used for transoceanic radio telephones and broadcasting.

The Doherty Approach and Its EvolutionDoherty invented his unique amplifier approach in 1936. (“Doherty’s Invention in His Own Words” reproduces an excerpt from the original description of the device published by Bell Laboratories as “A New High-Efficiency Power Amplifier for Modulated Waves.”) This device, which greatly improved the effi-ciency of RF power amplifiers (PAs), was first used in a 500-kW transmitter that the Western Electric Com-pany designed for WHAS, a radio station in Louisville, Kentucky. Western Electric went on to incorporate Doherty amplifiers into at least 35 commercial radio stations worldwide by 1940 and into many other sta-tions, particularly in Europe and the Middle East, in the 1950s [1].

The Doherty amplifier is a modified class-B RF am-plifier. In Doherty’s day, within the Western Electric product line, this namesake electronic device was oper-ated as a linear amplifier with a driver that was modu-lated. In the 50-kW implementation, the driver was a complete 5-kW transmitter that could, if necessary, be operated independently of the Doherty amplifier; the Doherty amplifier was used to raise the 5-kW level to the required 50-kW level.

The amplifier was usually configured as a grounded-cathode, carrier-peak amplifier using two vacuum tubes in parallel connection, one as a class-B carrier tube and the other as a class-B peak tube (i.e., power transistors, in modern implementations). The tubes’ source (driver) and load (antenna) were split and combined through + and - 90° phase shifting networks. Alternate con-figurations included a grounded-grid carrier tube and a grounded-cathode peak tube, whereby the driver power was effectively passed through the carrier tube and was added to the resulting output power—but this benefit was more appropriate for the earlier and less efficient triode implementations rather than the later and more efficient tetrode implementations.

As a successor to its Western Electric application for radio broadcast transmitters, the Doherty concept was considerably refined by Continental Electronics Manufacturing Company of Dallas, Texas. Early Con-

tinental Electronics designs, by JamesWeldon and oth-ers [2], retained most of the characteristics of Doherty’s amplifier but added medium-level screen-grid modu-lation of the driver. The ultimate refinement was the high-level screen-grid modulation scheme invented by Joseph Sainton [3]. Sainton’s transmitter consisted of a class-C carrier tube in a parallel connection with a class-C peak tube.

The tubes’ source (driver) and load (antenna) were split and combined through + and - 90° phase-shifting networks, as in a Doherty amplifier. The unmodulated RF carrier was applied to the control grids of both tubes. Carrier modulation was applied to the screen grids of both tubes, but the screen grid bias points of the car-rier and peak tubes were different and were established such that 1) the peak tube was cut off when modula-tion was absent and the amplifier was producing rated unmodulated carrier power and 2) both tubes were conducting and each tube was contributing twice the rated carrier power during 100% modulation (because four times the rated carrier power is required to achieve 100% modulation). As both tubes were operated in class-C, a significant improvement in efficiency was achieved in the final stage. In addition, because the tetrode car-rier and peak tubes required very little drive power, a significant improvement in efficiency within the driver was achieved as well.

The commercial version of the Sainton amplifier employed a cathode-follower modulator, not the push-pull modulator disclosed in the patent, and the entire 50-kW transmitter was implemented using only nine total tubes of four tube types, all of these being general-purpose—a remarkable achievement, given that the transmitter’s most significant competitor, from RCA, was implemented using 32 total tubes of nine tube types, nearly one-half of these being special-purpose.

The approach was not only used by such lead-ing companies as Continental but also Marconi [3], with functional installations up to the late 1970s. The Institute of Radio Engineers [4] recognized Doherty’s important contribution to the development of more efficient RF PAs with the 1937 Morris N. Liebmann Memorial Award [5].

The Basic ArchitectureFigure 1 shows the basic Doherty PA (DPA) architec-ture. Extensive descriptions of DPAs have been given by Cripps [6], so this article includes only a basic expla-nation. The Doherty block diagram (Figure 1) is nota-ble for its elegance and simplicity and is specifically associated with modern solid-state transistor designs.

What may not be apparent is that details of the design can result in large differences in performance. Operation is strongly influenced by the coupling factor of the input divider/coupler and by the bias-ing of the carrier and peaking amplifier stages. The “turn-on” of the peaking amplifier is dependent on

In Doherty’s day, within the Western Electric product line, this “namesake” electronic device was operated as a linear amplifier with a driver that was modulated.

February 2016 43

both input power level and gate bias voltage, which in turn sets the low-power efficiency and peak-power capability of the configuration. The peaking ampli-fier allows the Doherty amplifier to respond to the

high input levels of short duration by amplifying the signal peaks and dynamically changing the loading on the main amplifier. The specific class of operation (class-A/B, class-B, class-C, class-F, inverse class-F,

“A new form of linear power amplifier has been developed which removes the limitation of low efficiency inherent in the conventional circuit, permitting efficiencies of 60 to 65 per cent to be realized, while retaining the principal advantages associated with low-level modulation systems and linear amplifiers, namely, the absence of any high-power audio equipment, the ease of adding linear amplifiers to existing equipment to increase its power output, and the adaptability of such systems to types of transmission other than the carrier-and-double-side-band transmission most common at present.

“Under these conditions the plate efficiency is proportional to the amplitude of the radio-frequency plate voltage. It is possible to obtain large outputs from tubes with radio-frequency plate voltage amplitudes of 0.85 to 0.9 of the applied d-c potential, i.e., with the plate voltage swinging down to a minimum value as low as 10 to 15 per cent of the d-c potential. The corresponding plate efficiency for the tube and its tuned circuit is approximately 67 per cent. This condition, however, prevails only at the peak output of the amplifier, and since the amplitude of the plate voltage wave, in a transmitter capable of 100 per cent modulation, is only half as great for the unmodulated condition as for the peaks of modulation, the efficiency with zero modulation in the conventional amplifier does not exceed half this peak value, or about 33 per cent.

“In order to improve this situation it is necessary to devise a system in which the amplitude of the alternating plate voltage wave is high for the unmodulated condition, and in which the increased output required for the positive swings of modulation is obtained in some other manner than by an increase in this voltage.

“A simple and fundamental means is available for achieving this result. One embodiment of the scheme is illustrated in [Figure S1]. Each of the two tubes shown in this figure is designed to deliver a peak power of /E R2 watts into an impedance of R ohms. The total peak output of the two tubes being /E R2 2 watts, the tubes are suitable for use in an amplifier whose carrier output is one-fourth of this value, or

/E R22 watts. If the tubes were to be connected in parallel in a conventional amplifier circuit the load impedance used would be /R 2 ohms, and each tube would work effectively into R ohms by virtue of the

presence of the other tube. The same load impedance /R 2 is used in the new circuit, but between the load

and one of the tubes (Tube 1) there is interposed a network which simulates a quarter-wave transmission line at the frequency at which the amplifier is operated.

“It is a well-known property of quarter-wave transmission lines and their equivalent networks that their input impedance is inversely proportional to the terminating impedance. The network of [Figure S1], in particular, presents to Tube 1 an impedance of R ohms when its effective terminating impedance is also R ohms, that is, when half of the power in the load is being furnished by Tube 2; but should Tube 2 be removed from the circuit, or prevented from contributing to the output, the terminating impedance of the network would be reduced to /R 2 ohms, with a consequent increase in the impedance presented to Tube 1 from R to 2R ohms. Under this condition Tube 1 could deliver the carrier power /E R22 at its maximum alternating plate voltage E and consequently at high efficiency.”

Doherty’s Invention in His Own Words

Figure S1. Form of high-efficiency circuit.

Tube 1 Tube 2

- j R - j R

j R

R2

44 February 2016

etc.) of each amplifier is also important. The two basic considerations for each stage are the bias conditions (biased on, or pinched off, and to what degree) and the fundamental and harmonic impedance terminations presented to the transistors.

Early DPAsAlthough it was invented in 1936, the first U.S. patent [7] for the DPA was not granted until 1940. The original application for the new high-efficiency configuration was for high-power amplitude-modulated (AM) radio transmitters. By adopting the Doherty architecture dc-to-RF conversion efficiencies were increased by a fac-tor of two to over 60% [8]. The DPA soon became a de facto standard for AM transmitters adopted by Western Electric, Continental, Marconi, and RCA (Figures  2 and 3). In subsequent years, DPAs continued to be used in a number of medium- and high-power, low-fre-quency (LF) and medium-frequency (MF) vacuum-tube AM transmitters [2], [9].

In late 1953, a 1-MW vacuum-tube transmitter oper-ating in the long-wave band began regular operation in Europe where the outputs of the two 500-kW DPAs were joined in a bridge-type combiner. The DPAs had also been considered for use in solid-state MF and high-frequency (HF) systems, as well as in high-power ultrahigh-frequency (UHF) transmitters [10], [11]. The practical implementation of a classical triode-based Doherty scheme was restricted by its substantial non-

linearity for both linear amplification of AM signals and grid-type signal modulation, which required com-plicated envelope correction and feedback linearization circuits.

At the same time, the DPAs employing tetrode trans-mitting tubes could improve their overall performance when the modulation was applied to the screen grids of both the carrier and peaking tubes, while the control grids of both tubes were fed by an essentially constant level of RF excitation [12]. This resulted in the peaking tube being modulated upwards during the positive half of the modulating cycle and the carrier tube being modulated downwards during the negative half of the modulating cycle.

Table 1 summarizes the significant AM transmitters built around the Doherty concept between 1936 and 1979. Some tube-based AM transmitters are still in use today. The DPA still remains in use in very high-power AM transmitters; for lower-power AM transmitters, how-ever, vacuum-tube amplifiers were eclipsed in the 1980s by solid-state PAs due to the advantages they offered of smaller size and cost, lower operating voltages, higher

Figure 1. The basic Doherty amplifier configuration.

Peaking Amplifier(Class C)

HybridCoupler

0°

90°

Input

Output

Carrier Amplifier(Class-A/B)

90° PhaseShift

MatchingSection

Figure 2. The 1938 50-kW Doherty AM transmitter at WHAS in Kentucky.

Figure 3. A 1978 150-kW Doherty AM transmitter at the BBC in the United Kingdom.

TabLe 1. Doherty-based aM transmitters 1937–1979.

Installation Year Frequency Power Level Territory

1936–1940 AM, 30 kHz to 3 MHz

50 kW (500 kW total)

United States

1953 AM, 30 kHz to 300 kHz

500 kW (1 MW total)

Europe (Voice of America)

1956 AM, 30 kHz to 300 kHz

1 MW East Asia (Voice of America)

1978 AM, 300 kHz to 3 MHz

150 kW (5 MW total)

United Kingdom (BBC)

1979 AM, 300 kHz to 3 MHz

2 MW (16 MW total)

Middle East

February 2016 45

reliability and greater physical ruggedness, insensitiv-ity to mechanical shock and vibration, and the possibil-ity of using fully automated manufacturing processes and high levels of integration. In addition, both bipolar and field-effect transistors are generally characterized by significant nonlinearities in their transfer character-istics and intrinsic capacitances that require complex linearization schemes. Those schemes could only be implemented using analog techniques in the 1980s, lim-iting the use of DPAs.

Interest in DPAs was later revived, owing to signifi-cant progress in radio communication systems based on complex digital modulation schemes such as World-wide Interoperability for Microwave Access (WiMAX), orthogonal frequency-division multiplexing (OFDM) systems, code-division multiple access (CDMA) 2000 and wideband CDMA (W-CDMA), and long-term evolution (LTE) enhancements to the Universal Mobile Telecom-munications System wireless standard, where the sum of several constant-envelope signals creates an aggre-gate AM signal with high peak-to-average ratios (PARs). The complex digital modulation schemes used in these modern wireless communication standards require even higher levels of linearity.

Different circuit design techniques have, therefore, been proposed to improve the linearity of DPAs, such as optimal biasing of carrier and peaking cells for intermodulation cancellation and optimized uneven power splitting for proper load modulation and thus higher linearity [13], [14]. Furthermore, it has been proven that the effect of nonlinear output capacitance on the load modulation is circumvented using simple offset line structures [14]. However, complex lineariza-tion schemes are still required to meet the stringent linearity requirements of modern wireless communi-cation systems. Both digital pre-distortion and circuit design techniques have been very successfully applied

to reduce DPA distortion. Recently, DPAs of different architectures have found widespread application in cel-lular base-station transmitters operating at gigahertz frequencies.

Digital Radio and Television Broadcast TransmittersThe main motivation for high-efficiency PAs for mod-ern digital radio and television transmitters is to reduce operational costs [15]. Operational costs have always been a key issue for broadcasters, and a substantial part of these costs is due to the electricity required to run a transmission network, which can account for over 75% of the total electricity used by a broadcaster (Figure 4). Since higher efficiency PAs consume lower power and create less heat, they also provide overall reliability improvements. Further, increasing government legisla-tion is forcing energy users into action to improve their environmental (“green”) credentials. Figure 4 shows the average electricity costs in the United Kingdom (as-suming 12 pence per kWh) for 8-, 16-, 24-, and 32-kW

Figure 4. Average electricity costs in the United Kingdom for DVB transmitters as a function of PA efficiency.

32 kW

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ear

(£k)

]

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at 12 p/kWh

Figure 5. The efficiency of a Freescale LDMOSFET DVB Doherty amplifier as a function of backed-off power.

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%)

Figure 6. A 1-kW output power DVB DPA for 714–724 MHz.

Different circuit design techniques have been proposed to improve the linearity of DPAs.

46 February 2016

transmitters as a function of overall PA efficiency [15]. For example, in-creasing efficiency from 20% to 40% reduces cost per year from £170,000 to £80,000.

Significantly, both Freescale [15] and NXP [16] have demonstrated DPA reference designs configured into multikilowatt transmitters for digital video broadcast (DVB) appli-cations where overall transmitter efficiencies have been doubled using silicon laterally diffused metal-oxide-semiconductor field-effect transistors (LDMOSFETs) compared with older tube-based designs (including induc-tive-output tubes). Suppliers such as Rohde and Schwarz [17] have used such solid-state technology to pro-vide a range of VHF and UHF trans-mitters that are liquid-cooled.

Figure 5 shows the efficiency of a DPA employing Freescale LDMOS-FETs as a function of output power over 714–724 MHz. Efficiency is maintained at greater than 53% over a 3-dB back-off range. Figure 6 shows four DPAs combined in a prototype system offering over 1-kW output power with an overall improvement in efficiency by 40% compared with a conventional (non-DPA) system.

Handset TransmittersDPAs are used in many digital radio and TV transmitters as well as in cellular base-station applications but have been less popular in handset applications where envelope-track-

ing (ET) techniques have recently begun to domi-nate [18]. However, the Doherty approach was used in L-band Iridium satellite handset PAs produced by Motorola in the mid-1990s. This approach was taken as a way to conserve battery life as well as to reduce heat dissipation [19], in particular because the trans-mitted power levels from the handsets were several watts (much more than required in a land-based cel-lular system). The two-way balanced DPAs used gal-lium arsenide (GaAs) pseudomorphic high-electron mobility transistor (pHEMT) technology incorpo-rated into hybrid “chip-and-wire” circuits (Figure 7), achieving power-added efficiencies (PAEs) of 37% at output powers of approximately 2 W (approximately 5 dB backed off from peak power to achieve the required linearity).

More recently, DPAs have been employed in a number of handset applications using 0.25- and

-150

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Pin (dBm)

Pout (dBm)and

Efficiency (%)

Pout

PAE

IM5

IM3

Third- andFifth-Order IM

(dBc)Doherty Module Performance

(b)

(a)

Figure 7. (a) A two-way balanced DPA used in Motorola Iridium handsets. (b) The output power, PAE, and intermodulation (IM) products versus input power for a dual DPA.

Figure 8. A photograph depicting an InGaP/GaAs HBT MMIC DPA for 1.6–2.1 GHz handset applications.

February 2016 47

0.15-μm GaAs pHEMT processes being deployed at 17 and 20 GHz, respectively, for digital satellite systems. Monolithic-microwave integrated-circuit (MMIC) DPAs using 0.13-μm RF complementary–metal-oxide-semiconductor (CMOS) processes have been deployed at 60 GHz for wireless personal net-work transceivers. However, MMIC DPAs for 900-, 1,800-, 2,140-MHz, and higher handset applications are more difficult to design because of the need for low-cost-requiring chip-size constraints. Moreover, another important requirement with handset PAs is multimode, multiband operation, which is challeng-ing to achieve in DPA designs without using tunable components in the output and input networks [20].

The most popular processes being used are CMOS and heterojunction bipolar transistor (HBT) together with the use of lumped elements and novel circuit approaches to reduce size [21]. Novel circuit approaches used to produce small handset DPAs have been recently extended to provide solutions for LTE appli-cations across bandwidths of 1.6–2.1 GHz. The MMICs use low-Q quarter-wave transformers, lumped-element phase compensation networks on the input, and tran-sistor output capacitances into phase compensation net-works on the output. The MMICs employed an indium gallium phosphide (InGaP)/GaAs 2-μm HBT process, and off-chip bond wires were used for critical induc-tors (Figure 8) [22]. The reported gain was greater than 28 dB at an average output power of 27.5 dBm (using a 10-MHz bandwidth LTE signal with a 7.5-dB PAR). Lin-earity was measured using the error vector magnitude method at 3.8%, with an accompanying adjacent chan-nel power ratio (ACPR) of -32 dBc.

In [23], a 1.85-GHz linearity improved dual-mode InGaP/GaAs MMIC handset DPA is presented. In this Doherty design, the gate bias voltages of the PA cells and the input power splitting ratio are optimized for a low level of third-order intermodulation products. The reported ACPR was -37 dBc with related PAE of 42% using a 10-MHz LTE signal with a 7.5-dB PAR.

Cellular Infrastructure TransmittersDPAs have become the de facto standard approach for achieving high-efficiency PAs in a mix of cellular infrastructure equipment ranging from “small-cell” to “macro-cell” applications, where average transmit-ted powers are from a few watts to hundreds of watts respectively. The majority of those applications today employ silicon LDMOSFET transistors in the driver and output stages, but gallium nitride (GaN) HEMT transistors have become increasingly used for the latest base-station equipment owing to their higher gains, power densities, bandwidths, operating fre-quencies, and efficiencies [24].

One example of a DPA produced by Nokia is shown in Figure 9 which produces 60 W of average power at 2,100 MHz with an overall transmitter efficiency of

43%. It uses a pair of NXP LDMOSFETs in a symmetric configuration. It can be seen that the input matching for the peaking PA is somewhat different than for the carrier PA because they are operating at different qui-escent drain current levels. As instantaneous/video bandwidths increase, coupled with carrier aggrega-tion for next-generation cellular systems, the intrinsic narrow-band nature of conventional DPAs becomes a challenge. However, a number of techniques that can extend the bandwidth of DPAs are available, as described in the following section. These techniques are particularly relevant to lower average power archi-tectures such as “small-cells,” and it is likely that fifth-generation (5G) and later systems will employ much higher numbers of such low-power “distributed” transmitters.

Modern TrendsDPAs are far from a past or “fading” high-efficiency PA approach. The attraction of DPAs is that, even with added complexities for the previously discussed application extensions, they are well proven and reli-able approaches. Advances in solid-state technology and compact hybrid and MMIC approaches as well as recent low-cost analog and digital predistortion techniques have shown that DPAs will not disappear from the two main application areas in the near term:

Figure 9. An example of a 2.1-GHz DPA, produced by Nokia, for base-station applications with an average power of 60 W.

DPAs have become the de facto standard approach for achieving high-efficiency PAs in a mix of cellular infrastructure equipment ranging from “small-cell” to “macro-cell” applications.

48 February 2016

•A wealth of semiconductor technologies is being used (e.g., Figures S2–S5):

•RF CMOS, GaAs pHEMT, InGaP/GaAs HBT, silicon LDMOSFET, and GaN HEMT

•A range of frequencies and power levels is being covered:

•UHF to 60 GHz, hundreds of milliwatts to multi-kilowatts

•A variety of circuit techniques is being adopted:

•Classical, inverted, asymmetric; unequal power division to carrier and peaker, different sized transistors for carrier and peaker, and combinations of both

•N-way to increase backed-off (linear) power range for high efficiency

•Use of different classes of amplifiers in carrier and peaker

•Multiband (dual and triband), broadband

•Reconfigurable using switched sections or varactor tuning

Modern Trends for DPas

Figure S2. An example of a 2.11–2.14-GHz LDMOSFET asymmetric DPA from Freescale: carrier, 140 W; two peakers, 280 W; average power of 75 W at 8-dB back-off with 46% efficiency.

Figure S3. An example of a 2.5–2.7-GHz GaN HEMT asymmetric DPA from Cree: carrier, 150 W; peaker, 300 W; average power of 80 W at 8-dB back-off with 49% efficiency.

(a)

Back off Power Level (dB)

(b)

-24 -18 -12 -6 0

Efficiency (%)

Four-Stage DA

Three-Stage DA

Two-Stage DA

80

60

40

20

0

fficiency (%)

g

Three-Stage ggggggg DA

Two-Stage DA

AsymmetricFour-Way

DAClass B PA

Figure S4. (a) An example of a 2.14-GHz four-way DPA using 25-W GaN HEMTs and a W-CDMA signal with (b) 6.5-dB PAR and average power of 20 W with 61% drain efficiency (from Bell Labs, Alcatel, and Lucent).

Figure S5. An example of a 1.9–2.6-GHz reconfigurable DPA using MEMS switches: average power of 2 W at 9-dB back-off with efficiencies of 60% at 1.9 GHz, 61% at 2.14 GH z, and 64% at 2.6 GHz [20].

February 2016 49

present and future digital radio/television transmis-sion and cellular communications.

As summarized in “Modern Trends for DPAs,” a wealth of semiconductor technologies is being used to implement new DPAs—including RF CMOS, GaAs pHEMT, InGaP/GaAs HBT, silicon LDMOSFET, and GaN HEMT—covering a wide range of frequencies from UHF to 60 GHz at power levels from hundreds of milli-watts to multi-kilowatts. Various new circuit techniques have also been adopted to further improve the perfor-mance of DPAs. One of the main research areas has been extending the efficiency range of DPAs for ampli-fication of very high (8–12 dB) peak-to-average power ratio (PAPR) signals. There have been also significant efforts in recent years to improve the RF bandwidth for broadband applications. Further, reconfigurable DPAs for the realization of multiband, energy-efficient PAs have also been extensively studied.

This section reviews the modern trends in DPA development, including references to representative research works. More comprehensive reviews are pre-sented in [1] and [25]. It is not our intention to go into great detail regarding each DPA variant, but rather to provide an overview of recent research on DPAs. De-sign guidelines and in-depth mathematical analysis of different DPA variants can be found in [6], [26], and [27]. Our review will start with extended efficiency range (26 dB) DPAs, move on to broadband and reconfigurable PAs, and finally present an out-look on the role of the DPA in next-generation communication systems operating at millime-ter-wave frequencies.

Extended-Efficiency-Range DPAsThe classical Doherty con-figuration provides efficiency enhancement for an output power dynamic range of 6 dB. Raab has, however, theoreti-cally shown the possibility of extending the efficiency range of DPAs by making the peak-ing cell larger than the carrier cell [28]. Such a modification enables a higher modulation ratio and, thus, a higher back-off efficiency range to be achieved. This variant of DPAs is commonly referred as asym-metrical DPA and uses the same load network topology as the classical configuration but with different circuit element values. Iwamoto et al. [29] are

credited for realization of the first experimental dem-onstrator through a 950-MHz 27.5 dBm asymmetrical DPA, which was realized in an InGaP/GaAs process. As seen from Figure 10, the prototype exhibits a very distinct efficiency peak at 10-dB back-off power level, thereby fully proving the feasibility of the concept.

Asymmetrical DPAs are well adopted by the in-dustry and very commonly used as micro and macro base-station PAs. Currently, LDMOS is the preferred

Pout (dBm)

P1dB

DohertyControl

-100

10

20

30

Effi

cien

cy (

%)

40

50

60

-5 0 5 10 15 20 25 30

Figure 10. The collector efficiency of a 900-MHz InGaP/GaAs asymmetrical DPA [29].

MainClass B

Two-Port(Z2P) AVie

-ji Vi

Aux.Class C

+

Vm

-

+

Va

-

IaIm

P1 P2

Zm ZaLossyand Reciprocal

(a)

(b)

(Z2P-A) (Z2P-B)

Lossless and Reciprocal

P1 P2

R

P3

Figure 11. (a) A schematic used for the derivation of the two-port combiner network parameters of a symmetrical DPA. Zm and Za denote the fundamental tone impedances experienced by the transistors, where n is the harmonic index. ,V Vm a and ,I Im a denote the fundamental tone component of the drain voltage and current waveforms. (b) This intermediate network later converted to a three-port lossless network terminated with the load [38], [39].

50 February 2016

technology for realization of asymmetrical DPAs for base-station applications [30]–[32]. GaN HEMT asym-metrical DPAs are, however, also being studied for fu-ture systems [33]–[35]. Among the best results, a drain efficiency of 60% with 8.3 PAPR signals at 2.6  GHz was shown in a 51-dBm GaN HEMT prototype [36]. The measured PAE, however, was only 49% due to low gain, which is somewhat typical in asymmetrical DPAs [35], [37]. The peaking amplifier is much larger than the carrier amplifier in asymmetrical DPAs. The overall gain is therefore dominated by the low gain of the class-C biased peaking amplifier and, thus, lower than in symmetrical DPAs.

The use of a very large class-C cell also causes prac-tical limitations on realization of the analog input sig-nal splitter [13].

Recently, there has been an interest in extending the efficiency range of symmetrical DPAs by modification of the combining network. Özen et al. [38], [39] have demonstrated the existence of a class of symmetrical DPAs having efficiency peaks also for back-off levels larger than 6 dB while maintaining full voltage and current swings of both the carrier and peaking tran-sistors. The design technique is based on an analytical derivation of the combiner network parameters from the desired boundary conditions required for high effi-ciency operation, and its practical realization is derived from the desired boundary conditions required for high-efficiency operation. The derived combiner, there-fore, integrates the matching networks, offset lines, and impedance inverter. A schematic used for the deriva-tions is shown in Figure 11.

This new symmetrical DPA has the advantages of increased gain and cost reduction due to the use of symmetrical devices. Furthermore, design and realization of the input power splitter are simplified due to less uneven power splitting compared to the conventional asymmetrical DPA case. These distinct advantages enabled a 100-MHz instantaneous band-width 3.5-.GHz symmetrical DPA which provides a record high PAE of 52% with 9-dB PAPR LTE signals. Static and modulated measurement results are shown in Figure 12.

The N-way DPA approach is another way of extending the effi-ciency range. In this configuration the number of efficiency peaks is equal to number of branches. The main advantage of N-way DPAs compared to asymmetrical DPAs is that, theoretically, less ef-ficiency drop occurs between the efficiency peaks. This is illustrat-ed in Figure  13 for the three-way Doherty case. However, in such realizations the signal distribution and combining networks become

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Figure 12. (a) The measured static PAE and drain efficiency results of an extended-efficiency-range symmetrical DPA at 3.5 GHz. (b) The modulated measurement results without (blue) and with (green) digital predistortion (DPD) using carrier-aggregated 100-MHz OFDM signals [38].

-30 -25 -20 -15 -10 -5 00

20

40

60

80

100

Effi

cien

cy (

%)

Normalized Output Power (dB)

Figure 13. The efficiency of asymmetrical (blue) and three-way DPAs (red) versus normalized output power.

DAC LPF

DAC LPF

DAC

yd DSPUnit

RFRF

Output

RFPA

MainUpconverter

Upconverter

Downconverter Peaking

PAxp

xm

y

LPF

Figure 14. A block diagram of a dual-input DPA transmitter architecture. DSP: digital signal processor; LPF: lowpass filter.

February 2016 51

significantly more complex compared to conventional DPAs. Due to these complications, practical N-way DPAs often do not meet the expected theoretical per-formance [40]–[45]. It should also be mentioned that, so far, the focus in this field has been limited mainly to realization of three-way DPAs due to practical issues.

DPAs with Individual RF Input Signal ControlThe conventional, analog-splitter-based DPA has a great advantage in its simplicity and as a direct class-A/B PA replacement. However, significant improvements achieved in energy consumption of digital-to-analog converters (DACs) and digital circuits with aggressive CMOS scaling over the last decade are making DPAs with individually controlled carrier and peaking amplifier input signals interesting, particu-larly for base-station applications [46], [47].

A block diagram of a dual-input Doherty transmitter architecture is shown in Figure 14. In contrast to a con-ventional class-B/C Doherty system, no power is wasted in dual-input DPAs when the carrier cell is turned off, which improves the gain and PAE. Furthermore, in [48] the authors proposed to dynamically vary the phase-offset between the branches to enhance the load modula-tion in dual-input DPAs. Experimental results show that a significant PAE enhancement can be achieved between the efficiency peaks (see Figure 15). It should also men-tioned that, very interestingly, individual control of the input signals also provides important possibilities for bandwidth enhancement [49], [50] and for frequency reconfigurable PAs, as described in later sections.

Pelk et al. [51] proposed a three-way Doherty with individual control of each branch signal in the digital domain to overcome the implementation issues faced in the analog realization. A GaN HEMT demonstra-tor was built for experimental verification, which pro-vided a record high PAE of 64% at 12-dB back-off (see Figure 16). However, very high complexity and the high cost of such approach is, unfortunately, hamper-ing its widespread adoption by the industry.

An interesting research topic related to multi-in-put DPA architectures is how to find optimal signal designs that maximize high efficiency and linear-ity. A common approach is to characterize the PA with continuous wave signals to identify optimal signal combinations for the best efficiency versus back-off. In this way a static inverse model of the PA is constructed and used for constellation mapping

30

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18 20 22 24 26 28 30

Adaptive Phase Alignment On (PAE)Adaptive Phase Alignment Off (PAE)

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E (

%)

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Figure 15. The efficiency of a dual-input DPA with and without adaptive phase alignment [48].

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E (

%)

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Three-Way GaN Doherty, Profile 1Three-Way GaN Doherty, Profile 2Single Class-B GaN Amplifier

Figure 16. The measured single-tone PAE of a three-way DPA versus the output power back-off for different drive profiles [51].

Static Splitter Main PA

Peaking PA

DPDydesired

fm

fp

xm

xp y

ya

Figure 17. The conventional scheme used for linearization of a dual-input DPA.

Interest in DPAs was later revived, owing to significant progress in radio communication systems based on complex digital modulation schemes.

52 February 2016

of branch signals according to the desired output signal. Thereafter, residual nonlinearities and mem-ory effect are corrected with a DPD block before the static inverse model, as shown in Figure 17. On the other hand, more advanced signal design algorithms are also being developed to achieve even better ef-ficiency–linearity compromise in multi-input PA ar-chitectures [52].

Efficiency- and Output-Power-Reconfigurable DPAsSo far we have reviewed DPAs that are optimized for a certain output power level and for a signal with fixed statistics (i.e., PAPR). However, base stations and, in particular, handset PAs are not always operated at full power. The RF output power can be reduced when the data traffic is low or when the distance between the mobile terminal and the base station is short. Accu-rate output power control is also necessary in the hand-sets to maximize the system throughput and battery lifetime. In such cases, it is highly desirable to have a DPA with a reconfigurable output power level to main-tain efficient operation.

Mohamed et al. [20] have shown that it is possible to re-configure the output power level of DPAs by incorporat-ing microelectromechanical systems (MEMS) switches in the load network. A photo of the fabricated 2.6-GHz GaN HEMT demonstrator and the measurement re-sults of the prototype are shown in Figure 18. Fur-ther, the authors showed the feasibility of reconfiguring the efficiency range using MEMS switches in the load network [53].

Gustafsson et al. [50], [54] have proposed a modi-fied DPA targeting wide-band applications (see the next section) but have also shown that the back-off

efficiency range can be reconfigured by varying the supply voltage of the carrier cell and the current pro-file (gate bias) of the peaking cell. Such an approach is favorable, especially when there are no good tun-able components available in the semiconductor pro-cess used.

In [55], a 1.95-GHz GaN HEMT output power re-configurable DPA is presented, where the power

HarmonicTuning

OutputNetwork Two

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Gate Bias

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Pout = 11 dBm

Figure 18. (a) A photo of the fabricated MEMS-based reconfigurable peak power GaN HEMT DPA demonstrator. (b) The measured efficiency results versus the output power for three different power modes [20].

February 2016 53

adaptation is achieved by changing the drain and gate bias voltages.

Wideband DPAsWith an increasing number of frequency bands allocated for wireless communication, there has been intense research targeting wideband DPAs. It has been recognized that the m/4 im-pedance inverter of the original Doherty to-pology is limiting the theoretical efficiency enhancement bandwidth to roughly 30%, but the bandwidth is, in practice, further limited by the device parasitics. Qureshi et al. have ex-plored the possibility of absorbing the carrier and peaking device output capacitances into the impedance inverter for a wideband LDMOS based DPA [56]. Guolin and Jansen presented a more generic approach in [57], where a simpli-fied real-frequency technique is applied with a comprehensive optimization scheme to derive carrier, peaking, and load matching networks that together approximate the optimum load-pull based carrier and peaking transistor im-pedances across a wide bandwidth.

Recently, several researchers have recog-nized that the bandwidth of the DPA can be increased significantly by augmenting the network connected to the peaking transis-tor output [58]–[63]. Abadi et al. introduced a resonant-shunt LC network at the peaking PA output that simultaneously offers convenient biasing, linearity, and harmonic tuning efficiency [59]. By instead adding a two-section impedance transformer to the peaking device, a more wideband back-off efficiency characteristic is obtained. This technique, which is shown in Figure 19(a), was origi-nally explored in a dual-band class-E DPA [62]. Gio-

fre et al. used the same technique to achieve a record 1.0–2.6-GHz bandwidth DPA with 6-dB back-off effi-ciency 235% across the band [58] [see Figure 19(b)]. The approach is also suited for wideband high-power commercial applications, as recently demonstrated by Freescale [61] and NXP [60]. The wideband DPA in [60]

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100 X

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PinPout

50 XPeaking

Figure 19. (a) A DPA topology with the combiner modified for improved bandwidth [62]. (b) The measured drain efficiency and output power for a 1.2–2.6-GHz wideband GaN DPA based on the topology in (a) [58].

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Figure 20. (a) A fully integrated 5.8–8.8-GHz GaN MMIC DPA (2.9 mm by 2.9 mm) based on a modification of the impedance-inverter impedance for improved bandwidth and efficiency reconfigurability [54]. (b) The measured average efficiency (PAEavg) and output power (Pout,avg) for a 20-MHz 256-QAM signal. A vector-switched digital predistortion algorithm [87] enabled excellent linearity, characterized by the normalized mean square error and ACPR.

54 February 2016

has also been used by He et al. as the basis for realiz-ing a wideband push-pull DPA in [64]. The push-pull operation enables, in theory, an independent control of the fundamental and second-harmonic impedances and thereby improved efficiency. The performance is, in practice, limited by the balun performance and, in particular its common mode parasitic coupling to ground [65].

Gustafsson et al. [50] and Wu and Boumaiza [66] have, independently, proposed a modified DPA in which the impedance of the m/4 impedance inverter is set to match the PA load impedance. In contrast to conven-tional DPAs, this eliminates any band limiting imped-ance transformation at back-off and, thus, a significantly larger efficiency bandwidth for realistic modulated sig-

nals. The modified DPA architecture has been demonstrated by a fully integrated 5.8–8.8-GHz GaN MMIC targeting point-to-point radio links [see Figure 20(a)] [54].

As shown in Figure  20(b), an excellent average PAE of 32%–41% and linearity are obtained across the band when tested with a 20-MHz, 8.5-dB PAR 256 [20] quadrature amplitude modulation (QAM) signal. As described previously, the back-off efficiency can also be reconfigured in this topology, which means that a wide range of wireless standards in a wide frequency range can be ampli-fied efficiently with the same circuit.

Multiband DPAsFor cost and complexity reasons, it is highly desirable that the same PA

be able to cover as many frequency bands as possible. Unfortunately, the wideband approaches presented previously present an inevitable performance degrada-tion as the bandwidth increases to cover more bands. This has motivated significant research on multiband DPAs that utilize the fact that the commonly used fre-quency bands are typically widely separated. Opti-mized DPA designs targeting specific bands, rather

Quad-BandPhase

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TransformationNetwork

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Network

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Figure 21. A quad-band (950/1500/2140/2650 MHz) DPA [69]. IPS: input phase splitter; IIN: impedance inverter network.

Clock

. . .

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trol

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trol

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Figure 22. The schematic for an RF-DAC based DPA.

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E (

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PAEDE

Figure 23. (a) A block diagram of an active phase-shift DPA. (b) The measured efficiency of a 45-nm SOI CMOS active phase-shift DPA at 45 GHz [79].

February 2016 55

than a generic wide-frequency coverage, are therefore expected to perform better.

Saad et al. [67] have described the design of a dual-band GaN-based DPA, operating at 1.8 and 2.4 GHz. The DPA utilizes a dual-band design technique for the power splitter, phase shifter, matching net-works, and impedance inverter [68]. When tested at 1.8 GHz with 7.5 dB PAR LTE signals and at 2.4 GHz with 8.5 dB PAR WiMAX signals, the manufactured PA demonstrates an average PAE of 54% and 45%, respectively. Ngiem et al. [69] have presented tri- and even quad-band DPA designs covering 950, 1,500, 2,140, and 2,650 MHz (see Figure 21). A clear Doherty efficiency behavior is reported in each band with PAE at 6-dB output power back-off ranging from 43% at the lower band but decreasing to 26% at 2.65 GHz. The circuit complexity and size increase rapidly with the number of bands covered, and the advantage of a multiband versus a broadband design approach diminishes in practice.

Special care needs to be taken when transmitting concurrent signals in multiple bands. In particular, the linearity in each band is degraded. Dedicated concur-rent dual- and triple-band DPD algorithms have been proposed in [59] and [70], [72]. Gustafsson et al. have shown that the fundamental DPA load modulation is affected by the concurrent multiband operation and that the behavior of the impedance inverter, also at interband mixing frequencies (i.e., f f2 1- and f f1 2+ ), will degrade the efficiency enhancement if not prop-erly handled [73].

Multiple frequency bands can also be covered by using reconfigurable elements in the DPA archi-tecture. In [74], Mohamed et al. presented a tri-band 1900/2140/2600-MHz DPA that was implemented using MEMS switches in the combiner and input matching networks. Based on the same principle, the authors also presented a combined multimode, multiband DPA in [75]. Andersson et al. have dem-onstrated a continuously reconfigurable 1–3-GHz transmitter [49]. A fixed hardware is used, but a continuum between outphasing and DPA solutions is used as a basis to show that a digital reconfigura-tion of the control schemes to the two RF inputs can be used to enhance the back-off efficiency across a record wide frequency range. It should be stressed that these reconfigurable DPAs do not support con-current transmission in multiple bands.

RF-DAC Based DPAsA very active research field in the wireless industry is digitally intense transmitters for further integration and performance improvement. In digital transmitters, the signal generation and modulation are done using digital only blocks in CMOS and eventually completely integrated with the baseband processor. One digital technique studied for amplitude modulation is to oper-

ate the PA as a multibit DAC. The output amplitude con-trolled by regulating the number of active transistors in the PAs. In conventional RF-DAC circuits, however, the transistor cells load-pull each other in an undesired way, causing severe efficiency degradation at back-off. However, by combining the output of two RF-DACs with a Doherty combiner network, proper load modu-lation may be enabled. A generalized schematic of an RF-DAC based DPA is shown in Figure 22.

In [76], Gaber et al. demonstrated a 2.4-GHz, 25-dBm RF-DAC–based DPA in 90-nm CMOS technol-ogy. Tuning capacitors at the output were also utilized to further improve the load modulation. Song et al. have demonstrated a 3.7-GHz, 27-dBm RF-DAC DPA in 65-nm CMOS, using transformer-based passives for the input power divider and output combiner net-works to minimize losses in the passives [77].

The RF-DAC–based DPA architecture enables indi-vidual control of the current profiles of the carrier and peaking PAs. In [78], Song et al. explored this for antenna mismatch correction. It was shown that the high-efficiency Doherty operation can be maintained for a wide range of load impedances by reconfiguring the digital control bits.

Millimeter-Wave DPAs for 5GThe wireless industry is planning to exploit millimeter bands in 5G systems to augment the currently satu-rated 700-MHz–3.5-GHz radio spectrum bands. Inter-est in millimeter-wave, high-efficiency transmitter architectures is, therefore, rapidly growing [79], [80]. There are, however, a number of challenges ahead that

Main Amplifier(Class AB)

AuxiliaryAmplifier(Class C)

InputRLLs

COut

COut

Lp

2

Lp

2COut

M2

M2

Figure 24. The schematic illustration of a voltage-combined DPA [86].

Advances in solid-state technology and compact hybrid and MMIC approaches as well as recent low-cost analog and digital predistortion techniques have shown that DPAs will not disappear in the near term.

56 February 2016

have to be solved for successful realization of millime-ter-wave DPAs:

• At millimeter wave frequencies, the devices typi-cally provide very low gain for class-C operation. This fact may severely limit the PAE of millime-ter-wave DPAs.

• Metallic losses become more prominent at high frequencies. Low-loss realization of the quarter-wavelength inverter and phase shifter networks has to be studied.

• Due to low output power levels, digital predis-tortion is not feasible for millimeter-wave appli-cations. Millimeter-wave DPAs should therefore provide a good analog linearity for successful real-ization 5G base-station transmitters.

Some of these problems have already been addressed in recent publications. In [79], Agah et al. have realized a 45-GHz active phase-shift DPA in 45-nm silicon-on-insulator (SOI) CMOS. The authors proposed to replace the quarter-wavelength input phase shifter with an extra predriver amplifier to improve the PAE. A block diagram of the concept is shown in Figure 23. The prototype presents peak and 6-dB back-off efficiencies of 20% and 21%, respectively. Further, the authors also studied the use of slow-wave coplanar waveguides (CPWs) for realization of the impedance inverter to minimize the metallic losses. It was shown that the slow-wave CPW structure yields 42% more PAE at 6-dB back-off compared to the con-ventional CPW structure.

In [81], Kaymaksut et al. proposed the voltage-com-bined DPA concept, which enables compact integrated realizations. The idea originates from the principle of distributed active transformer PAs [82]. In this topol-ogy, the voltages of the differential carrier and peaking PA cells are summed using transformers (see Figure 24). Neither a quarter-wavelength inverter nor an input phase shifter is needed in such an approach, which makes it very suitable for handset and millimeter-wave base-stations applications. In fact the topology is already studied in various publications for realizing S-band handset DPAs [83]–[85]. The first millimeter-wave realization, however, was presented in [86]. A 77-GHz, 21-dBm voltage-combined DPA was implemented in a 40-nm CMOS process. An on-chip envelope detector was also implemented for dynamic biasing of the peak-ing cell. In this way the carrier device can be biased in class-A/B operation at peak power and below the gate threshold for lower signal envelopes. The class-C

operation mode and its associated low gain are thereby avoided. The PAE at peak power and 6-dB back-off is 13.6% and 7%, respectively.

Finally, it should also be mentioned that the net-work synthesis methodology in [38] and [39] enables the functionality of the matching networks, offset lines, and impedance inverter to be realized with a network that consists of only five reactive compo-nents. Such a high level of integration may create new opportunities for research and development of inte-grated handset and millimeter-wave DPAs with high performance.

ConclusionsEighty years ago, William Doherty invented a PA archi-tecture that has played—and will continue to play—an important role in the development of energy-efficient radio transmitters for a variety of wireless communica-tion applications. Although the original concept is still equally valid, the development of new semiconductor processes and digital signal processing techniques has served as a basis for an evolution of the DPA topology into the 21st century. The need for energy-efficient power amplification will be further emphasized in future wireless systems (5G and beyond) through the projected exploration of dense-antenna arrays and millimeter-wave frequencies. Recent developments of the Doherty concept make it one of the most attractive candidates for realizing energy-efficient wireless sys-tems into the future.

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