Pyramids Archtichture

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Parallel ComputingCS 702 Fall ( 2011 / 2012)

An Introduction toPyramids Archtichture

Presented by :-

Hatim Mussad Al Sum

Presented to:

Dr. Mohammed Anwar Asal.


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Agenda

Introduction to Pyramid Architecture.

Pyramid Properties.

Two level Pyramid.Advantages.

Pyramid Computer.

Lower Bounds.

Fundamental Algorithms.

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Introduction

Pyramid Architecture A pyramid is a repetitive structure whose

building block consists of the basic unit.

Pyramids are widely used in image processing,where large data is segmented and

decomposed.

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Introduction

Pyramid Architecture

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Pyramid Properties

There are five nodes in the building block of the pyramid.

The node on the top is called the parent of the four lower-level child nodes.

Each parent can have only four children, and all the

children are connected in a mesh. Each level of a pyramid is a mesh, and the bottom level or

the level with maximum nodes (2n X 2n ) is called the baselevel.

The ratio of nodes in a lower level to the node(s) in the

adjacent upper level is 4:1. The topmost level ( level 0) is called the apex of the

pyramid, and it has only one node (20 X 20 = 1 )

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Two Level Pyramid

A two-level pyramid has 21 nodes

one apex node requires four links

four nodes at level 1 require seven links, and16 base-level nodes require a maximum of

five links.

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Two Level Pyramid

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Pyramid: 3-D hierarchy


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Advantages

The offers several advantages when you build apyramid.

The concurrent DMA and CPU operations over the links

reduce communication overhead for large amounts ofdata.

The apex node has two free links that can be used fordata I/O.

Also, the children can pass data among themselveswithout slowing down the parent nodes.

This is an advantage in image processing, where datadecomposition and task scheduling are common.

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Pyramid Computer

Apyramid computer (pyramid) of size n is a machine thatcan be viewed as a full, rooted, 4-ary tree of height log

n, with additional horizontal links so that each horizontallevel is a mesh. It is often convenient to view the pyramid as

a tapering array of meshes. A pyramid of size n has at its base a mesh of size n, and a

total of

(4/3 *n -1/3) processors.

One advantage of the pyramid over the mesh is that the

communication diameter of a pyramid computer of size n isonly Q(log n).

This is true since any two processors in the pyramid canexchange information through the apex

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Pyramid Computer of size 16

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The levels are numbered

the base is level 0 and theapex is level log4n.

A processor at level i isconnected viabidirectional unit-timecommunication links to its9 neighbors (assumingthey exist):

4 siblings at level i,

4 children at level i - 1,

a parent at level i +


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Pyramid Computer of size 16

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Each processorcontains registers withits level, row, andcolumn coordinates,the concatenation ofwhich are in theprocessor identificationregister.

These registers can beinitialized in Q(log n)time if necessary.


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Lower Bounds

A pyramid computer of size n has acommunication diameter of Q(log n)

Any two processors can exchange messages in

O(log n) time, by communicating via the apex,and some pairs of processors, such as those atopposite corners of the base mesh, require W(logn) time to exchange messages.

This gives a worst-case lower bound of W(log n)time on any problem that may requireinformation to be exchanged between arbitraryprocessors.

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Fundamental Algorithms

Initializing Identity Registers.

Bit Counting Problems.

Computing Commutative Associative BinaryFunctions.

Point Queries.

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Initializing Identity Registers

a Q(log n) time algorithm is presented to initialize theidentity registers of all processors in a pyramidcomputer of size n.

The processors do not know any of the dimensions ofthe pyramid, including the number of levels in thepyramid, the size of the base mesh, or their mesh levelwith respect to the pyramid.

Base processors querying for nonexistent children.

Apex of the pyramid querying for a nonexistent

parent.

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Initializing Identity Registers: Phase 1

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Bit Counting Problems

Digitized black/white picture is initially stored

one pixel per processor in the base of the

pyramid.

The interpretation is that the picturerepresents a single black figure on a white

background.

The area of the figure, that is, the number ofblack pixels in the figure, can be determined in

Q(log n) time.

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Bit Counting Problems cont.

First stage :

every processor at level 1 obtains the values of the pixels stored in itsfour children (these children are base processors) and computes thenumber of these that are black, storing the result in registerlocal_count. So, at the end of stage 1, every processor at level 1 will

know the number of black pixels that exist in base of the subpyramidunder it. At stage i, every processor at level i- 1 sends local_count to itsparent. Every processor P at level i adds the 4 values sent from itschildren, which gives the total number of black pixels in the base of thesubpyramid under P, and stores this value in local_count. At theconclusion of stage log

n, the apex knows the total number of black pixels in the entire

base. Since each of the log4n stages requires constant computationtime, the algorithm runs in Q (log4n) time.

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Pyramids Archtichture