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Computer Organization And Assembly Language Prof. Muhammad Saeed III

Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

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Page 1: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Computer Organization And

Assembly Language

Prof. Muhammad Saeed

III

Page 2: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Computer Architecture & Assembly Language

2

X86 Processor AssemblyLanguage

1/27/2015

Assembly Language Instructions

Page 3: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Computer Architecture & Assembly Language

31/27/2015

MOV reg, regMOV mem, regMOV reg, memMOV mem, immMOV reg, imm

Language Instructions

† MOV

MOVZX reg32, reg/mem8MOVZX reg32, reg/mem16MOVZX reg16, reg/mem8

† MOVZX

MOVSX reg32, reg/mem8MOVSX reg32, reg/mem16MOVSX reg16, reg/mem8

† MOVSX

Page 4: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Computer Architecture & Assembly Language

41/27/2015

† XCHGXCHG reg, regXCHG reg, memXCHG mem, regINC reg/memDEC reg/mem

† INC, DECThe Overflow, Sign, Zero, Auxiliary Carry, and Parity flags are changed according to the value of the destination operand.

† ADD, SUBADD dest, sourceThe Carry, Zero, Sign, Overflow, Auxiliary Carry,

and Parity flags are changed according to the value that is placed in the destination operand.

SUB dest, source

NEG regNEG mem

† NEGThe Carry, Zero, Sign, Overflow, Auxiliary Carry, and Parity flags are changed according to the value that is placed in the destination operand.

Language Instructions

Page 5: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

The PUSH instruction first decrements ESP and then copies a source operand into the stack. A 16-bit operand causes ESP to be decremented by 2. A 32-bit operand causes ESP to be decremented by 4.

† PUSH

† POP

PUSH reg/mem16PUSH reg/mem32PUSH imm32

The POP instruction first copies the contents of the stack element pointed to by ESP into a 16- or 32-bit destination operand and then increments ESP. If the operand is 16 bits, ESP is incremented by 2; if the operand is 32 bits, ESP is incremented by 4

POP reg/mem16POP reg/mem32

Language Instructions

Page 6: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

† PUSHFD and POPFDThe PUSHFD instruction pushes the 32-bit EFLAGS register on the stack, and POPFD pops the stack into EFLAGS.

† PUSHAD and POPADThe PUSHAD instruction pushes all of the 32-bit general-purpose registers on the stack in the given order: EAX, ECX, EDX, EBX, ESP, EBP, ESI, and EDI. The POPAD instruction pops the same registers off the stack in reverse order.

† PUSHA and POPAPUSHA instruction, pushes the 16-bit general-purpose registers (AX, CX, DX, BX, SP, BP, SI, DI) on the stack in the order listed. The POPA instruction pops the same registers in reverse

Language Instructions

Page 7: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

† LOOPThe LOOP instruction assumes that the ECX (or CX) register contains the loop count. When the loop instruction is executed, the CX register is decremented and the control jumps to the target label, until the CX register value reaches zero.

Language Instructions

† Unconditional JumpJmp label1

Page 8: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

Instruction Description Flags testedJE/JZ Jump Equal or Jump Zero ZF

JNE/JNZ Jump not Equal or Jump Not Zero ZF

JG/JNLE Jump Greater or Jump Not Less/Equal

OF, SF, ZF

JGE/JNL Jump Greater or Jump Not Less OF, SF

JL/JNGE Jump Less or Jump Not Greater/Equal

OF, SF

JLE/JNG Jump Less/Equal or Jump Not Greater

OF, SF, ZF

† Conditional JumpsFollowing are the conditional jump instructions used on signed data

Page 9: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

† Conditional JumpsFollowing are the conditional jump instructions used on unsigned data

Instruction Description Flags testedJE/JZ Jump Equal or Jump Zero ZFJNE/JNZ Jump not Equal or Jump Not Zero ZFJA/JNBE Jump Above or Jump Not Below/Equal CF, ZF

JAE/JNB Jump Above/Equal or Jump Not Below CF

JB/JNAE Jump Below or Jump Not Above/Equal CF

JBE/JNA Jump Below/Equal or Jump Not Above AF, CF

Page 10: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

† Conditional JumpsThe following conditional jump instructions have special uses and check the value of flags

Instruction Description Flags testedJXCZ Jump if CX is Zero noneJC Jump If Carry CFJNC Jump If No Carry CFJO Jump If Overflow OFJNO Jump If No Overflow OF

JP/JPE Jump Parity or Jump Parity Even PF

JNP/JPO Jump No Parity or Jump Parity Odd PF

JS Jump Sign (negative value) SF

JNS Jump No Sign (positive value) SF

Page 11: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

† ANDAND reg,regAND reg,memAND reg,immAND mem,regAND mem,imm

The AND instruction performs a boolean (bitwise) AND operation between each pair of matchingbits in two operands and places the result in the destination operand

† ORThe OR instruction performs a boolean OR operation between each pair of matching bits in two operands and places the result in the destination operand

OR reg,regOR reg,memOR reg,immOR mem,regOR mem,imm

Language Instructions

Page 12: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

† XORThe XOR instruction performs a boolean exclusive-OR operation between each pair of matching bits in two operands and stores the result in the destination operand

OR reg,regOR reg,memOR reg,immOR mem,regOR mem,imm

† NOTThe NOT instruction toggles (inverts) all bits in an operand

NOT regNOT mem

Language Instructions

Page 13: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

† TEST

Language Instructions

The TEST instruction performs an implied AND operation between each pair of matching bits in two operands and sets the Sign, Zero, and Parity flags based on the value assigned to the destination operand. The only difference between TEST and AND is that TEST does not modify the destination operand. The TEST instruction always clears the Overflow and Carry flags. It modifies the Sign, Zero, and Parity flags in the same way as the AND instruction.

Page 14: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions† CMP

In x86 assembly language we use the CMP instruction to compare integers. Character codes are also integers, so they work with CMP as well. The CMP (compare) instruction performs an implied subtraction of a source operand from a destination operand. Neither operand is modified.CMP uses the same operand combinations as the AND instruction.

Page 15: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

† Directive† Instruction† Procedure

myproc PROC……ret

myproc endp (call myproc)† Macro

myMacro MACRO……..endm (myMacro)

Page 16: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

† PTR Operator PTR operator overrides the declared size of an operand to access the operand using a size attribute that is different from the one assumed by the assembler.

MOV eax, WORD PTR [var]

† LENGTHOF Operator

The LENGTHOF operator counts the number of elements in an array

Language Instructions

Var1 WORD 20 DUP(0)Var2 DWORD 20 DUP(0)LENGTHOF var1

† SIZEOF OperatorVar1 WORD 20 DUP(0)Var2 DWORD 20 DUP(0)SIZEOF var1

The SIZEOF operator counts the number of bytes in an array

† ($ - array)Array BYTE “WELCOME”, 0dh, 0ahSize WORD ( $-Array )

Page 17: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

† LABEL Directive The LABEL directive gives a size attribute without allocating anystorage

Language Instructions

.DATAval16 LABEL WORDval32 DWORD 12345678h.CODEmov ax, val16 mov dx, [val16+2]

.DATALongValue LABEL DWORDval1 WORD 5678hval2 WORD 1234h.CODEmov eax, LongValue

Page 18: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

† Indexed Operand An indexed operand adds a constant to a register to generate an effective address.DATA

array BYTE 10h, 20h, 30h.CODEmov esi, 0mov al, array[esi]

† Scale Factors in Indexed Operand.DATAArray DWORD 100h, 200h, 300h, 400h

.CODEmov esi, 3 * TYPE Aarray mov eax, array[esi]

Page 19: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

† LOOPZ† LOOPE† LOOPNZ† LOOPNE

Conditional Loop Instructions

Bits Shift

† SHL, SHR, SHLD, SHRD† ROL, ROR† RCL, RCR† SAL, SAR

Page 20: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

Multiplication & Division

† MUL† IMUL† DIV† IDIV

MUL reg/mem8MUL reg/mem16MUL reg/mem32

IMUL reg/mem8IMUL reg/mem16IMUL reg/mem32DIV reg/mem8DIV reg/mem16DIV reg/mem32

IDIV reg/mem8IDIV reg/mem16IDIV reg/mem32

Page 21: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

BIT Test Instructions† BT† BTR† BTS† BTC

BT copies the addressed bit into the carry flag, BT ax, 6

BT r/m16, r16BT r/m32, r32BT r/m16, imm8 BT r/m32, imm8

Flags Instructions† LAHF† SAHF† CLC, STC, CMC† CLD, STD† CLI† STI

7 6 5 4 3 2 1 0

SF ZF ---- AC ---- PF ---- CF

Page 22: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

Sign Extension Instructions† CBW† CWD† CWQ

Page 23: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

String Instructions† MOVSB† MOVSW† MOVSD† MOVSQ

The MOVSB, MOVSW, and MOVSD instructions copy data from the memory location pointed to by ESI to the memory location pointed to by EDI. The two registers are either incremented or decremented automatically (based on the value of the Direction flag):

.DATAsource DWORD 20 DUP(0AAAAAAAAh)target DWORD 20 DUP(?).CODECLD ; direction = forwardMOV ecx, LENGTHOF source ; set REP counterMOV esi, OFFSET source ; ESI points to sourceMOV edi, OFFSET target ; EDI points to targetrep MOVSD ; copy doublewords

Page 24: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

String Instructions

† CMPSB† CMPSW† CMPSD† CMPSQ

.DATAsource DWORD 1234htarget DWORD 5678h.CODEmov esi, OFFSET sourcemov edi, OFFSET targetcmpsd ; compare doublewordsja L1 ; jump if source > target

mov esi, OFFSET sourcemov edi, OFFSET targetcld ; direction = forwardmov ecx, LENGTHOF source ; repetition counterrepe cmpsd ; repeat while equal

Page 25: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

String Instructions† SCASB† SCASW† SCASD† SCASQ

.DATAalpha BYTE "ABCDEFGH",0.CODEmov edi, OFFSET alpha ; EDI points to the stringmov al, 'F' ; search for the letter Fmov ecx, LENGTHOF alpha ; set the search countcld ; direction = forwardrepne scasb ; repeat while not equaljnz quit ; quit if letter not founddec edi ; found: back up EDI………..Quit:……

Page 26: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

String Instructions

† STOSB† STOSW† STOSD† STOSQ

.DATACount = 100string1 BYTE Count DUP(?).CODEMov al, 0FFh ; value to be storedMov edi, OFFSET string1 ; EDI points to targetMov ecx, Count ; character countCLD ; direction = forwardRep stosb ; fill with contents of AL

Page 27: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

String Instructions† LODSB† LODSW† LODSD† LODSQ

.DATAarray DWORD 1,2,3,4,5,6,7,8,9,10 ; test datamultiplier DWORD 10 ; test data.CODEmain PROCcld ; direction = forwardmov esi, OFFSET array ; source indexmov edi, esi ; destination indexmov ecx, LENGTHOF array ; loop counterL1: lodsd ; load [ESI] into EAXmul multiplier ; multiply by a valuestosd ; store EAX into [EDI]Loop L1exitmain ENDPEND main

Page 28: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Language Instructions

rowSize = 5

matrix1 EQU 10 * 10matrix2 EQU <10 * 10>

count TEXTEQU %(rowSize * 2)move TEXTEQU <mov>setupAL TEXTEQU <move al,count>

Data Directives

† =† EQU† TEXTEQU

Page 29: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

Computer Architecture & Assembly Language

291/27/2015

Program1st Program .586.MODEL flat, stdcall option casemap :none

Include D:\msaeed\academic\assemblylanguage\masm32\include\windows.inc Include D:\msaeed\academic\assemblylanguage\masm32\include\kernel32.incInclude D:\msaeed\academic\assemblylanguage\masm32\include\user32.inc Includelib D:\msaeed\academic\assemblylanguage\masm32\lib\kernel32.lib Includelib D:\msaeed\academic\assemblylanguage\masm32\lib\user32.lib

.DATAWindowTitle BYTE “Greetings",0Message BYTE “Hello, World",0

.CODEmain:

invoke MessageBox, NULL, ADDR Message, ADDR WindowTitle, MB_OKinvoke ExitProcess, eax

end main

Page 30: Prof. Muhammad Saeed III. 1/27/2015Computer Architecture & Assembly Language2 Assembly Language Instructions

END