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photovoltaic system. A light concentrator photovoltaic module includes a medium having a light receiving plane, photovoltaic elements arranged in a spaced relationship with the light receiving plane, and a light reflecting plane for conducting light incident upon the light receiving plane, but not directly received by the photovoltaic elements to the photovoltaic elements. The light reflecting plane has a structure as viewed on a cross section in a plane transverse to the module light receiving plane and traversing two adjacent photovoltaic elements and a light reflecting member, so that the light reflecting plane includes at least two first inclined planes and two second inclined planes, the first inclined planes being right ascending while the second inclined planes are left ascending, and these are arranged on the right and left sides of the middle point respectively. Patent number: 6323,415 Publication date: November 27, 2001 Inventors: Tsuyoshi Uematsu, Terunori Warabisako Yoshiaki Yazawa, Yoshinori Miyamura, Ken Tsutsui, Shinichi Muramatsu, Hiroyuki Ohtsuka, Junko Minemura Sub-nanoscale electronic devices and processes ApplicantYale University, University of South Carolina, USA The invention is for a new generation of electronic microcircuit technology, having dimensions much smaller than those of semiconductor integrated circuits, and to related systems and processes. It meets requirements of interconnect at atomic level, improved conductivity and stability giving ultra-dense electronic systems. It comprises an integrated circuit structure of transistors; thin-film conductor interconnects to form electronic circuits in a predetermined electrical configuration; and pairs of contact pads, connected to the thin-film conductor interconnects, each adjacent pair of contact pads connected only by a conductive oligomer of a precisely determined number of units. This technology approach fits the requirements of interconnect problems and allows self-aligned fabrication. Among disclosed innovations are self-aligned spontaneous assembly of chemically synthesized interconnects, active devices, and circuits for atomic scale electronics. The approach utilizes an inherently self-aligned batch processing technique addressing fabrication limitations of conventional ULSI, providing gain modulation through the electron wave- function of a polymeric conductor. Radical improvement in the economics of downsizing electronic devices gives a more favorable cost when in conventional technology cost per transistor is no longer decreasing with size. Patent number: 6,320,200 Publication ahte: November 20, 2001 Inventors: Mark A Reed, James M. Tour Perfluorinated amide salts and their uses as ionic conducting materials Applicants: Hydro-Quebec, Canada, Centre National de la Recherche Scientifique, France The invention concerns ionic compounds in which the anionic load has been delocalized. A compound is comprised of an amide or one of its salts, including an anionic portion combined with at least one cationic portion M.sup.tm in sufficient numbers to ensure overall electronic neutrality; the compound is further comprised of M as a hydroxonium, a nitrosonium NO.sup.+, an ammonium --NH.sub.4 t, a metallic cation with the valence m, an organic cation with the valence m, or an organometallic cation with the valence m. The anionic portion matches the formula R.sub.F S0.sub.x N.sup. Z, wherein R.sub.F is a perfluorinated group, x is 1 or 2, and Z is an electroattractive substituent. The compounds can be used notably for ionic conducting materials, electronic conducting materials, colorants, and the catalysis of various chemical reactions. Patent number.6,319,428 Publication date: November 20, 2001 Inventors: Christophe Michot, Michel Armand, Michel Gauthier, Yves Choquette Moldless semiconductor device and PV device module Applicant: Canon, Japan. This invention is for a semiconductor device, more particularly a moldless semiconductor device, not covered with any mold resin and a photovoltaic device module, a solar cell module and a construction material which make use of the moldless semiconductor device as a bypass diode. A moldless semiconductor device comprising a semiconductor chip held between outer-connecting terminals and connected electrically to the terminals is provided. At least one of the two terminals has, at its region contiguous to the semiconductor chip, a hardness different from all other regions of the one terminal. This moldless semiconductor device can withstand significant external force and exhibits high reliability used in photovoltaic device modules. The moldless semiconductor device has achieved a very thin structure and made it possible to be incorporated in photovoltaic devices with ease and to use resin in a small quantity when sealed with the resin. It provides semiconductor devices which are tough to torsion, bend and impact, even though they are moldless and can solve prior art problems. Patent numbex6,316,832 Publications date: November 13, 2001 Inventors: Koji Tsuzuki, Tsutomu Murakami, Satoru Yamada, Yoshifumi Takeyama, Koichi Shimizu Batch manufacturing method for photovoltaic cells Assignee: As&b SA (Swatch Group) Switzerland The invention concerns a manufacturing method for photovoltaic cells and in particularily a method for the batch manufacture of a plurality of such cells. The industrial scale batch manufacture of this type of ell is relatively recent and has for a long time been limited by the absence of appropriate cell manufacturing techniques. The invention includes providing at least one strip of conductive material, cutting in succession substrates, having the shape and the dimensions of the desired cells replacing the cut substrates in the strip, depositing semi- conductor materials, forming at least one n-i-p or p-i-n junction on one of the faces of the strip, depositing a transparent layer of conductive material on top of the semi- conductor materials, removing from the strip, the cut substrates coated with semi-conductor materials and the upper electrode to form individual photovoltaic cells which are ready for use. Patent number: 6,316,283 Publication ah November 13, 2001 Inventors: Eric Saurer Process for producing a thin-film solar module Applicant: ANTEC Solar GmbH, Germany The present invention provides a process for producing a thin film solar module characterized by a scraping tool as cutting or separating means for the pn layer. The tool employed includes a flattened tip. The plane flattened surface serves as a sliding surface. In the separating process, the tool slides on the first contact layer while the sliding surface rests with its complete flattened face parallel to this layer. The longitudinal axis of the tool is case perpendicular to the contact layer, or substrate. By this design, danger of damage to the contact layer is minimized. Pressure adjustment on the tool is noncritical and without danger may be adjusted so the pn double layer is safely cut through. The tool moves in any direction, even a meander-shaped path without being axially rotated. This cutting tool avoids time consuming raising and lowering on making it possible to increase the tool life time and enhance process efficiency. Patent number: 6,319,747 Publication dzte: November 20, 2001 Inventors: Alexandra Todisco, Dieter Bonnet, Peter Dinges w Photovoltaics Bulletin February 2002

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Page 1: Process for producing a thin-film solar module

photovoltaic system. A light concentrator

photovoltaic module includes a medium having

a light receiving plane, photovoltaic elements

arranged in a spaced relationship with the light

receiving plane, and a light reflecting plane for

conducting light incident upon the light

receiving plane, but not directly received by

the photovoltaic elements to the photovoltaic

elements. The light reflecting plane has a

structure as viewed on a cross section in a plane

transverse to the module light receiving plane

and traversing two adjacent photovoltaic

elements and a light reflecting member, so that

the light reflecting plane includes at least two

first inclined planes and two second inclined

planes, the first inclined planes being right

ascending while the second inclined planes are

left ascending, and these are arranged on the

right and left sides of the middle point

respectively.

Patent number: 6323,415

Publication date: November 27, 2001

Inventors: Tsuyoshi Uematsu, Terunori

Warabisako Yoshiaki Yazawa, Yoshinori

Miyamura, Ken Tsutsui, Shinichi Muramatsu,

Hiroyuki Ohtsuka, Junko Minemura

Sub-nanoscale electronic devices

and processes ApplicantYale University, University of South

Carolina, USA

The invention is for a new generation of

electronic microcircuit technology, having

dimensions much smaller than those of

semiconductor integrated circuits, and to related

systems and processes. It meets requirements of

interconnect at atomic level, improved

conductivity and stability giving ultra-dense

electronic systems. It comprises an integrated

circuit structure of transistors; thin-film

conductor interconnects to form electronic

circuits in a predetermined electrical

configuration; and pairs of contact pads,

connected to the thin-film conductor

interconnects, each adjacent pair of contact pads

connected only by a conductive oligomer of a

precisely determined number of units. This

technology approach fits the requirements of

interconnect problems and allows self-aligned

fabrication. Among disclosed innovations are

self-aligned spontaneous assembly of chemically

synthesized interconnects, active devices, and

circuits for atomic scale electronics. The

approach utilizes an inherently self-aligned batch

processing technique addressing fabrication

limitations of conventional ULSI, providing

gain modulation through the electron wave-

function of a polymeric conductor. Radical

improvement in the economics of downsizing

electronic devices gives a more favorable cost

when in conventional technology cost per

transistor is no longer decreasing with size.

Patent number: 6,320,200

Publication ahte: November 20, 2001

Inventors: Mark A Reed, James M. Tour

Perfluorinated amide salts and their

uses as ionic conducting materials Applicants: Hydro-Quebec, Canada, Centre

National de la Recherche Scientifique, France

The invention concerns ionic compounds in

which the anionic load has been delocalized. A

compound is comprised of an amide or one of

its salts, including an anionic portion combined

with at least one cationic portion M.sup.tm in

sufficient numbers to ensure overall electronic

neutrality; the compound is further comprised

of M as a hydroxonium, a nitrosonium

NO.sup.+, an ammonium --NH.sub.4 t, a

metallic cation with the valence m, an organic

cation with the valence m, or an organometallic

cation with the valence m. The anionic portion

matches the formula R.sub.F S0.sub.x N.sup.

Z, wherein R.sub.F is a perfluorinated group, x is

1 or 2, and Z is an electroattractive substituent.

The compounds can be used notably for ionic

conducting materials, electronic conducting

materials, colorants, and the catalysis of various

chemical reactions.

Patent number.6,319,428

Publication date: November 20, 2001

Inventors: Christophe Michot, Michel Armand,

Michel Gauthier, Yves Choquette

Moldless semiconductor device and

PV device module Applicant: Canon, Japan.

This invention is for a semiconductor device,

more particularly a moldless semiconductor

device, not covered with any mold resin and a

photovoltaic device module, a solar cell module

and a construction material which make use of

the moldless semiconductor device as a bypass

diode. A moldless semiconductor device

comprising a semiconductor chip held between

outer-connecting terminals and connected

electrically to the terminals is provided. At least

one of the two terminals has, at its region

contiguous to the semiconductor chip, a hardness

different from all other regions of the one

terminal. This moldless semiconductor device can

withstand significant external force and exhibits

high reliability used in photovoltaic device

modules. The moldless semiconductor device has

achieved a very thin structure and made it possible

to be incorporated in photovoltaic devices with

ease and to use resin in a small quantity when

sealed with the resin. It provides semiconductor

devices which are tough to torsion, bend and

impact, even though they are moldless and can

solve prior art problems.

Patent numbex6,316,832

Publications date: November 13, 2001

Inventors: Koji Tsuzuki, Tsutomu Murakami,

Satoru Yamada, Yoshifumi Takeyama, Koichi

Shimizu

Batch manufacturing method for

photovoltaic cells Assignee: As&b SA (Swatch Group) Switzerland

The invention concerns a manufacturing

method for photovoltaic cells and in

particularily a method for the batch

manufacture of a plurality of such cells. The

industrial scale batch manufacture of this type

of ell is relatively recent and has for a long time

been limited by the absence of appropriate cell

manufacturing techniques. The invention

includes providing at least one strip of

conductive material, cutting in succession

substrates, having the shape and the

dimensions of the desired cells replacing the

cut substrates in the strip, depositing semi-

conductor materials, forming at least one n-i-p

or p-i-n junction on one of the faces of the

strip, depositing a transparent layer of

conductive material on top of the semi-

conductor materials, removing from the strip,

the cut substrates coated with semi-conductor

materials and the upper electrode to form

individual photovoltaic cells which are ready

for use.

Patent number: 6,316,283

Publication ah November 13, 2001

Inventors: Eric Saurer

Process for producing a thin-film

solar module Applicant: ANTEC Solar GmbH, Germany

The present invention provides a process for

producing a thin film solar module characterized

by a scraping tool as cutting or separating means

for the pn layer. The tool employed includes a

flattened tip. The plane flattened surface serves

as a sliding surface. In the separating process, the

tool slides on the first contact layer while the

sliding surface rests with its complete flattened

face parallel to this layer. The longitudinal axis of

the tool is case perpendicular to the contact

layer, or substrate. By this design, danger of

damage to the contact layer is minimized.

Pressure adjustment on the tool is noncritical

and without danger may be adjusted so the pn

double layer is safely cut through. The tool

moves in any direction, even a meander-shaped

path without being axially rotated. This cutting

tool avoids time consuming raising and lowering

on making it possible to increase the tool life

time and enhance process efficiency.

Patent number: 6,319,747

Publication dzte: November 20, 2001

Inventors: Alexandra Todisco, Dieter Bonnet,

Peter Dinges

w Photovoltaics Bulletin February 2002