Printed Circuit Board Inspection & Quality Control · Bottom of via hole 0.010” Via hole capture pad 0.020” What is Pad Cratering Pad cratering is the partial or complete separation

Printed Circuit Board Inspection& Quality Control

Bob Willis

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FREE Electronics Academy Webinar Series

The Electronics Academy Webinar Series takes an in‐depth look at the issues affectingPCB/SMT assembly and the challenges of achieving Zero Defect Manufacture. Understandthe common causes of solder joint failure and learn how to identify and rectify processdefects – improving quality and reducing costs

Learn expert tips to identify quality issuesUnderstand the common causes of process failuresA convenient and quick way to update your skills

In the future have access to a video library of online training sessions

Electronics Academy Webinar Series

Inspection of Conductive Adhesive Joints2.30pm GMT Thursday 10th November

Future webinars may cover

Bare PCB inspection

Solder paste and stencil inspection

Crimp connector and wire inspection

Component inspection and recognition

Microsection inspection

Inspection of conductive adhesive joints

Inspection of underfill and staked components

Destructive solder joint assessment and inspection

Register on line at http://www.visioneng.com/electronics‐academy‐webinar‐series

Bob Willis

Bob Willis has been involved with the introduction and implementation of lead-free process technology for the last seven years. He received ASOLDERTEC/Tin Technology Global Lead-Free Award for his contribution to the industry, helping implementation of the technology. Bob hasbeen a monthly contributor to Global SMT magazine for the last six years. He was responsible for co-ordination and introduction of the Firstseries of hands-on lead-free training workshops in Europe for Cookson Electronics during 1999-2001. These events were run in France, Italyand the UK and involved lead-free theory, hands-on paste printing, reflow, wave and hand soldering exercises. Each non commercial eventprovided the first opportunity for engineers to get first hand experience in the use of lead-free production processes and money raised fromthe events was presented to local charity. More recently he co-ordinated the SMART Group Lead-Free Hands On Experience at NepconElectronics 2003. This gave the opportunity for over 150 engineers to process four different PCB solder finishes, with two different lead-freepastes through convection and vapour phase reflow. He also organised Lead-Free Experience 2, 3 + 4 in 2004-2006.

He has also run training workshops with research groups like ITTF, SINTEF, NPL & IVF in Europe. Bob has organised and run three lead-freeproduction lines at international exhibitions Productronica, Hanover Fair and Nepcon Electronics in Germany and England to provide aninsight to the practical use of lead-free soldering on BGA Ball Grid Array, CSP Chip Scale Package, 0210 chip and through hole intrusivereflow connectors. This resulted in many technical papers being published in Germany, USA and the United Kingdom. Bob also defined theprocess and assisted with the set-up and running of the first Simultaneous Double Sided Lead-Free Reflow process using tin/silver/copper forreflow of through hole and surface mount products.Bob also had the pleasure of contributing a small section to the first Lead-Free Soldering text book “Environment - Friendly Electronics: Lead-Free Technology” written by Jennie Hwang in 2001. The section provided examples of the type of lead-free defects companies mayexperience in production. Further illustrations of lead-free joints have been featured in here most recent publication “Implementing Lead-FreeElectronics” 2005. He has helped produce booklets on x-ray inspection and lead-free defects with DAGE Industries, Balver Zinn and SMARTGroup

Mr Willis led the SMART Group Lead-Free Mission to Japan and with this team produced a report and organised several conferencepresentations on their findings. The mission was supported by the DTI and visited many companies in Japan as well as presenting a seminarin Tokyo at the British Embassy to over 60 technologists and senior managers of many of Japans leading producers. Bob was responsiblefor the Lead-Free Assembly & Soldering "CookBook" CD-ROM concept in 1999, the world’s first interactive training resource. Heimplemented the concept and produced the interactive CD in partnership with the National Physical Laboratory (NPL), drawing on the manyresources available in the industry including valuable work from NPL and the DTI. This incorporated many interviews with leading engineersinvolved with lead-free research and process introduction; the CD-ROM is now in its 3rd edition.

Find out more at:Bobwillis.co.uk

Printed Circuit Board Defects

Printed Circuit Board Defects

PCB Manufacturing Reference Books

PCB Manufacturing Reference Books

IPC Specification Documents

IPC 600 J

IPC Specification Documents

Specifications for solderable surface finish

PCB

PCB

PCB

Plated Through Hole Manufacture

PCB

PCB

PCB


Blind via hole


Buried via hole


What is your most CommonPCB problem?

Traditional Sulphur Free Tissue Paper

Outer packaging to provide protection to the boards and tissue paperinterleaved between boards to prevent surface damage to solder mask, legendink and solder pad surfaces. These techniques are still used but vacuumsealed is the most common standard offered

Pink Poly or Other Packaging

Moisture Barrier Bag

Bags available with and without zip lock.Also the barrier material can be providedin roll format with a sealing unit toproduce custom sized bags

PCB Mechanical Inspection


Measurement of bow and twist on a flat surface


Copper through hole measurement using eddy current principle, typical throughhole thickness would be 25 - 35um of copper

Optical Inspection Systems

Optical Inspection Systems


Routing of the printed boardmay be designed to assist thehandling of the board duringassembly to give two parallelsides

V Score or Routing



Solder Mask Thickness

Solder Mask Thickness

Agree specification with supplier for mask thickness and variation on the surface of the panel

Make sure the solder mask or supplier is not changed and better to specify the product if you want to avoid solder ball problems and conformal coating adhesion issues

Solder Mask Undercutting

Solder Mask Lifting

Adhesion Testing (Tape Test)

Tape testing is all about the bond to the base material, normally solder mask and not necessarily a test of thecoating material’s performance. Different solder masks formulation may give varying results ASTM D3359

Printed Board Quality Control

Dyne pen testing of solder mask for compatibility with conformal coating. Coating suppliers willrecommend the surface tension range for a product. The mask should be within this range andthe assembly process should not cause significant changes to the mask


Dyne pen testing of solder mask over copper and laminate surfaces, the video shows thewetting of the fluid on the surface


IPC-TM-650 2.4.27.2, called by IPC SM-8404B-3B-2B-HB-F-H-2H-3H-4H-5H-6H

NPL report MAT5 cv Solder Mask Testing is available free to download via the NPL DefectDatabase at http://defectsdatabase.npl.co.uk

Printed Board Markings

Date of PCB manufacture will be marked on the surface of the board in the legend, formed in the solder mask or on the copper surface under the solder mask. This is preferred as its most representative of the date of manufacture

What IPC bare board classdo you specify?


X-Ray Inspection

X-Ray Non Destructive Inspection

Good example of 0.2mm holes being examined using x-ray inspection, the incomplete platingis very easy to see in this 3.8mm thick board as indicated by the arrow. The linked test chainwas used for through vias and blind vias during the introduction of lead-free processing inearly 2004 with no failures other than this plating issue

Blind Via PCB Examination In Process

Close up of the PCB surface copper after drilling and prior to metallisation to make the interconnection to the capture pad

Via Too Deep to Image Successful

SEM examination would also not be possible due to the depth of the hole. Most PCB produces also don’t have SEM

Grind Down PCB Sample Closer to Pad

Close up of the PCB surface copper after drilling and prior to metallisation to make the interconnection. The sample has beenground down to reduce the step height between the capture pad and the top of the laminate, it is possible to grind down closer tothe copper pad surface

Ultrasonic Clean Sample in IPA

Surface of the Capture Pads at High Magnification

Printed Board Assembly Featuring Blind Via Holes

Grind the PCBto just below

the capture pad

If open circuits are suspected on blind vias this is a way to look at the interface of the capture pad and copper plating. Often there is great debate on what is good and bad, failure or not. Often it is difficult to see the interface or conduct analysis of the interfaces.

Printed Board Assembly Featuring Blind Via Holes

Capture pad & track can then be peeled

from the base ofthe via hole

The image shows the track and pad with thin layer of resin still belowthe copper foil prior to peeling the copper from the laminate and via.With care you can still continue to grind with 800-1000 grit paperto just touch the copper surface which reduces the strain on thecopper during peeling, you must not expose the base of the via barrel

Blind Via Connection to Inner layer

Bottom of via hole 0.010” Via hole capture pad 0.020”

What is Pad Cratering

Pad cratering is the partial or complete separation of the copper termination pad, typically seen on area arraydesigns after mechanical strain has been applied. This failure is different to pad lifting when heat is appliedduring rework. However pad cratering has been reported on board assemblies with large BGA packages directlyafter reflow soldering and assumed to have occurred during cooling

Pad lifting has also been seen on boards which have been reworked but this may be due to pop corning ofdevices. In this case the copper pads were retained on the solder sphere and separated from the PCB. It iseasier to see pad cratering on area array devices with optical inspection than x-ray although pad separation andtrack breaks have been investigated by the author and Dave Bernard with x-ray in one of their technical papers

PCB Pad Cratering

Copper needles provide greater surface adhesion to the laminate surface but this in turnmay impact electrical performance of the laminate on multilayer designs. It’s a balancebetween mechanical and electrical performance. The hardness of the epoxy and thesolder alloy increases the possibility of separation

PTH/Surface Mount Pad Surface

Tin

Silver

Nickel gold pad


Copper OSP – Organic Surface Protector


Solder Levelled

0201 0.4mm CSP 0.5mm QFP

What surface finish do you mainly use?


Nickel/gold foot is an unusual formation that canlead to shorts or reduction in surface insulation.The photograph shows a gold hallow around thesurface mount pads. Nickel has plated onto thesurface of the laminate and the edge of the soldermask. This has also allowed gold to coat thesurface of the nickel reducing the design gap

Microsectioning of the nickel/gold foot clearlyshows the plating defect. The nickel can be seento extend from the bottom of the pad across thelaminate and up the solder mask wall

Silver Finish Voiding

Printed Circuit Boards

Solderability Test MethodsTest A - Edge Dip Test (for surface conductors and attachment lands only)

Test B - Rotary Dip Test (for plated-through holes, surface conductors and attachment lands, solder source side)

Test C - Solder Float Test (for plated-through holes, surface conductors and attachment lands, solder source side)

Test D - Wave Solder Test (for plated-through holes, surface conductors and attachment lands, solder source side)

Test E – Surface Mount Process Simulation Test

Along with the solderability method, the user shall specify as part of the purchase order agreement, the required coating durability. The following are guidelines for determining the needed level of coating durability, not product performance classes. Accelerated aging and solderability testing shall be performed per ANSI/J-STD-003.

Solderability Test Method

Rotary Dip or Float Testing

Solderability Testing with Wetting Balance

Solderability Testing with Wetting Balance

Two solderability tests conducted on a wetting balance, the first shows good wetting the second exampleshows slower wetting. The direct measurement of the wetting force is recorded during test and thendisplayed as a wetting force graph against time

Wetting Balance Solderability Testing

Wetting Balance Solderability Testing

Solder Spot Wetting Test Pattern

In the design we use six 0.020" parallel tracks on a 0.040" pitch, track and gap are 0.020” and areapproximately 0.900" long. The gang solder mask image has a clearance of 0.010” around thepattern. The pattern should be placed on both sides of the board or both sides of a multi panel on thebreak-out scrap area

Solder Spot Wetting Test Pattern

BGA

+

BGA

CSP

CSP

BGA

+

BGA

CSP

CSP

BGA

+

BGA

CSP

CSP

BGA

+

BGA

CSP

CSP

Impact on PCB Solder Finishes

from NPL Lead-Free Workshops

Solder Pattern Reflow

Reflow on gold surface good Reflow on gold surface poor

Reflow on OSP surface poor

Check position of plated through hole centre line during sectioning of the samples

Microsection Inspection

Microsection preparation requires experience and time there are no shortcuts if you want all the information to allow correct interpretation of your results. Two examples of a plated through via 0.2mm after lead-free process trials and then temperature cycling of the board over 1000 cycles must show up some changes

Microsection Inspection

Inner Layer Separation

Another example of inner layer separation from the through hole copper plating, resin is the most likely cause preventingthe metalisation process to be effective. The resin smear would normally be seen on other positions on a sample and onthe knee of the same hole. When ever this type of failure is found and recorded its good practice to regrind themicrosections down through the hole (Red Arrow) to show the extent of the copper inner layer pad and through hole platingseparation. This is clearly seen in the example on the right

Dendrite Formation on Conductors

Copper dendrites can form between two conductors with a voltage, a moisture layer and contamination on thesurface of a board. It can also occur if the contamination comes from the environment if moisture is allowed toform and stay on the surface. A simple test method based on this illustration has been used in the industry

5-10

vol

ts

Dendrite Formation on Conductors

Cleanliness Monitoring

0.1 ug/cm2


0.1 ug/cm2


0.5 ug/cm2


1.1 ug/cm2

1 – 1.5ug/cm2 of equivalent sodium salt solution

Ion Chromatography Assessment

IPC WP 008 provides guidelines on the use of IonChromatography. The measurement technicalprovides qualitative measurement of the ion type foundon the surface of a PCB after washing the completeassembly in a test solution

Alternatively local component testing can beundertaken as shown on the authors test board,testing on BGA, PoP and QFP packages with metalwalls added by Doug Pauls

In addition a report on the use of these test methodscan be downloaded free from the Defect Databasehttp://defectsdatabase.npl.co.uk

CAF Failure in PCB

Printed board failure due to a conductive short formed on inner layers of a multilayer boards generally referred to as a CAF failure. CAF -stands for Conductive Anodic Filamentation and is related to the materials and conditions inside the board. Susceptibility of Glass-Reinforced Epoxy Laminates to Conductive Anodic Filamentation is an NPL report NPL report available free to download via the NPL DefectDatabase at http://defectsdatabase.npl.co.uk


Thermal shock testing with fluidised sand bath and water, left. Five cycles between25degC & 260degC looking for change of resistance between the cycles. Thesample holder and measuring system is shown on the right


Close up of test samples prepared for thermal shock testing, the examples are a PTH and a multilayer circuit. The fingers are used to make the connections in the test fixture for immersion into the water and band bath

Plated through hole

Multilayer board


Two coupons after testing showing different degrees of cracking at the knee of the hole. This would result in a change in resistance

Solder Joint Failures on Nickel Gold Surfaces

Poor solder joint sheer strength or ductile failures are less common but do still occur in industry. The examples show above were downduring PCB assembly and unit build. An audit of the supplier with the chemistry suppliers information show poor control of the platingprocess. In addition a simple shear test of reflowed joints allowed in process testing to gain confidence during future shipments

Pads Before/After Stripping

Examples of two surface mount pads before and after stripping, fast stripping time indicated thingold and a poor surface when inspected. It is however difficult to define the condition of the nickelsurface and possible failure of solder joints formed on these surfaces

Copper Pad Erosion with Lead-Free

Copper Pad Erosion

Although examples of copper erosion have been highlighted in the industry there is little evidence to date of this being an issue. In the caseof single sided boards the apparent erosion may have been due to preparation of the copper for OSP treatment. In this case copper is mildlyetched, excessive prep may have removed more copper around the pads as other areas of the tracking would be protected by the soldermask. Where mechanical cleaning is used and incorrectly controlled the copper can be reduced around the hole leading to a apparentcopper reduction. Further investigation of the problem and the examples circulated in the industry will be further reviewed and whereappropriate further trials conducted.

It is interesting to note that the defects highlighted have not been shown to cause failures. At first examination we would consider them allrejectable based on our existing knowledge of tin/lead joints. That knowledge is again not necessarily based on failures but the inspectioncriteria for solder joints in circulation today. Perhaps we do need to re-look at some of the visual criteria we use in industry for lead-free?

Recent trials have been conducted on selective soldering systems with lead-free alloys. In this case where the boards did have a very thincopper plating and been solder levelled with lead-free the copper removal was significant. After exposing the boards to a high temperatureduring selective soldering for an extended time copper pads were full dissolved from the surface of the board. This is not typical and shouldnot occur when a sound plated layer is present in a well controlled lead-free assembly facility. However it does demonstrate what canhappen

NPL report on Copper Dissolution is available free to download via the NPL Defect Database at http://defectsdatabase.npl.co.uk

PCB Outgassing & Blowholes

New lead-free processing and materials: old problem, same causes. Outgassing from a plated through hole board is caused bymoisture in the printed board expanding during soldering. The gas comes out of the hole as water vapour while the solder is in aliquid state. Voids are mostly seen on the base of the board because the solder has solidified first on the topside, hence theexpanding vapour has only one way to escape. The size of the voids, blowholes or pinholes are related to the amount ofescaping gas and the point at which the solder starts to solidify. Testing boards is easy with the oil outgassing test: old problem,old test and same old solution. Conducting the test shows where and how the gas escapes from holes and can show if theposition is random or on selected areas of the barrel. CD-ROM with the procedure and videos showing the test is available

Baking boards can eliminate the moisture from the board but does wonders to the solderability of new surface finishes, itdoes not necessarily get to the root cause of the problem. The most common reason is the thickness of copper in the platedthrough hole which may not be able to evenly cover poor drilling. This can also be impacted by the greater dissolution rates inlead-free assembly. The lead-free alloy also has an impact on what the joint looks like depending on if it’s non eutectic or not