Printed Circuit Board Basics 2010

8/6/2019 Printed Circuit Board Basics 2010

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Printed Circuit Board Basics

Ing. Fernando Hernndez, MBA

V 1.3 - 20010


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Designing a PCB How many routing layers and power planes are required for

functionality within the context of acceptable costs ? # layers:

Functional specification Noise immunity Signal category separations, Number of nets (traces) Impedance control Component density of VLSI circuits Routing of buses

Proper use of stripline and microstrip topology are required for RF

suppression in the PCB The use of planes (voltage & ground) embedded in the PCB is oneof the most important methods of suppressing common-mode RFinternal to the board => intrinsically contribute to reducing HF powerdistribution impedance

Minimizing lead inductance from components on the outer layers of

the PCB will reduce radiated emission effects.


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Microstrip and stripline

Microstrip Refers to outer trace(s) on a PCB, which are separated

by a dielectric material and then a solid plane.

Although microestrip techniques provide suppression ofRF energy on the board, faster clock and logic signalsare possible than with stripline

With lower capacitive coupling between two solid planes,faster signal propagation can be implemented.

The drawback of microstrip is that the outer layers of thePCB can radiate RF energy into the environment unlessone adds the protection of a plane on both sides of thisouter circuit plane.


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Microstrip and stripline

Stripline Refers to placement of a circuit plane between two solid

planeseither voltage or ground.

Provides better noise immunity for RF emissions, but itcomes at the expense of slower propagation speeds

Capacitive coupling effects on stripline topology aregenerally observed on signals with edges faster than 1ns.

Main benefit: the complete shielding of RF energygenerated from internal traces and the consequentsupression of RF radiation.


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Microstrip and stripline topologies


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Layer stackup assignmentEach and every routing layer must be adjacent to a solid plane

(power or ground).


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Two-layer boards

Two layout methodologies:

FirstOlder technologieslow speed

components: DIL in straight row or matrixconfiguration. Few use this tech today!


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Two-layer boards Configuration 1

Layer the power and ground ina grid style with the total looparea (each grid) 1,5 squareinches

Run power and circuit traces ata 90, with power on one layer,ground on the other layer

Place ground traces on the toplayer, vertical polarization.Place power traces on thebottom layer, horizontal

polarization Locate decoupling capacitors

between the power and groundtraces at all connectors and ateach IC.


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Two-layer boards Configuration 2 Commonly

used in low-freq analogdesignsrunning at less

than 10 KHz. Single-point

grounding isrecommended

High freq performance in layout for low-freq applications: For Hi freq: Control the surface impedance of all signal

traces and their return current paths For Low-freq: control topology layout rather than impedance


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Radial migration(1)

As circuits progress from high-bandwidth to low-

bandwidth areas, a slowing down of the signalpropagation delay of the traces occurs, withenhanced EMI performance at the I/O connector

(1) Technique developed by W. Michael King

Signalpropagationdelay: Deviceshave internalcapacitance and

propagationdelay


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Four-layer boards

There is only one way to perform a four-layer stackup

Use of power and ground planesenhances EMI suppresion in comparisonto that of two layers boards

However: four-layer boards are not optimalfor flux cancellation of RF currents createdby circuits and traces.


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Four-layer board stackup

First layer (componentside)

Signals and clocks

Second layer Ground plane

Third layer Power plane

Fourth layer (solder side) Signals and clocks


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Basic fundamental concepts of EMIsuppression in a PCB.

Optimal performance of extra-high-speedclock traces are achieved when they arerouted adjacent to a ground plane and

not adjacent to the power plane.

Use of the power plane as flux cancellation control may not

present an optimum condition, resulting in signal flux phase shift,greater inductance, poor impedance control, and noise instability.Use of the ground plane for optimal signal reference is thuspreferred.


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PCB flux cancellation

Multilayer boards provide superior signal quality EMCperformance:

Impedance control through stripline or microstriplines isobserved flux cancellation that minimizes (control)inductance in any transmission line.

The distribution impedance of the power and groundplanes must be dramatically reduced

These planes contain RF spectral current surges causedby logic crossover, momentary shorts, and capacitiveloading on signals with wide buses

Various logic devices may be quite asymmetrical in theirpull-up/-down current ratios: flux cancellation isenhanced between the signal and the ground planesrather than the power planes.


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PCB flux cancellation

The fundamental concept of board-levelsuppression lies in flux cancellation between RFcurrents that exist within the board traces,components, and circuits, in relation to a plane.

Power planes, due to this flux phase shift, do notperform as well for flux cancellation as doground planes.

As a result, optimal performance is achieve

when traces are routed adjacent to groundplanes rather than adjacent to power planes, asevidenced by the pull up/down ratios that areindicative of flux-phase preference.


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Six-layer board stackup

Three common configurations are used forsix-layerPCBs


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Six-layer board Configuration I

First layer (component side) Microstrip signal routing layer


Third layer Stripline routing layer

Fourth layer Stripline routing layer

Fifth layer Power plane

Sixth layer (solder side) Microstrip signal routing layer

This is commonly used with clock signal or high-frequency components


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Six-layer board Configuration II


Second layer Embedded microstrip routing layer

Third layer Ground plane

Fourth layer Power plane

Fifth layer Embedded microstrip routing layer


This arrangement offers improved performance due to increased planar

decoupling between voltage and ground four routing layers.


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Six-layer board Configuration III



Third layer Stripline routing plane, followe by fill material

Fourth layer Power plane

Fifth layer Ground plane


This offers the best performance with increased flux cancellation for all

routing layers and lower power plane impedance- three routing layers


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Eight-layer board stackup

Two types of assignments generally areemployed: First: provides minimal EMI flux cancellation.

Second: provides maximum cancellation due to useof additional solid planes and tigher flux cancellationfor RF currents

Whether to use?

Depends on the number of nets to be routed,component density (pin count), size of busstructures, analog and digital circuitry andavailable real estate.


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Eight-layer board Configuration I

First layer (component side) Microstrip routing signal layer

Second layer Embedded microstrip routing signal layer

Third layer Ground plane

Fourth layer Stripline routing signal layer

Fifth layer Stripline routing signal layer

Sixth layer Power plane

Seventh layer Embedded microstrip routing signal layer

Eighth layer (solder side) Microstrip routing signal layer

This is not an optimal stack-up scheme due to poor flux cancellation on signal planesand poor power impedance. It employs six routing layers and two planes.


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Eight-layer board Configuration II



Third layer Stripline signal routing layer

Fourth layer Ground plane

Fifth layer Power plane

Sixth layer Stripline signal routing layer

Seventh layer Ground plane

Eighth layer (solder side) Microstrip signal routing layer

This is a preferred stack-up scheme due to tight flux cancellation of RF currents. Ituses four routing layers and four planes.


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20-H Rule (defined by W. Michael King) RF currents exist on the edges of power planes

due to magnetic flux linkage. This interplanecoupling is calledfringing and it is generallyobserved only on very high-speed PCBs.

When using high-speed logic and clocks, powerplanes can couple RF currents to each otherand thus radiate RF energy into free space.

To minimize this coupling effect, all powervotage planes must be physically smaller thanthe closest ground plane per the 20-H roule.


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20-H Rule

Use of the 20-H Ruleincreases the intrinsicself-resonant

frequency of the PCB


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Implementing the 20-H rule

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Printed Circuit Board Basics 2010