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This document is owned by Agilent Technologies, but is no longer kept current and may contain obsolete or

inaccurate references. We regret any inconvenience this may cause. For the latest information on Agilent’s

line of EEsof electronic design automation (EDA) products and services, please go to:

www.agilent.com/fi nd/eesof

Agilent EEsof EDA

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Presentation on Serial Link Simulation using ADS

HUAWEI TECHNOLOGIES CO., LTD.Page 1

Serial link Simulation using

Advanced Design System

Serial link Simulation using

Advanced Design System

Page 2

Serial Link Challenge • Analog Components in a Serial Link

– Interconnects • Modeling impedance mismatch, crosstalk, dispersion, dielectric losses

– Frequency domain models derived from simulation or measurements

– I/O Models• IBIS and non-linear transistor level models

• Digital Components in a Serial Link

– SERDES Models• De-emphasis• Decision Feedback Equalizer• Feed Forward Equalizer• Clock and Data Recovery• Gain Controls

Best represented in frequency domain

Best represented in time domain

Best represented in numeric domain

Accurate representation of RF, analog, and digital components using ADS

Page 3

Agenda

• High-Speed Serial Link: Design Flow

• Transmitter: Jitter Modulation, De-emphasis Modeling

• Analog Passive Channel: Interconnect Modeling

• Receiver: Jitter Modulation , Equalization Modeling

• Post-Processing: Statistical Eye, BER/Bathtub

• Validation of Results and Examples

Paper contributed by: Huang Chunxing ([email protected]),Cory Edelman ([email protected]), & Sanjeev Gupta ([email protected])

Transmitter Analog Passive Channel Receiver

Digital + Analog Analog Analog + Digital

Page 4

High-Speed Serial Link Design

Data Signal FEC & Coding Pre-emphasisRJ, DJ,DDJ,PJ Tx

Transmitter

Rx Feed Forward Equalizer

Decision Feedback Eq.

CDR

Receiver

1. Component designer – Ensures that

components meet jitter budget specifications

2. Link Architect – Link jitter analysis, BER, De-

emphasis, FFE, DFE

Statistical post processing

Analog Passive Channel

Page 5

High Speed Serial Link - Design Flow

MATLAB Co-simulation in ADS

Transmitter

Analog Channel

Receiver

Page 6

Why Huawei used ADS?A time-domain simulator that accurately finds the response of frequency-domain measurements and models – how channels are characterized

ADS 2006 Update 1 has a new, exclusive, patent-pending simulator that accurately

predicts time domain response directly from multi-port S-parameter models

A link-level tool that can model equalizers and pre-emphasis, analog channel, and verify performance by analyzing jitter

ADS Ptolemy supports RF and DSP co-simulation. ( mixed signal simulation)

Deterministic jitter is bounded and may be simulated within an acceptable time

Co-simulation with external tools

ADS supports MATLAB co-simulation

Able to use fast behavioral driver, buffer and receiver models

ADS 2006 Update 1 supports IBIS models

Page 7

DCD: amplitude of nominal eye crossing is other than the 50% level

Data CorrelatedTJ(t)=RJ(t) + PJ(t) + DDJ(t)+…

Transmitter - Jitter Component

Data Un-Correlated

Transmitter Digital + Analog

ISI: largest of the difference between the earliest falling/rising edge and latest falling/rising edges.

DDJ: difference in the position of the earliest edge (rising or falling) and the latest (rising or falling) edge.

Page 8

Transmitter Modeling - Jitter ModulationUsing Voltage Controlled Delay to add jitterTransmitted jitter includes Periodic Jitter or PJ, and Duty Cycle Distortion or DCDRandom Jitter or RJ will be considered in statistical post-processing

∑=

+=N

iiiitotal twAtPJ

0

)cos()( θSinusoidal Source

DCD

Pattern Generator Voltage ControlDelay

)]2/()2/([*5.0 WxWxDCD ++−= δδ

Signal with jitter

Page 9

Transmitter Modeling – De-emphasisPre-distortion of a digital signal to compensate for high frequency losses in a channel

Both pre-emphasis and de-emphasis could be expressed as Finite Impulse Response or FIR filter

0 0.1 0.2 0.3 0.4 0.50

0.5

1

1.5

2

2.5

3

3.5

4Frequency Response

Normalized

dB

Page 10

High-Speed Serial Channel Components

Transmitter Analog Passive Channel Receiver

• Connectors• Line-cards• Backplane

Page 11

Serial Link- Channel Representation

S-Parameter

• Measurement-based models – Network Analyzer + • Physical models – EM solution of Maxwell’s equations +• Analytical models – closed form representation

+

+

Page 12

Channel ModelsChannel models, including forward response and crosstalk, are usually best expressed using S-parameters

ADS provide accurate time domain simulations directly from S-parameter/Touchstone files obtained from Network Analyzer measurements or EM solvers

Channel Impulse response:Derived from direct S-parameter simulation using ADS High FrequencySPICE

Comparison of S-Parameters derived from the impulse response of ADS SPICE simulator with original data

Analog Passive Channel Analog

Page 13

ADS Ptolemy for Serial Link AnalysisFebruary, 2007Page 13

Co-Simulation in ADS ( Analog/Digital Mixed Signal Simulation) (Molex 10Gb Backplane)

Page 14

Receiver Modeling- EqualizationThe Impulse Response h(t) embodies all of the

information contained in a circuit element.

To obtain the optimum tap coefficients, we need to

invert the process:

δ (t) h(t)

h(t) e(t)Equalizer

Delay . . .Delay

+

x x x x

Transmission path

Page 15

Receiver Modeling - Linear Feedforward Equalizer (LFE)

Delay . . .Delayr(n) r(n − 1) r(n − 2) r(n − (N-1))

+

x xTap0 Tap1 xTap2 xTapN-1

e(n)

“Taps” are the corrections the equalizer uses to open the eye• A weight is applied to N-1 preceding bits to correct

the current bit…

∑−

=

−=1

0

)()()(N

k

knrkfne

f(k) are the LFE taps, an LFE “filter”

∑−

=

−=1

0

)()(N

kk knrTapnegives or

Page 16

Decision Feedback Equalizer

M tap Feedbackb(n-τ)

N tap LFEf(n)

SymbolDetector

r(n) + e(n)+

Delay, τ

LFE taps are tuned to 1. remove ISI over N pre-cursors and 2. to minimize noise gain, f∗fThe M feedback taps, b(n), cancel the residual post-cursor ISI

after the LFE.

Page 17

Decision Feedback Equalizer

LFET . . .Tr(n) r(n − 1) r(n − 2) r(n − (N-1))

+x xf(0) f(1) xf(2) xf(N-1)

++

−Feedback filter

T T . . .s(n) s(n−2)s(n−1) s(n−(Μ−1))

x x x xb(0) b(1) b(2) b(M−1)

+

e(n)

Delay, τ

SymbolDetector

^ ^ ^ ^

ADS

Page 18

Equalizer- Algorithms

Algorithm calculates the optimal sampling point and equalizer coefficients

LMS adaptive algorithm

The LFE taps are set to maximize the eye-opening.Optimization techniques seek to determine the maximum of a function…The problem:

Find values for fn to minimize the function

Zero Forcing algorithm

Solve the following N-equations

( )21

0

2 )()()()()( ∑ ∑∑ ⎥⎦

⎤⎢⎣

⎡−−=−

=n

N

knknrkfnsnens

0)()()(

0)0()()0(

1

0

1

0

=−−

=−−

=

=

N

k

N

k

kNrkfNs

krkfs

M

See William Press, Numerical Recipes, Chapter 10

But zero forcing • does not give the best SNR • is not unique

Page 19

Equalization Type

∑−

=

−=1

0)()()(

N

kknrkfne

• Non-adaptive EqualizersTaps coefficient are fixed

• Adaptive EqualizersAdaptive equalizers adjust their taps on the fly

Argument for including a known training pattern in the protocol

Training pattern the ideal decision assumption is true There are many proprietary adaptive equalizers without trainingsequences: “blind equalizer.”

Page 20

Decision Feedback Equalization (Non Adaptive)

DFE

Page 21

Decision Feedback Equalization - Adaptive

DFE

Analog Channel

Training Sequence

Page 22

DFE – 1 Sample per Bit

DFE is decision feed-back equalizer

Page 23

Continuous-Time Equalizer

CTE stands for continuous time equalizer. A CTE model is an ideal circuit that

can adjust zeros and pole positions to get the desired frequency response.

As with FFE, CTE has a noise gain problem. CTE with only one pole and

one zero can be expressed by the following equation:

This is typically implemented in the analog domain.

)()()(

0

0

0

0

pszs

zpafHCTE +

+=

Page 24

Determining Link Performance – Statistical Post Processing

Calculate Forward channel PDF:

1. Interpolate through response to sufficiently

small time interval

2. Overlap each bit in one Unit Interval (UI)

range

3. At each UI sampling point, compute PDF

of Overlapping data.

Zero

Amplitude PDF at each point

Why statistical post processing?

• Predict BER performance with minimal bit pattern

Page 25

Statistical Post Processing - Random Jitter Effects on Link Performance

Zero

Amplitude PDF at each point

Signal PDF

Random Jitter distribution

Overall PDF

∫∞

∞−

⋅+= υυυττ dPISIPISIP RJ )(),(),(

2

2

2

21 σ

σπ

t

RJ eP−

=

Page 26

Statistical Post-Processing Using MATLAB®

Co-simulation in ADSStatistical Eye “StatEye”

Statistical eye is a set of probability contours

Horizontal axis is with respect to sampling point

Vertical axis is with respect to signal amplitude

Different colored lines represent BER

MatlabSinkM6

NumberOfFirings=1MatlabWrapUp=""MatlabFunction=""MatlabSetUp=""DeleteOldFigures=YESScriptDirectory=""

MatlabCx_MM1

MatlabWrapUp=""MatlabFunction=""MatlabSetUp=""DeleteOldFigures=YESScriptDirectory=""

Matlab_MM8

MatlabWrapUp=""MatlabFunction=""MatlabSetUp=""DeleteOldFigures=YESScriptDirectory=""

MatlabSinkFM7

NumberOfFirings=1MatlabWrapUp=""MatlabFunction=""MatlabSetUp=""DeleteOldFigures=YESScriptDirectory=""

MatlabFCx_MM2

MatlabWrapUp=""MatlabFunction=""MatlabSetUp=""DeleteOldFigures=YESScriptDirectory=""

MatlabF_MM3

MatlabWrapUp=""MatlabFunction=""MatlabSetUp=""DeleteOldFigures=YESScriptDirectory=""

Page 27

Bathtub

Intercept through statistical eye along horizontal axis to get horizontal Bathtub at definite voltage

Intercept through statistical eye along vertical axis to get vertical Bathtub at definite sampling time

Horizontal

Vertical

Statistical Post-Processing Using MATLAB®

Co-simulation in ADS

Page 28

Simulated vs. Measured

Validation of Simulation Results– Using Agilent N4903 J-BERT signal generator; 86100C Infinium wideband scope

– N4903 internal random jitter (RJ) used in all cases shown

0.010 Unit Interval RJ 0.015 Unit Interval RJ

Page 29

Validation of Simulation Results (2)

0.05 Unit Interval PJ, .011 RJ 0.015 Unit Interval PJ, .018 RJ

Simulated vs. Measured

Page 30

Example - Channel pre-simulation

Assumed conditions:

10Gbps NRZ, PRBS 23, 100000 bits, amplitude 800mvpp, Tr(f) = 24ps

0.15UIpp DJ = 0.05UI DCD+0.1UI PJ, 0.15UIpp RJ @10-12BER

BER = 1e-12 (2*Q=14.069)

3-tap de-emphasis, 5-tap DFE

Slice voltage: 10mV

Forward Channel Insertion Loss: Eight crosstalk channels:

Page 31

Example - Channel pre-simulation

Time Offset (UI)

Am

plitu

de

Statistical Eye=0.028, Width=0.222

0 0.2 0.4 0.6 0.8 1-0.2

-0.15

-0.1

-0.05

0

0.05

0.1

0.15

1

2

3

4

5

6

7

8

9

10

11

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1-12

-10

-8

-6

-4

-2

0

Time Offset (UI)

BE

R

Bathtub at threshold=0.010

Simulation results:

28mv eye-height

0.222UI eye-width

This indicates that the channel could support 10Gbps data transmission

Page 32

ADS2006 Update 2 will provide root cause analysis of jitter problems

• Provides confidence that the BER simulation results will match the measured performance.

• Provides jitter diagnosis, which can reduce the product development cycle from weeks to hours.

• Allows the designer to systematically tweak the link for best performance by understanding the underlying issues

Going Forward…

““ADS is the only commercially available EDA product that

provides jitter diagnosis and results that can be trusted”

Page 33

Jitter Analysis Capability in ADS2006 Update 2

-1.0E-11-8.0E-12-6.0E-12-4.0E-12-2.0E-120.02.0E-124.0E-126.0E-128.0E-12

-1.2E-11

1.0E-11

100

200

300

400

0

500

indep(TJHist)

TJHi

st

-8.0E-12-6.0E-12-4.0E-12-2.0E-120.02.0E-124.0E-126.0E-128.0E-12

-1.0E-11

1.0E-11

20406080

100

0

120

indep(RJPJHist)

RJPJ

Hist

-4E-13

-2E-13

0 2E-13

4E-13

-6E-13

6E-130.2

0.4

0.6

0.8

0.0

1.0

indep(DDJHist)

DDJH

ist

indep(DDJFHist)

DDJF

Hist

indep(DDJRHist)

DDJR

Hist

DDJ Composite Histogram-1.0E-11-8.0E-12-6.0E-12-4.0E-12-2.0E-120.02.0E-124.0E-126.0E-128.0E-12

-1.2E-11

1.0E-11

100

200

300

400

0

500

indep(TJHist)

TJHi

st

indep(RJPJHist)

RJPJ

Hist

indep(DDJHist)

DDJH

ist

Composite Histogram

Page 34

Bathtub and Q Plots ADS2006 Update 2

0.2 0.4 0.6 0.80.0 1.0

1E-13

1E-9

1E-5

1E-1

1E-17

3E-1

UI

BTDa

taBT

Mdl

0.2 0.4 0.6 0.80.0 1.0

-10

-8

-6

-4

-2

-12

0

UI

BTQD

ata

BTQM

dl

TJpp

3.319E-11

RJrms

2.057E-12

DJdd

3.860E-12

PJdd

3.799E-12

PJrms

1.635E-12

ISIpp

3.248E-13

DCD

3.458E-14DDJpp

3.248E-13

Page 35

Overcoming the Serial Link Design Challenge Using ADS

• Analog Components in a Serial Link– Interconnects

• Modeling impedance mismatch , crosstalk, dispersion, dielectric losses– Frequency domain models derived from simulation or measurements

– I/O Models• IBIS and non-linear transistor level non linear models

• Digital Components in a Serial Link

– SERDES Models• De-emphasis• Decision Feedback Equalizer• Feed Forward Equalizer• Clock and Data Recovery• Gain Controls

Best represented in frequency domain

Best represented in time domain

Best represented in numeric domain

Accurate representation of RF, analog, and digital components using ADS

Page 36

Summary:Introduced: Serial Link Design and Verification Design Flow

The basic methodology of statistical eye simulation in ADS has been presented

ADS is shown to be an ideal platform to realize statistical eye simulation:

Jitter Modulation at transmitter

Forward channel, crosstalk channel models

Include pre-emphasis or de-emphasis

Equalizers: Adaptive LFE, DFE

Statistical post-processing: StatEye, Jitter separation, BER bathtub

Presented: A brief overview of new jitter analysis capabilitiesin ADS

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Printed in USA, May 25, 2007 5989-9590EN