PRELIMINARY DATASHEET - OMMIC

PRELIMINARYDATASHEET

CGY2170YUH/C16-bit X-Band Core Chip

DESCRIPTION

The CGY2170YUH is a high performance GaAs MMIC T/R 6–bit Core Chip operating in X-band. It exhibits 3 RF ports including 3 switches. It includes a 6-bit phase shifter, a 6-bit attenuator, and switches. It has a phase shifting range of 360° and a gain setting range of 31,5 dB. It covers the frequency range from 8 to 12 GHz and provide 6dB of gain at 10GHz. It can be used in Radar, Telecommunication and Instrumentation applications.

The on-chip control logic with serial input register minimizes the number of bonding pads and greatly simplifies the interfacing to this device.

This die is manufactured using OMMIC’s 0.18 µm gate length ED02AH PHEMT Technology. The MMIC uses gold bonding pads and backside metallization and is fully protected with Silicon Nitride passivation to obtain the highest level of reliability. This technology has been evaluated for Space applications and is on the European Preferred Parts List of the European Space Agency.

APPLICATIONSRadarTelecommunicationInstrumentation

FEATURES

Operating Range : 8 GHz to 12 GHz Gain Tx/Rx : 6 dB @ 10 GHz RMS Phase Error ≈ 3.0° at 9-10 GHz RMS Amplitude Error ≈ 0.4 dB from 8-11 GHz Output P1dB Tx ≈ +11 dBm Output P1dB Rx ≈ +11 dBm S11 & S22 < -17 dB @ 10 GHz (all states) Total Power Consumption ≈ 0,36 W Chip size = 4700 x 3800 µm Tested, Inspected Known Good Die (KGD) Samples Available

Bloc diagram of the CGY2170YUH

Website : www.ommic.comOMMIC

2, Chemin du Moulin – BP. 1194 453 Limeil-Brévannes – FRANCE

Email : [email protected]

Preliminary DatasheetCGY2170YUH/C1

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LIMITING VALUES

Tamb = 25 °C unless otherwise noted

Symbol Parameter Conditions MIN. MAX. UNIT

VDN Positive supply voltage -1 +5 VVSN Negative supply voltage -5 +1 VVss Digital negative supply voltage -6 0 VVg1,2,3 Gate supply voltage -2.5 0 VVD1,2,3 Drain supply voltage 0 +6 VDIN, CLK and LE Digital data input -1 +7 VPIN Input power +25 dBmTj Junction temperature +150 ° CTstg Storage temperature -55 +150 ° C

THERMAL CHARACTERISTICS

Symbol Parameter Value UNIT

Rth(j-a) Thermal resistance from junction to ambient (Ta = 25 °C) TBD ° C/W





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CHARACTERISTICS

Tamb = 25 °C – Typical RF Performance are given at 10 GHz unless otherwise noted. Min and Max values are given for all the 8-12 GHz frequency band.

Symbol Parameter Conditions MIN. TYP. MAX. UNIT

DC SuppliesVDN Positive supply voltage 2.5 3 3.5 VVSN Negative supply voltage -2.5 -3 -3.5 VVss Digital negative supply voltage -3 V

VG1,2,3 Gate supply voltage Should be left open -1 -0.8 0 V

VD1,2,3 Drain supply voltage 2,5 3 3,5 VRF Performance at 10 GHz unless otherwise specifiedBW Bandwidth 8 12 GHz

G Gain Tx/ Rx 55.8 @ 8GHz

7,5 dB6 @ 10GHz6.5 @ 12GHz

NF Noise Figure at reference state TBD dBS11, S22 Input reflection coefficients (all states) -20 -15 -12 dBISO Switches isolation 35 dBATTRange Attenuation range 31.5 dB

ATTerror (RMS)

RMS Attenuation Error wrt the 64 Attenuation States & at Reference Phase State

0.4 0.6 dB

ATTvariation Attenuation variation wrt the 64 Phase States & at Reference Attenuation State 1,2 1,5 dB

PHRange Phase range -354 °

PHerror (RMS)RMS Phase Error wrt the 64 Phase States & at Reference Attenuation State

3 @(9-11GHz) 4.5@ 8GHz°

4 @(8-12GHz)4@9-11GHz5@12GHz

PH variationPhase Variation wrt the 64 Attenuation States & at Reference Phase State

± 5 [0-24dB].±8 [24-

31.5dB] °

P1dB Output 1dB compression point 11 13 dBmTswitch Switching time 30 nsRate Serial data rate 20 > 230 Mbps

Note : The RMS value is the root mean square of the error defined as below :

_Where xi is the difference between the measured value and the theoretical value, xi is the mean value of the N xi, and σxi is the standard deviation of xi.

Caution : This device is a high performance RF component and can be damaged by inappropriate handling. Standard ESD precautions should be followed. OMMIC document “OM-CI-MV/ 001/ PG” contains more information on the precautions to take.





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ON WAFER MEASUREMENTS – S PARAMETERS

Measured on Input ports at nominal power supply voltages and at T = 25 °C.Calculated with input and output inductance of 0.5 nH to take into account the bonding inductance.





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ON WAFER MEASUREMENTS – PHASE SHIFTER RESPONSE

Measured on Input ports at nominal power supply voltages and at T = 25 °C and attenuation reference state. Calculated with input and output inductance of 0.5 nH to take into account the bonding inductance.





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ON WAFER MEASUREMENTS – ATTENUATOR RESPONSE

Measured on Input ports at nominal power supply voltages and at T = 25 °C and phase reference stateOn wafer measurements embedding 500pH of wire bonding.





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ON WAFER MEASUREMENTS – PHASE SHIFTING ERRORS

Measured on Input ports at nominal power supply voltages and at T = 25 °C.On wafer measurements embedding 500pH of wire bonding.





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ON WAFER MEASUREMENTS – ATTENUATION SHIFTING ERRORS

Measured on Input ports at nominal power supply voltages and at T = 25°COn wafer measurements embedding 500pH of wire bonding.





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DATA

Bit Number Name Reference State Value Description

B0 SD0 High Standby for Rx ST_RXB1 ST1 High 5,625°

Shifter on Tx

B2 ST2 High 11,25°B3 ST3 High 22,5°B4 ST4 High 45°B5 ST5 High 90°B6 ST6 High 180°B7 SR1 High 5,625°

Shifter on Rx

B8 SR2 High 11,25°B9 SR3 High 22,5°

B10 SR4 High 45°B11 SR5 High 90°B12 SR6 High 180°B13 AT1 High 0,5dB

Attenuator on Tx

B14 AT2 High 1dBB15 AT3 High 2dBB16 AT4 High 4dBB17 AT5 High 8dBB18 AT6 High 16dBB19 AR1 High 0,5dB

Attenuator on Rx

B20 AR2 High 1dBB21 AR3 High 2dBB22 AR4 High 4dBB23 AR5 High 8dBB24 AR6 High 16dBB25 SD1 High Standby for Tx ST_TX

CONTROL VOLTAGE (CMOS STANDARD LOGIC)

State Vmin Vmax

Low 0 V 1 VHigh +2.5 V VDN

EXTERNAL ADDITIONAL ATTENUATION CAPABILITY

To compensate process variation, two variable attenuators are inserted between phase-shifter and first amplifier. The 2 x 1dB gain adjustment is obtained with an analog voltage applied on two additionnal PAD : AT1 and AT2. The core-chip gain is 6dB for AT1=-0.9V and AT2=-0.9V.





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TIMING DIAGRAM

• The serial data input is controlled by falling edge of signal CLK and will be shift registered in 26-bit shift register and will be latched on LE rising edge and complete data update.

• The control data during transmission and receiving are saved in two independent latches. Under the control of the T/R switch pulse, the control data will control phase shifter and attenuator in Time division Multiplexer (TDM).

new data 1: SR1~SR6 for PHS;AR1~AR6 for ATT( TR=”0”,in Rx mode). new data 2: ST1~ST6 for PHS;AT1~AT6 for ATT( TR=”1”,in Tx mode).

The delay time [t1] is defined by the user. [tSD] : Tx/Rx switching time [tLD] : [tDU] data latching time

• The serial register clear function CLR is active at low level.

SWITCHES CONTROL

Tx Mode Rx Mode

Low (0V) T/RHigh (3V) T/R





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MECHANICAL INFORMATIONChip size = 3800 x 4700 µm (before wafer sawing)• DC Pads = 100 x 140 µm, spacing = 150 µm, top metal=Au• RF Pads = 90 x 90 µm, pitch = 150 µm, top metal=Au• Chip Thickness 100 µm

PIN Name Description Note CLK Clock Input(CMOS/TTL) DIN Serial data input Input(CMOS/TTL) LE Data latch enable Input(CMOS/TTL) CS Chip select Input(CMOS/TTL) T/R T/R switch pulse Input(CMOS/TTL)

STBRX RX Standby control Output(CMOS/TTL) STBTX TX Standby control Output(CMOS/TTL) Dout Serial data output Output(CMOS/TTL)

AT1 / AT2 Tuning Att. Input CLR Serial register Clear Input (CMOS/TTL)






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PAD POSITION

SYMBOLCOORDINATESX Y

DESCRIPTION

RXin 450 110 Rx inputCOM 110 2350 Com portTXout 450 4580 Tx outputGND 3630 300 GroundVD1 3630 450 Drain voltage supply 1VD2 3630 600 Drain voltage supply 2VD3 3630 750 Drain voltage supply 3GND 3630 900 GroundVG1 3630 1160 Gate voltage supply 1VG2 3630 1310 Gate voltage supply 2VG3 3630 1460 Gate voltage supply 3VSS 3630 1610 Gate voltage supplyAT2 3630 1760 Input for external control of additional attenuator 2 (1dB)AT1 3630 1910 Input for external control of additional attenuator 1 (1dB)GND 3630 2170 GroundVDN 3630 2320 Positive voltage supplyCLR 3630 2470 Clear function for registerLE 3630 2620 Data Latch enableDIN 3630 2770 Serial data inputCLK 3630 2920 ClockCS 3630 3070 Chip selectT/R 3630 3220 Tx / Rx switch VSN 3630 3370 Negative voltage supplyDOUT 3630 3520 Serial Data outputSTBTX 3630 3670 Standby Tx outputSTBRX 3630 3820 Standby Rx output

X=0, Y=0 at bottom left corner. See Mechanical Information for more details.

BLOCK DIAGRAM





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BONDING DIAGRAM AND ASSEMBLY INFORMATION

VG1 VG2 and VG3 can be used to tune currents but should be left open. The RF interfacing bond wires or ribbon should be kept as short as possible, The RF lines should be 300um wide or less to minimize discontinuities associated with the connection to the MMIC bond pads






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DEFINITIONS

Limiting values definitionLimiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information Applications that are described herein for any of these products are for illustrative purposes only. OMMIC makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

DISCLAIMERS

Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. OMMIC’s customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify OMMIC for any damages resulting from such application.

Right to make changes OMMIC reserves the right to make changes, without notice, in the products, including circuits, standard cells, and/or software, described or contained herein in order to improve design and/or performance. OMMIC assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified.

ORDERING INFORMATION

Generic type Package type Version Sort Type Description

CGY2170YUH Bare Die C1 6-bit X-band Core Chip

Document History : Version 1.2, Last Update 26/12/2012




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PRELIMINARY DATASHEET - OMMIC