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Power/Thermal Impact of Network Computing
Cisco Router Technology Symposium
Evaldo Miranda & Laurence McGarry
3
“Moore’s Law” on Processor Power “Moore’s Law” on Processor Power
Source : Intel Technology Journal, Vol 6, Issue 2
5
The Power Supply Chain
Generation Source Transmission
Data Center
Shelf/Rack System Line Card
Application Load;
Processor, DSP, Memory Graphics
100% -5% -20% (Cooling)
-10% AC/DC-10% DC-DC
~55% - Electrical Pwr
~30% - Processing Pwr
7
Trends for Power Power Delivery & Utilization for Analog Processing
• ADC bottleneck: fast & highly linear gain element.
• 50-70% of total pipeline ADC power is consumed by interstage amplifiers
A/D D/A
-
D
VresVin
STAGE 1 STAGE N-1 STAGE NS/H
R bits
Vin
2R
Redundancy (RSD arithmetic) helps tolerate large sub A/D errors
[Lewis, 1987]
“Digital calibration“ removes D/A and linear gain error by adjusting digital
weights[Karanicolas, 1993]
Pipeline ADC
8
Trends for Power Power Delivery & Utilization for Analog Processing
+ Lower Noise+ Increased Signal
Range+ Lower Power+ Faster– Nonlinear
Signal Processing used to linearize!
“Open loop“Precision Amplifier
[Murmann 03] : Open-Loop Amplification
9
SystemID
AnalogNonlinearity
DigitalInverse
Modulation
Dout,corrVin Dout
Parameters
[Iroga/Murmann] : Digital Nonlinearity Compensation
Trends for Power Power Delivery & Utilization for Analog Processing
10
Trends for Power Power Delivery & Utilization for Analog Processing
0
10
20
30
40
50
Pow
er [m
W]
[Kelly 01] [Murmann 03] [Iroga 05]
Flash
Biasing
Gm
Post-Proc.4X 16X
[Iroga/Murmann 05] : 12-b, 75-MS/s ADC implemented in 0.35um CMOS
Stage1 Power Breakdown
11
$0.01
$0.10
$1.00
$10.00
$100.00
1980 1990 2000 2010
Digital($/kgate)
Analog($/nF)
The area of digital is cut in half with every new generation
The area of analog is reduced by 20~30% with every new generation
The cost of digital is cut in half every 2~3 years
The cost of analog is cut in half every 4~8 years
Ref: Anton Bakker - Analog Devices Inc.
Moore’s Law is different for Analog and Digital
Trends for Power
13
Buck Converter I
Supply
ComputingLoad
Fault / OK Fault / OK Fault / OK Fault / OK REFREF
REFREF
PWMPWMPWMPWM
V
T
V
T
V
T
Pwr Losses
T
14
Buck Converter II
Monitor - Control - AdaptMonitor - Control - AdaptMonitor - Control - AdaptMonitor - Control - Adapt
REFREFREFREF
Supply
ComputingLoad
V
T
V
T
V
T
DPWMDPWMDPWMDPWM
Pwr Losses
Fault / OK Fault / OK Fault / OK Fault / OK
PWMPWMPWMPWM
T
15
Smart Power Chain Block Diagram
RectifierRectifier
DriversDrivers
PWMPWM
Switch Switch BridgeBridge
LC FilterLC Filter OrFETOrFET
PFC Ctrl PFC Ctrl
RectifierRectifier& PFC& PFC
POLPOL SwitchersSwitchers
POLPOL SwitchersSwitchers
LDOLDOLDOLDO
VRM for PCsVRM for PCs VRM for PCsVRM for PCs
Hot SwapHot Swap SequencersSequencers
Margining Margining
Hot SwapHot Swap SequencersSequencers
Margining Margining
BatteryBatteryChargersChargersBatteryBattery
ChargersChargers
Power Power Management Management
UnitsUnits
Power Power Management Management
UnitsUnits
Delivering Power Through InformationDelivering Power Through Information
SMBus / SST / PMBus
I2C/SMBus
Micro-ControllerMicro-ControllerMicro-ControllerMicro-Controller
Secondary-Side Secondary-Side Controller & Sync RectController & Sync Rect Secondary-Side Secondary-Side Controller & Sync RectController & Sync Rect
DriversDrivers DriversDrivers
TempTempSensor & Fan Sensor & Fan
ControllersControllers
TempTempSensor & Fan Sensor & Fan
ControllersControllers
16
Summary and Conclusions
Proliferation of computing/networking/communications applications resulting in extreme and bounded power density demands on supporting devices/systems
Falling cost of digital technology allows availability of digital techniques to optimize/improve system functions
Adaptable/reconfigurable regulators for efficient energy transfer Utilize information about the source & load Use System level management
USE YOUR “BUCK” CONVERTER EFFICIENTLY
17
Presented By:Evaldo Martins Miranda
Power & Thermal Design Manager
Laurence McGarryPower & Thermal Marketing Manager
Analog Devices, Inc.3550 North First StSan Jose – CA [email protected]@analog.com
19
Power/Thermal Impact of Network Computing Growth of fixed and mobile devices linked by a network processing voice, data and
video. Moore’s law on Power and Thermals from processors to buildings for data centers Demand for power and cooling capacity on existing data centers and server farms.
Power Management in Processors Fab processes (eg: strained silicon and low leakage oxides) Device structure (eg: 3D devices) Circuit designs (eg: voltage, frequency and body switching) Architecture (eg: multi-core and intelligent timing/scheduling/multi-tasking)
Power Management for Computing Platforms (HW Board level and Systems) Increase efficiency of passive devices and their use: Drivers, FETs, Inductors (coupled) Improve Thermal solutions: bigger heat sinks, fans, heat–pipes and liquid cooling Use Multi-phase Voltage Regulator up to 130A per processor w/ up to 20kW per rack Multiple power rails
Power Management Opportunities (Platform Systems Solutions) Remote Monitoring/Control of networked systems Balancing computing load & data handling traffic Security & Virtualization
Rethinking Power Conversion (+ Communication) Increase efficiency/utilization/reliability of platforms/racks & Reduce cooling Efficiency under varying load, ambient and fault conditions while reducing component
count and adjusting for component aging, degradation and failure prediction.
27
Redundant Server Power Supply 12V@50A (600W)
ADM1041
UPSTREAMPULSE AND
PEAK SENSING
DIFF CURRENTSENSE AND CAL
ORFETCONTROL
EEPROM,RAM, TRIM
SMBUSI2C
VOLTAGE, CURRENT,SHARE, THERMAL AND
HOUSEKEEPINGMONITORING
SOFTSTART
SHAREBUS
uC
(uC OR STANDALONE)
LOAD
PWM+PRIMARY
DRIVER
ERRORAMP
OPTO-COUPLER
CURRENTSHARE
REMOTE AND LOCALVOLTAGE SENSE