Order this document by MC34163/D

SEMICONDUCTORTECHNICAL DATA

POWER SWITCHINGREGULATORS

1 16

15

14

13

12

11

10

9

2

3

4

5

6

7

8

(Top View)

LVI Output

Voltage Feedback 2

Voltage Feedback 1

Gnd

Timing Capacitor

VCC

Ipk Sense

Bootstrap Input

SwitchEmitter

Gnd

Switch Collector

Driver Collector

PIN CONNECTIONS

Order this document by MC34163/D

DeviceOperating

Temperature Range Package

ORDERING INFORMATION

MC33163DW

MC33163PTA = – 40° to +85°C

SOP–16LDIP–16

MC34163DW

MC34163PTA = 0° to +70°C

SOP–16LDIP–16

P SUFFIXPLASTIC PACKAGE

CASE 648C(DIP–16)

DW SUFFIXPLASTIC PACKAGE

CASE 751G(SOP–16L)

1

1

16

16

1MOTOROLA ANALOG IC DEVICE DATA

The MC34163 series are monolithic power switching regulators thatcontain the primary functions required for dc–to–dc converters. This series isspecifically designed to be incorporated in step–up, step–down, andvoltage–inverting applications with a minimum number of externalcomponents.

These devices consist of two high gain voltage feedback comparators,temperature compensated reference, controlled duty cycle oscillator, driverwith bootstrap capability for increased efficiency, and a high current outputswitch. Protective features consist of cycle–by–cycle current limiting, andinternal thermal shutdown. Also included is a low voltage indicator outputdesigned to interface with microprocessor based systems.

These devices are contained in a 16 pin dual–in–line heat tab plasticpackage for improved thermal conduction.• Output Switch Current in Excess of 3.0 A• Operation from 2.5 V to 40 V Input• Low Standby Current• Precision 2% Reference• Controlled Duty Cycle Oscillator• Driver with Bootstrap Capability for Increased Efficiency• Cycle–by–Cycle Current Limiting• Internal Thermal Shutdown Protection• Low Voltage Indicator Output for Direct Microprocessor Interface• Heat Tab Power Package

16

9

10

11

12

13

14

15

8

7

6

5

4

3

2

Control Logic and Thermal

Shutdown

LVI

OSC

++–

VoltageFeedback 2

VoltageFeedback 1

Gnd

TimingCapacitor

VCC

Ipk Sense

BootstrapInput

SwitchEmitter

Gnd

SwitchCollector

DriverCollector

+

+

+

ILimit

VFB

Representative Block Diagram

(Bottom View)

–

+

++–

1LVI Output

This device contains 114 active transistors.

Motorola, Inc. 1996 Rev 2

ON SEMICONDUCTOR EXHIBIT 1008 Page 1 of 16

MC34163 MC33163

2 MOTOROLA ANALOG IC DEVICE DATA

MAXIMUM RATINGSRating Symbol Value Unit

Power Supply Voltage VCC 40 V

Switch Collector Voltage Range VC(switch) –1.0 to + 40 V

Switch Emitter Voltage Range VE(switch) – 2.0 to VC(switch) V

Switch Collector to Emitter Voltage VCE(switch) 40 V

Switch Current (Note 1) ISW 3.4 A

Driver Collector Voltage VC(driver) –1.0 to +40 V

Driver Collector Current IC(driver) 150 mA

Bootstrap Input Current Range (Note 1) IBS –100 to +100 mA

Current Sense Input Voltage Range VIpk (Sense) (VCC–7.0) to (VCC+1.0) V

Feedback and Timing Capacitor Input Voltage Range

Vin –1.0 to + 7.0 V

Low Voltage Indicator Output VoltageRange

VC(LVI) –1.0 to + 40 V

Low Voltage Indicator Output Sink Current IC(LVI) 10 mA

Thermal CharacteristicsP Suffix, Dual–In–Line Case 648C

Thermal Resistance, Junction–to–AirThermal Resistance, Junction–to–Case

(Pins 4, 5, 12, 13)DW Suffix, Surface Mount Case 751G

Thermal Resistance, Junction–to–AirThermal Resistance, Junction–to–Case

(Pins 4, 5, 12, 13)

RθJARθJC

RθJARθJC

8015

9418

°C/W

Operating Junction Temperature TJ +150 °C

Operating Ambient Temperature (Note 3)MC34163MC33163

TA0 to +70

– 40 to + 85

°C

Storage Temperature Range Tstg – 65 to +150 °C

ELECTRICAL CHARACTERISTICS (VCC = 15 V, Pin 16 = VCC, CT = 620 pF, for typical values TA = 25°C, for min/max values TA isthe operating ambient temperature range that applies (Note 3), unless otherwise noted.)

Characteristic Symbol Min Typ Max Unit

OSCILLATORFrequency

TA = 25°CTotal Variation over VCC = 2.5 V to 40 V, and Temperature

fOSC4645

50–

5455

kHz

Charge Current Ichg – 225 – µA

Discharge Current Idischg – 25 – µA

Charge to Discharge Current Ratio Ichg/Idischg 8.0 9.0 10 –

Sawtooth Peak Voltage VOSC(P) – 1.25 – V

Sawtooth Valley Voltage VOSC(V) – 0.55 – V

FEEDBACK COMPARATOR 1Threshold Voltage

TA = 25°CLine Regulation (VCC = 2.5 V to 40 V, TA = 25°C)Total Variation over Line, and Temperature

Vth(FB1)4.9–

4.85

5.050.008

–

5.20.035.25

V%/V

V

Input Bias Current (VFB1 = 5.05 V) IIB(FB1) – 100 200 µA

NOTES: 1. Maximum package power dissipation limits must be observed.2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.3. Tlow = 0°C for MC34163 Thigh = + 70°C for MC34163

= – 40°C for MC33163 = + 85°C for MC33163


MC34163 MC33163


ELECTRICAL CHARACTERISTICS (continued) (VCC = 15 V, Pin 16 = VCC, CT = 620 pF, for typical values TA = 25°C, for min/maxvalues TA is the operating ambient temperature range that applies (Note 3), unless otherwise noted.)

Characteristic Symbol Min Typ Max Unit

FEEDBACK COMPARATOR 2Threshold Voltage

TA = 25°CLine Regulation (VCC = 2.5 V to 40 V, TA = 25°C)Total Variation over Line, and Temperature

Vth(FB2)1.225

–1.213

1.250.008

–

1.2750.031.287

V%/V

V

Input Bias Current (VFB2 = 1.25 V) IIB(FB2) – 0.4 0 0.4 µA

CURRENT LIMIT COMPARATORThreshold Voltage

TA = 25°CTotal Variation over VCC = 2.5 V to 40 V, and Temperature

Vth(Ipk Sense)–

230250–

–270

mV

Input Bias Current (VIpk (Sense) = 15 V) IIB(sense) – 1.0 20 µA

DRIVER AND OUTPUT SWITCH (Note 2)Sink Saturation Voltage (ISW = 2.5 A, Pins 14, 15 grounded)

Non–Darlington Connection (RPin 9 = 110 Ω to VCC, ISW/IDRV ≈ 20)Darlington Connection (Pins 9, 10, 11 connected)

VCE(sat)––

0.61.0

1.01.4

V

Collector Off–State Leakage Current (VCE = 40 V) IC(off) – 0.02 100 µA

Bootstrap Input Current Source (VBS = VCC + 5.0 V) Isource(DRV) 0.5 2.0 4.0 mA

Bootstrap Input Zener Clamp Voltage (IZ = 25 mA) VZ VCC + 6.0 VCC + 7.0 VCC + 9.0 V

LOW VOLTAGE INDICATORInput Threshold (VFB2 Increasing) Vth 1.07 1.125 1.18 V

Input Hysteresis (VFB2 Decreasing) VH – 15 – mV

Output Sink Saturation Voltage (Isink = 2.0 mA) VOL(LVI) – 0.15 0.4 V

Output Off–State Leakage Current (VOH = 15 V) IOH – 0.01 5.0 µA

TOTAL DEVICEStandby Supply Current (VCC = 2.5 V to 40 V, Pin 8 = VCC,

Pins 6, 14, 15 = Gnd, remaining pins open)ICC – 6.0 10 mA

NOTES: 1. Maximum package power dissipation limits must be observed.2. Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.3. Tlow = 0°C for MC34163 Thigh = + 70°C for MC34163

= – 40°C for MC33163 = + 85°C for MC33163

, OUT

PUT S

WIT

CH O

N–OF

F TIM

E (

s)t on

–tµ 100

CT, OSCILLATOR TIMING CAPACITOR (nF)0.1

10

1.01.0 10

off

Figure 1. Output Switch On–Off Timeversus Oscillator Timing Capacitor

Figure 2. Oscillator Frequency Change versus Temperature

2.0

– 55TA, AMBIENT TEMPERATURE (°C)

f OSC, O

SCILL

ATOR

FREQ

UENC

Y CH

ANGE

(%)

∆

0

– 2.0

– 4.0

– 6.0– 25 0 25 50 75 100 125

1

2

345

VCC = 15 VCT = 620 pF

VCC = 15 VTA = 25°C1) ton, RDT = ∞2) ton, RDT = 20 k3) ton, toff, RDT = 10 k4) toff, RDT = 20 k5) toff, RDT = ∞


MC34163 MC33163


Figure 3. Feedback Comparator 1 Input Bias Current versus Temperature

2.8

2.4

2.0

1.6

1.2– 55 – 25 0 25 50 75 100 125

TA, AMBIENT TEMPERATURE (°C)

I sour

ce (D

RV), B

OOTS

TRAP

INPU

T CUR

RENT

SOU

RCE

(mA)

VCC = 15 VPin 16 = VCC + 5.0 V

V Z

Figure 4. Feedback Comparator 2 Threshold Voltage versus Temperature

7.6

7.4

7.2

7.0

6.8– 55 – 25 0 25 50 75 100 125


IZ = 25 mA, B

OOTS

TRAP

INPU

T ZEN

ER C

LAMP

VOL

TAGE

(V)

V CE (s

at)

Figure 5. Bootstrap Input Current Source versus Temperature

0

– 0.4

0 0.8 2.4 3.2IE, EMITTER CURRENT (A)

, SOU

RCE

SATU

RATI

ON (V

)

– 0.8

–1.2

–1.6

– 2.0

Figure 6. Bootstrap Input Zener Clamp Voltage versus Temperature

1.2

1.0

IC, COLLECTOR CURRENT (A)

0.8

0.6

0.4

0.2

0Gnd

I IB, IN

PUT B

IAS

CURR

ENT (

A)µ

140

– 55TA, AMBIENT TEMPERATURE (°C)

120

100

80

60– 25 0 25 50 75 100 125

V CE (s

at), S

INK

SATU

RATI

ON (V

)V th(

FB2)

, COM

PARA

TOR

2 THR

ESHO

LD V

OLTA

GE (m

V)

1300

1280

1260

1240

1220

1200– 55

TA, AMBIENT TEMPERATURE (°C)– 25 0 25 50 75 100 125

Vth Typ = 1250 mV

Vth Min = 1225 mV

VCC = 15 VVFB1 = 5.05 V Vth Max = 1275 mV

1.6

Bootstrapped, Pin 16 = VCC + 5.0 V

Non–Bootstrapped, Pin 16 = VCC

VCC

0 0.8 2.4 3.21.6

Figure 7. Output Switch Source Saturation versus Emitter Current

Figure 8. Output Switch Sink Saturation versus Collector Current

Darlington, Pins 9, 10, 11 Connected

Grounded Emitter ConfigurationCollector Sinking Current From VCCPins 7, 8 = VCC = 15 VPins 4, 5, 12, 13, 14, 15 = GndTA = 25°C, (Note 2)

Saturated Switch, RPin9 = 110 Ω to VCC

VCC = 15 V

Darlington ConfigurationEmitter Sourcing Current to GndPins 7, 8, 10, 11 = VCCPins 4, 5, 12, 13 = GndTA = 25°C, (Note 2)


MC34163 MC33163


I CC, S

UPPL

Y CU

RREN

T (mA

)

Figure 9. Output Switch Negative Emitter Voltage versus Temperature

Figure 10. Low Voltage Indicator Output Sink Saturation Voltage versus Sink Current

Figure 11. Current Limit Comparator Threshold Voltage versus Temperature

Figure 12. Current Limit Comparator Input Bias Current versus Temperature

V th (Ip

k Sen

se), T

HRES

HOLD

VOL

TAGE

(mV)

Figure 13. Standby Supply Current versus Supply Voltage

254

252

250

248

246– 55 – 25 0 25 50 75 100 125


I IB (S

ense

)IN

PUT B

IAS

CURR

ENT (

A)

Figure 14. Standby Supply Current versus Temperature

1.6

1.4

1.2

1.0

0.8

– 55 – 25 0 25 50 75 100 125TA, AMBIENT TEMPERATURE (°C)

µ

0.6

I CC, S

UPPL

Y CU

RREN

T (mA

)

8.0

6.0

4.0

2.0

00 10 20 30 40

VCC, SUPPLY VOLTAGE (V)

Pins 7, 8, 16 = VCCPins 4, 6, 14 = GndRemaining Pins OpenTA = 25°C

7.2

6.4

5.6

4.8

– 55 – 25 0 25 50 75 100 125TA, AMBIENT TEMPERATURE (°C)

4.0

VCC = 15 VPins 7, 8, 16 = VCCPins 4, 6, 14 = GndRemaining Pins Open

V E, EMI

TTER

VOL

TAGE

(V)

0

– 0.4

– 0.8

– 1.2

– 1.6

– 2.0– 55 – 25 0 25 50 75 100 125


IC = 10 mA

V OL (L

VI), O

UTPU

T SAT

URAT

ION

VOLT

AGE

(V)

0.5

0.4

0 2.0 4.0 6.0 8.0Isink, OUTPUT SINK CURRENT (mA)

0.3

0.2

0.1

0

VCC = 5 VTA = 25°C

Gnd

,

VCC = 15 VVCC = 15 VVIpk (Sense) = 15 V

IC = 10 µA

VCC = 15 VPins 7, 8, 9, 10, 16 = VCCPins 4, 6 = GndPin 14 Driven Negative


MC34163 MC33163


0 0

Figure 15. Minimum Operating SupplyVoltage versus Temperature

3.0

2.6

2.2

1.8

1.4

1.0– 55 – 25 0 25 50 75 100 125

TA, AMBIENT TEMPERATURE (°C)V CC(m

in), M

INIM

UM O

PERA

TING

SUP

PLY

VOLT

AGE

(V)

Pin 16 Open

CT = 620 pFPins 7,8 = VCCPins 4, 14 = GndPin 9 = 1.0 kΩ to 15 VPin 10 = 100 Ω to 15 V

Figure 16. P Suffix (DIP–16) Thermal Resistanceand Maximum Power Dissipation

versus P.C.B. Copper Length

Graphs represent symmetrical layout3.0 mm

Printed circuit board heatsink example

L

L

100

80

60

40

20

10 20 30 40 50L, LENGTH OF COPPER (mm)

P D, MAX

IMUM

POW

ER D

ISSI

PATI

ON (W

)5.0

4.0

3.0

2.0

1.0

0

PD(max) for TA = 70°C

2.0 ozCopper

Pin 16 = VCC

RθJA

R, T

HERM

AL R

ESIS

TANC

EJA

θ JUNC

TION

–TO–

AIR

( C/W

)°

Figure 17. DW Suffix (SOP–16L) Thermal Resistance andMaximum Power Dissipation versus P.C.B. Copper Length

30

40

50

60

70

80

90

0

0.4

0.8

1.2

1.6

2.0

2.4

0 20 30 504010L, LENGTH OF COPPER (mm)

100 2.8PD(max) for TA = 50°C

RθJAP D

R, T

HERM

AL R

ESIS

TANC

EJAθ JU

NCTI

ON–T

O–AI

R ( C

/W)

°

, MAX

IMUM

POW

ER D

ISSI

PATI

ON (W

)

2.0 oz.Copper

Graph represents symmetrical layout

3.0 mmL

L


MC34163 MC33163


–FeedbackComparator

R

SQ

LVI1

+

+

+

CurrentLimit8

7

6

5

4

3

2

(Bottom View)

–+

16

9

10

12

13

14

15

0.25 V+Ipk Sense

RSCVCC

Timing Capacitor

ShutdownCT

Gnd

RDT

Voltage Feedback 1

Voltage Feedback 2

LVI Output1.125 V

15 k1.25 V+

45 k

Thermal

Oscillator

Latch

Q2

60

2.0 mA

7.0 VBootstrap Input

Switch Emitter

Gnd

Switch Collector

Driver Collector

+ Sink OnlyPositive True Logic=

Figure 18. Representative Block Diagram

+

++

–++

–

11Q1

Comparator Output

Timing Capacitor CT

Oscillator Output

Output Switch

Output Voltage

Nominal OutputVoltage Level

1

0

1.25 V

0.55 V

1

0

On

Off

Figure 19. Typical Operating Waveforms

Startup Quiescent Operation

9tt


MC34163 MC33163


INTRODUCTIONThe MC34163 series are monolithic power switching

regulators optimized for dc–to–dc converter applications. Thecombination of features in this series enables the systemdesigner to directly implement step–up, step–down, andvoltage–inverting converters with a minimum number ofexternal components. Potential applications include costsensitive consumer products as well as equipment forthe automotive, computer, and industrial markets. ARepresentative Block Diagram is shown in Figure 18.

OPERATING DESCRIPTIONThe MC34163 operates as a fixed on–time, variable

off–time voltage mode ripple regulator. In general, this modeof operation is somewhat analogous to a capacitor chargepump and does not require dominant pole loopcompensation for converter stability. The Typical OperatingWaveforms are shown in Figure 19. The output voltagewaveform shown is for a step–down converter with the rippleand phasing exaggerated for clarity. During initial converterstartup, the feedback comparator senses that the outputvoltage level is below nominal. This causes the output switchto turn on and off at a frequency and duty cycle controlled bythe oscillator, thus pumping up the output filter capacitor.When the output voltage level reaches nominal, the feedbackcomparator sets the latch, immediately terminating switchconduction. The feedback comparator will inhibit the switchuntil the load current causes the output voltage to fall belownominal. Under these conditions, output switch conductioncan be inhibited for a partial oscillator cycle, a partial cycleplus a complete cycle, multiple cycles, or a partial cycle plusmultiple cycles.

OscillatorThe oscillator frequency and on–time of the output switch

are programmed by the value selected for timing capacitorCT. Capacitor CT is charged and discharged by a 9 to 1 ratiointernal current source and sink, generating a negative goingsawtooth waveform at Pin 6. As CT charges, an internal pulseis generated at the oscillator output. This pulse is connectedto the NOR gate center input, preventing output switchconduction, and to the AND gate upper input, allowing thelatch to be reset if the comparator output is low. Thus, theoutput switch is always disabled during ramp–up and can beenabled by the comparator output only at the start oframp–down. The oscillator peak and valley thresholds are1.25 V and 0.55 V, respectively, with a charge current of225 µA and a discharge current of 25 µA, yielding a maximumon–time duty cycle of 90%. A reduction of the maximum dutycycle may be required for specific converter configurations.This can be accomplished with the addition of an externaldeadtime resistor (RDT) placed across CT. The resistorincreases the discharge current which reduces the on–timeof the output switch. A graph of the Output Switch On–OffTime versus Oscillator Timing Capacitance for various valuesof RDT is shown in Figure 1. Note that the maximum outputduty cycle, ton/ton + toff, remains constant for values of CTgreater than 0.2 nF. The converter output can be inhibited by

clamping CT to ground with an external NPN small–signaltransistor.

Feedback and Low Voltage Indicator ComparatorsOutput voltage control is established by the Feedback

comparator. The inverting input is internally biased at 1.25 Vand is not pinned out. The converter output voltage istypically divided down with two external resistors andmonitored by the high impedance noninverting input at Pin 2.The maximum input bias current is ±0.4 µA, which can causean output voltage error that is equal to the product of the inputbias current and the upper divider resistance value. Forapplications that require 5.0 V, the converter output can bedirectly connected to the noninverting input at Pin 3. The highimpedance input, Pin 2, must be grounded to prevent noisepickup. The internal resistor divider is set for a nominalvoltage of 5.05 V. The additional 50 mV compensates for a1.0% voltage drop in the cable and connector from theconverter output to the load. The Feedback comparator’soutput state is controlled by the highest voltage applied toeither of the two noninverting inputs.

The Low Voltage Indicator (LVI) comparator is designed foruse as a reset controller in microprocessor–based systems.The inverting input is internally biased at 1.125 V, which setsthe noninverting input thresholds to 90% of nominal. The LVIcomparator has 15 mV of hysteresis to prevent erratic resetoperation. The Open Collector output is capable of sinking inexcess of 6.0 mA (see Figure 10). An external resistor (RLVI)and capacitor (CDLY) can be used to program a reset delaytime (tDLY) by the formula shown below, where Vth(MPU) is themicroprocessor reset input threshold. Refer to Figure 20.

tDLY = RLVI CDLY In

1

1 –Vth(MPU)

Vout

Current Limit Comparator, Latch and Thermal Shutdown

With a voltage mode ripple converter operating undernormal conditions, output switch conduction is initiated by theoscillator and terminated by the Voltage Feedbackcomparator. Abnormal operating conditions occur when theconverter output is overloaded or when feedback voltagesensing is lost. Under these conditions, the Current Limitcomparator will protect the Output Switch.

The switch current is converted to a voltage by inserting afractional ohm resistor, RSC, in series with VCC and outputswitch transistor Q2. The voltage drop across RSC ismonitored by the Current Sense comparator. If the voltagedrop exceeds 250 mV with respect to VCC, the comparatorwill set the latch and terminate output switch conduction on acycle–by–cycle basis. This Comparator/Latch configurationensures that the Output Switch has only a single on–timeduring a given oscillator cycle. The calculation for a value ofRSC is:

RSC VIpk(Switch)

0.25


MC34163 MC33163


Figures 11 and 12 show that the Current Sensecomparator threshold is tightly controlled over temperatureand has a typical input bias current of 1.0 µA. Thepropagation delay from the comparator input to the OutputSwitch is typically 200 ns. The parasitic inductanceassociated with RSC and the circuit layout should beminimized. This will prevent unwanted voltage spikes thatmay falsely trip the Current Limit comparator.

Internal thermal shutdown circuitry is provided to protectthe IC in the event that the maximum junction temperature isexceeded. When activated, typically at 170°C, the Latch isforced into the “Set” state, disabling the Output Switch. Thisfeature is provided to prevent catastrophic failures fromaccidental device overheating. It is not intended to be usedas a replacement for proper heatsinking.

Driver and Output SwitchTo aid in system design flexibility and conversion

efficiency, the driver current source and collector, and outputswitch collector and emitter are pinned out separately. Thisallows the designer the option of driving the output switch intosaturation with a selected force gain or driving it nearsaturation when connected as a Darlington. The outputswitch has a typical current gain of 70 at 2.5 A and isdesigned to switch a maximum of 40 V collector to emitter,with up to 3.4 A peak collector current. The minimum value forRSC is:

RSC(min) VA

0.253.4 0.0735 Ω

When configured for step–down or voltage–invertingapplications, as in Figures 20 and 24, the inductor will forwardbias the output rectifier when the switch turns off. Rectifierswith a high forward voltage drop or long turn–on delay timeshould not be used. If the emitter is allowed to go sufficientlynegative, collector current will flow, causing additional deviceheating and reduced conversion efficiency.

Figure 9 shows that by clamping the emitter to 0.5 V, thecollector current will be in the range 10 µA over temperature.A 1N5822 or equivalent Schottky barrier rectifier isrecommended to fulfill these requirements.

A bootstrap input is provided to reduce the output switchsaturation voltage in step–down and voltage–inverting

converter applications. This input is connected through aseries resistor and capacitor to the switch emitter and is usedto raise the internal 2.0 mA bias current source above VCC.An internal zener limits the bootstrap input voltage to VCC+7.0 V. The capacitor’s equivalent series resistance mustlimit the zener current to less than 100 mA. An additionalseries resistor may be required when using tantalum or otherlow ESR capacitors. The equation below is used to calculatea minimum value bootstrap capacitor based on a minimumzener voltage and an upper limit current source.

CB(min) I ∆t∆V mA

tonV ton4.0 4.0 0.001

Parametric operation of the MC34163 is guaranteed overa supply voltage range of 2.5 V to 40 V. When operatingbelow 3.0 V, the Bootstrap Input should be connected to VCC.Figure 15 shows that functional operation down to 1.7 V atroom temperature is possible.

PackageThe MC34163 is contained in a heatsinkable 16–lead

plastic dual–in–line package in which the die is mounted on aspecial heat tab copper alloy lead frame. This tab consists ofthe four center ground pins that are specifically designed toimprove thermal conduction from the die to the circuit board.Figures 16 and 17 show a simple and effective method ofutilizing the printed circuit board medium as a heat dissipaterby soldering these pins to an adequate area of copper foil.This permits the use of standard layout and mountingpractices while having the ability to halve the junction–to–airthermal resistance. These examples are for a symmetricallayout on a single–sided board with two ounce per squarefoot of copper.

APPLICATIONSThe following converter applications show the simplicity

and flexibility of this circuit architecture. Three main convertertopologies are demonstrated with actual test data shownbelow each of the circuit diagrams.


MC34163 MC33163


Figure 20. Step–Down Converter

RB L

2200

1N5822

LVI1

++–

+

CurrentLimit8

7

6

5

4

3

2

(Bottom View)

++–

16

9

10

11

12

13

14

15

0.25 V+RSC

0.075Vin12 V

CT680 pF

1.125 V

15 k1.25 V+

45 kFeedbackComparator

Q1Q2

60

Cin330

CO

Coilcraft LO451–ACB

0.02

Vout5.05 V/3.0 A

Low VoltageIndicator Output

CDLY

RLVI10 k

+

–+

Thermal

Oscillator

R

SQ

Latch

+

+

+

2.0 mA

7.0 V

+

180 µH

Test Condition Results

Line Regulation Vin = 8.0 V to 24 V, IO = 3.0 A 6.0 mV = ± 0.06%

Load Regulation Vin = 12 V, IO = 0.6 A to 3.0 A 2.0 mV = ± 0.02%

Output Ripple Vin = 12 V, IO = 3.0 A 36 mVpp

Short Circuit Current Vin = 12 V, RL = 0.1 Ω 3.3 A

Efficiency, Without Bootstrap Vin = 12 V, IO = 3.0 A 76.7%

Efficiency, With Bootstrap Vin = 12 V, IO = 3.0 A 81.2%

Figure 21. External Current Boost Connections for Ipk (Switch) Greater Than 3.4 A

Figure 21A. External NPN Switch Figure 21B. External PNP Saturated Switch

1

+

+

8

7

6

5

4

3

2

(Bottom View)

Q3

Q2

Q1

1

+

+

8

7

6

5

4

3

2

(Bottom View)

Q2Q1

+ +

Q39

10

11

12

13

14

15

16

9

10

11

12

13

14

15

16


MC34163 MC33163


Figure 22. Step–Up Converter

180 µHCoilcraftLO451–A

LVI1

++–

+

CurrentLimit8

7

6

5

4

3

2

(Bottom View)

++–

16

9

10

11

12

13

14

15

0.25 V

RSC0.075Vin

12 V

CT680 pF

1.125 V

15 k1.25 V+


Q1Q2

60

Cin330

CO330

Vout28 V/600 mA

+

1N5822

R247 k

R12.2 k

+ –+

Thermal

Oscillator

R

SQ

Latch

+

+

+

2.0 mA

7.0 V

+

RLVI1.0 k

L

Low VoltageIndicator

Output


Line Regulation Vin = 9.0 V to 16 V, IO = 0.6 A 30 mV = ± 0.05%

Load Regulation Vin = 12 V, IO = 0.1 A to 0.6 A 50 mV = ± 0.09%


Efficiency Vin = 12 V, IO = 0.6 A 88.1%



1

+

+

8

7

6

5

4

3

2

(Bottom View)

16

9

10

11

12

13

14

15

Q3

Q2

Q1

1

+

+

8

7

6

5

4

3

2

(Bottom View)

16

9

10

11

12

13

14

15

Q3

Q2Q1

+ +


MC34163 MC33163


Figure 24. Voltage–Inverting Converter

L180 µH

LVI1

++–

CurrentLimit8

7

6

5

4

3

2

(Bottom View)

++–

16

9

10

11

12

13

14

15

0.25 V

RSC0.075Vin

12 V

CT470 pF

1.125 V

15 k1.25 V+


Q1Q2

60

Cin330

CO

Vout– 12 V/1.0 A

+

Coilcraft LO451–A

1N5822

R1953

R28.2 k

RB0.02

+ –+

+

Thermal

Oscillator

R

SQ

Latch

+

+

+

2.0 mA

7.0 V

+

CB

2200


Line Regulation Vin = 9.0 V to 16 V, IO = 1.0 A 5.0 mV = ± 0.02%

Load Regulation Vin = 12 V, IO = 0.6 A to 1.0 A 2.0 mV = ± 0.01%


Short Circuit Current Vin = 12 V, RL = 0.1 Ω 3.2 A

Efficiency, Without Bootstrap Vin = 12 V, IO = 1.0 A 73.1%

Efficiency, With Bootstrap Vin = 12 V, IO = 1.0 A 77.5%

1

8

7

6

5

4

3

2



+

+

(Bottom View)

16

9

10

11

12

13

14

15 Q3

Q2

Q1

1

+

+

8

7

6

5

4

3

2

(Bottom View)

16

9

10

11

12

13

14

15

Q2Q1

Q3

+ +


MC34163 MC33163


Figure 26. Printed Circuit Board and Component Layout(Circuits of Figures 20, 22, 24)

All printed circuit boards are 2.58” in width by 1.9” in height.

+

+

+

+ +

+

+

LC in

C O

R 2 R LVI

C B

R B

V O

V in

C T

RSC

R 1

+

+ – +

+ –+

MC

3416

3 St

ep–D

own

Bottom View Top View



++

+ +

LC in

C O

R 2

R LVI

V O

V in

C T

RSCR 1

+

+ – +

+ –+

+ +

+

MC

3416

3 St

ep–U

p

+

++

LC in

C O

R 2

C B

R B

V O

V in

C T

RSC

R 1

+

+ – +

+ –+

+ +

+

MC

3416

3 Vo

ltage

–Inv

ertin

g

+


MC34163 MC33163


Figure 27. Design EquationsCalculation Step–Down Step–Up Voltage–Inverting

tontoff

(Notes 1, 2, 3)

Vout VFVin Vsat Vout

Vout VF – VinVin – Vsat

|Vout| VFVin Vsat

tonƒ

tontoff

tontoff

1 ƒ

tontoff

tontoff

1 ƒ

tontoff

tontoff

1

CT ƒ32.143 · 10–6

ƒ32.143 · 10–6

ƒ32.143 · 10–6

IL(avg) Iout Iouttontoff

1 Iouttontoff

1

Ipk (Switch) IL(avg)IL2 IL(avg)

IL2 IL(avg)

IL2

RSC0.25

Ipk (Switch)0.25

Ipk (Switch)0.25

Ipk (Switch)

LVin Vsat Vout

ILton

Vin VsatIL

tonVin Vsat

ILton

Vripple(pp) IL 18 CO

2(ESR)2

ƒ

ton IoutCO

ton IoutCO

Vout VrefR2R1

1 VrefR2R1

1 VrefR2R1

1

Vin –Vout –Iout –∆IL –

–Vripple(pp) –

Nominal operating input voltage.Desired output voltage.Desired output current.Desired peak–to–peak inductor ripple current. For maximum output current it is suggested that ∆IL be chosen to be less than 10% of the average inductor current IL(avg). This will help prevent Ipk (Switch) from reaching the current limit thresholdset by RSC. If the design goal is to use a minimum inductance value, let ∆IL = 2(IL(avg)). This will proportionally reduceconverter output current capability.Maximum output switch frequency.Desired peak–to–peak output ripple voltage. For best performance the ripple voltage should be kept to a low value sinceit will directly affect line and load regulation. Capacitor CO should be a low equivalent series resistance (ESR) electrolytic designed for switching regulator applications.

The following Converter Characteristics must be chosen:

NOTES: 1. Vsat – Saturation voltage of the output switch, refer to Figures 7 and 8.NOTES: 2. VF – Output rectifier forward voltage drop. Typical value for 1N5822 Schottky barrier rectifier is 0.5 V.NOTES: 3. The calculated ton/toff must not exceed the minimum guaranteed oscillator charge to discharge ratio of 8, at the minimumNOTES: 3. operating input voltage.


MC34163 MC33163


P SUFFIXPLASTIC PACKAGE

CASE 648C–03(DIP–16)

DW SUFFIXPLASTIC PACKAGE

CASE 751G–02(SOP–16L)

OUTLINE DIMENSIONS

0.13 (0.005) T AM S

0.13 (0.005) T BM S

MIN MINMAX MAXMILLIMETERS

DIMABCDEFGJKLMN

NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.2. CONTROLLING DIMENSION: INCH.3. DIMENSION L TO CENTER OF LEADS WHEN

FORMED PARALLEL.4. DIMENSION B DOES NOT INCLUDE MOLD

FLASH.5. INTERNAL LEAD CONNECTION, BETWEEN 4

AND 5, 12 AND 13.

18.806.103.690.38

1.02

0.202.92

0°0.39

21.346.604.690.53

1.78

0.383.43

10°1.01

0.7400.2400.1450.015

0.040

0.0080.115

0°0.015

0.8400.2600.1850.021

0.070

0.0150.135

10°0.040

1.27 BSC

2.54 BSC

7.62 BSC

0.050 BSC

0.100 BSC

0.300 BSC

–A–

–B–1 8

916

NOTE 5

–T–SEATINGPLANE

FE

GD 16 PL

NK

C

L

M

J 16 PL

INCHES

1 8

916

MIN MINMAX MAXMILLIMETERS INCHES

DIMABCDFGJKMPR

10.157.402.350.350.50

0.250.10

0°10.050.25

10.457.602.650.490.90

0.320.25

7°10.550.75

0.4000.2920.0930.0140.020

0.0100.004

0°0.3950.010

0.4110.2990.1040.0190.035

0.0120.009

7°0.4150.029

1.27 BSC 0.050 BSC

–A–

–B– P 8 PL

G 14 PL

–T–

D 16 PL K

C

SEATINGPLANE

M

R X 45°

0.25 (0.010) BM M

0.25 (0.010) T A BM S S

NOTES:1. DIMENSIONING AND TOLERANCING PER ANSI

Y14.5M, 1982.2. CONTROLLING DIMENSION: MILLIMETER.3. DIMENSIONS A AND B DO NOT INCLUDE MOLD

PROTRUSION.4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER

SIDE.5. DIMENSION D DOES NOT INCLUDE DAMBAR

PROTRUSION. ALLOWABLE DAMBARPROTRUSION SHALL BE 0.13 (0.005) TOTAL INEXCESS OF D DIMENSION AT MAXIMUMMATERIAL CONDITION.

F

J


MC34163 MC33163


Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty, representation or guarantee regardingthe suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, andspecifically disclaims any and all liability, including without limitation consequential or incidental damages. “Typical” parameters which may be provided in Motoroladata sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights ofothers. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or otherapplications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injuryor death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorolaand its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney feesarising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorolawas negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an EqualOpportunity/Affirmative Action Employer.

How to reach us:USA/EUROPE/Locations Not Listed: Motorola Literature Distribution; JAPAN: Nippon Motorola Ltd.; Tatsumi–SPD–JLDC, 6F Seibu–Butsuryu–Center,P.O. Box 20912; Phoenix, Arizona 85036. 1–800–441–2447 or 602–303–5454 3–14–2 Tatsumi Koto–Ku, Tokyo 135, Japan. 03–81–3521–8315

MFAX: [email protected] – TOUCHTONE 602–244–6609 ASIA/PACIFIC: Motorola Semiconductors H.K. Ltd.; 8B Tai Ping Industrial Park, INTERNET: http://Design–NET.com 51 Ting Kok Road, Tai Po, N.T., Hong Kong. 852–26629298

MC34163/D◊


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