Optimizing Translation Information Management in NAND Flash …€¦ · • Optimizing translation information management ... Average System Response Time Average improved 22.14%

Optimizing Translation Information Management in NAND Flash Memory

Storage Systems

Qi Zhang1, Xuandong Li1, Linzhang Wang1, Tian Zhang1

Yi Wang2 and Zili Shao2

1 State Key Laboratory for Novel Software Technology

Nanjing University 2 The Hong Kong Polytechnic University

2 Qi Zhang, Nanjing University

Outlines

• Introduction

• Motivation

• Our scheme: Translation Information Management

• Caching Mechanism

• Multiple Write Pointers Strategy

• Evaluation

• Conclusion


Flash Memory Properties

• Non-volatile memory

• Faster access performance

• Lower power consumption

• Smaller size

• Lighter weight

• Shock resistance


Flash Memory Organization

4

1 Block = 32 pages

1 Page = 512B + 16B

Block 0

512B

16B Data area

Spare area (OOB)

Operations Time

Block erase 2000 us

Page read 25 us

Page write 200 us

• Chip Block Page

SAMSUNG 128MB SLC NAND

flash memory chip (large block): • Block: basic unit for erase

• Page: basic unit for read/write


Constraints

• Out-of-place update

• A page cannot be overwritten until the block with this page is erased

• Endurance

• SLC NAND Flash: 100,000 erase counts

• MLC NAND Flash: 10,000 erase counts

Needs an address mapping table to track the latest data.

Garbage Collection is needed:

Free Pages are used up after a period of time

Needs to erase blocks evenly


Flash Translation Layer (FTL)

Operating System

Application 1 Application 2 Application n

Conventional File Systems

(e.g., NTFS, FAT32, Ext3)


Memory Technology Device

NAND Flash Memory Chip

• A block-device-emulation software

• Built between the MTD Layer and the file system

• Embedded in the flash storage systems


Flash Translation Layer (FTL) • Components

• Address Translator

• Garbage Collector

• Wear-leveler

• Schemes

• Page-level mapping

–Fine grained mapping -> High performance

–Require large RAM but on-demand approach can solve it.

• Others: Block-level mapping & Hybrid-level mapping

Can reduce RAM cost but the performance is

not as good as page-level mapping


On-demand Approach

File System (e.g.,FAT32, NTFS)

Logical address


Flash Memory System

Physical address

RAM

Controller

MTD Layer

NAND

Flash Memory

File System (e.g.,FAT32, NTFS)

Logical address


Flash Memory System

Physical address

NAND Flash Memory

RAM

Controller

MTD Layer

Mapping Table

NFTL based system architecture Demand based system architecture

Cache


Demand-based Page-level FTL

Hit Miss


Motivation

• Translation Pages in flash memory

• Translation Information Overhead

• From Garbage Collection

–Corresponding translation pages need to be updated

• From Cache Replacement

–Cache miss triggers eviction of translation pages

Extra read/write operations

Degrade system performance


Motivation Example on Cache 1025 1030

Trigger more trans. block GC

Data Req.


Motivation Example on Data Allocation

511 1011 1025 Data Req. 1576

A

B

C

D

All related trans. pages need update in GC!


Translation Information Management

• Optimizing translation information management

• Cache Mechanism

–Directly cache translation pages instead of mapping items

–Directly access the cached translation page by adding a pointer in GTD


–Data with logical address in the same translation page are written into the same data block


Caching Mechanism

• Scheme

• Adopt page-level mapping cache to directly cache translation pages in the RAM

• Add Cache Index in GTD to directly access the caching translation pages

• Each access only needs one index computation in GTD, both Cache Index and TPPN are available.

• Benefits

• Making use of spatial locality

• Improve mapping utilization and cache hit ratio

• Improve the cache search time


Caching Mechanism Example

Address Translation Process:

Compute the GTD Index to locate the GTD item

According to Cache Index (CI) to locate mapping in the Cache

①

LPN: 513

②

PPN: 64

①

②

513 Data Req. 1030

LPN: 1030

PPN: 12


Multiple Write Pointers Strategy

• Objective: No matter the kinds of access pattern, the number of corresponding translation page is at most one.


• Using Global Translation Directory (GTD) to maintain multiple write pointers

• According to each individual write pointer, data with logical address in the same translation page are written into the same data block

• Garbage collector also apply the strategy


MWP Strategy Example

Write

Pointers

W: A

W: B

W: C

W: D

One data block corresponds to at most one trans. page

511 1011 1025 Data Req. 1576

16 24 32

-1


Logical Address Space of One Trans. Page

One translation page can map 8 logical blocks (1 MB)

to one data block(128KB), so space overhead is small.


Evaluation • Simulator

• FlashSim, a simulation framework for flash based storage systems and is built by enhancing Disksim

• Traces

• Web search, Financial are traces from SPC

• System disk, collected by running Diskmon on OS

• Compare with the representative Demand-based page-level FTL: DFTL


Average System Response Time

Average improved 22.14%

• From low trans. page operations

• From new data organization


Cache Hit Ratio

• Compare the cache hit ratio with DFTL in different cache size: 128KB, 256KB, 512KB, 1024KB

TPM > 85%

DFTL about 40%


Translation Page Updates

Average reduced 90.93%

• From high cache hit ratio

• From low trans. page update during GC

Normalized Value (the baseline from DFTL )


Block Erase Counts

Average reduced 26.51%

• From high cache hit Ratio

• From new data organization

Normalized Value (the baseline is from DFTL).


Overhead

• Space overhead

• Some blocks may not be fully utilized by allocating to one translation page

• But the overhead is small. In our experiment, only 4.74% extra space overhead in 32GB NAND flash memory

• RAM space overhead

• Maintain Cache Index and Write Pointers in GTD

• Only needs 2KB RAM space for 1GB flash


Conclusion

• We proposed TPM to optimize translation information management for demand-based page-level mapping scheme in NAND flash storage systems.

• TPM can reduce the extra translation page updates through our caching mechanism and novel data allocation strategy.

• Experimental results show that our scheme is very effective compared with the previous work.

Thanks

Documents

Optimizing Translation Information Management in NAND Flash …€¦ · • Optimizing translation information management ... Average System Response Time Average improved 22.14%