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Operational AmplifiersDigital Simulation
Nate Moehring
Operational Amplifiers
• Used in amplifiers, attenuators, and filters
• Ideal Properties of an Op Amp:• Infinite open-loop gain, Aol = infinity
• Infinite input impedance, Rin = infinity
• Zero output impedance, Rout = 0
• Zero noise contribution
• Zero DC output offset
• Infinite bandwidth, infinite frequency response
• Both differential inputs stick together
Why use op amps?
• Extremely high gain (10,000x)
• Infinite input resistance good for adding multiple sources (0 current = 0 voltage drop)
• Develop high pole filters
Example
• Passive Band Pass
Example
• Active Band Pass
Example
• Active Band Pass w/ amplifier
Op Amp configurations
• Rails +/- to higher input
• (Takes difference
• Multiplies by 10,000)
Comparator
Op Amp configurations
• Vo = -Vi(Rf/Ri)
• (Feedback loop creates
180o out of phase signal
that eliminates large Aol)
Inverting Gain
Op Amp configurations
• Vo = Vi(1 + Rf/Ri)
• (Feedback line
must always go to negative
input. Otherwise, we
would be summing infinitely.)
Non - Inverting Gain
Op Amp configurations
• Vo = Vi(1 + 0/) = 1
• Also called “follow me”
amplifier.
Buffer – Isolation Amplifier
Op Amp configurations
• fc = 1/(2RC)
• “Active”, although this
filter is no better than a
passive filter.
Filter
Op Amp configurationsDifferential Amplifier
• Vo = R2/R1(V2-V1)
• “Subtractor”
Op Amp configurationsSumming Amplifier
• Vo = V1(R3/R1) + V2(R3/R2)
• “Adder”
Parametric resultsw/ transient
Parametric resultsw/ AC Sweep
TransistorsBipolar Junction Transistors BJT (npn)
• Uses a small amount of current to allow a large amount of current to pass through it. (Amplifier) (Flood gate)
• Also used as “on/off” switch. (Transistor Transistor Logic (TTL))
• Bipolar.olb
Base
Collector
Emitter
NOT Gate
These TTL representations are
greatly simplified for logical interpretation and are not meant for
actual implementation as seen here.
AND Gate
OR Gate
Digital Simulation
• Use Bias Point calculations manually changing VDCs
• Use Bussed STIM sources to perform transient analysis.
• Get digital components from 74ac (pro) or Eval library (student)
Using STIM sources
• Use STIM4 from source library• Draw bus wire• Place “Net Alias” ON bus, ie. A[0:3]• Use “Bus Entry” tool to extract lines• Name lines using Place “Net Alias”• Double click STIM4 to create pattern• Probe input and outputs• Run transient simulation
Voter Problem
• Build using 74xx logic gates
• Input manually using VDC sources and view outputs using Bias Voltages
• Input using STIM4 providing all possible input combinations.