EET 323

1

Fig. 1. Operational amplifier

Abstract—Operational amplifiers (Op-Amp) are used in linear

AC operations and are widely used in electronic industry. What

follows are two operational amplifier designs using bipolar

junction Transistor (BJT) Technology and metal oxide

semiconductor field effect transistor (MOSFET) Technology.

These designs will focus in the input stage and gain stages. The

BJT will be modeled as an Op-Amp and characterized.

Index Terms—Operational amplifiers, Power electronics.

I. INTRODUCTION

N operational amplifier is made up of several transistors.

The Bipolar Junction Transistor (BJT) is widely used with

different configurations, and different transistors for different

models of op-amps. The op-amp has an inverting input and a

non-inverting input with one output as in Fig. 1. The op-amp

is powered by ±VDC.

Section II will have a BJT Design, Section III will show the

results of the simulation of the BJT design, Section IV will

have a MOSFET design, and Section V will conclude with a

few notes.

II. BJT OP-AMP DESIGN

I designed a three stage operation amplifier with BJT using a

cascode current mirror to bias the input stage and the gain

stage. I added two emitter followers on the inputs to increase

input impedance. I also added emitter followers on the gain

stage to match impedances from the input stage. I used four

different transistors for this design.

NTE912 SSM2210

β1 = 100 β3 = 605

VA = 100V VA = 40V

SSM2210 2N3906

β3 = 165 β4 = 300

VA = 40V VA = 100V

Manuscript received March 20, 2008. This work was supported in part by

Oregon Institute of Technology.

D. L. Longstreet is with the Oregon Institute of Technology, Portland, OR

97006 USA (corresponding author to provide phone: 503-866-5561; e-mail:

daniel.longstreet@oit.edu).

I designed the cascode current mirror for a current of 2mA

using the SSM2210 transistor arrays to bias the input stage and

the gain stage.

VCC and VEE = ±20V.

RC1 = RC2 = 10kΩ

IC = 1mA

re' = 26Ω

mAk

vvIc 14.2

18

4.140=

Ω−

=

The gain of the input stage is

192 2

101

'

=Ω

=er

kAv

Input impedance is

Ω=

Ω××=

××=

0k26

26100100

'

Zin

Zin

reZin ββ

The common mode gain is

000413.0

605*20226

10

2'

−=Ω×+Ω

Ω−=

+−

=

k

k

RTre

RcACM

Operational Amplifier design with BJT

& MOSFET Technology

Daniel L. Longstreet

A

EET 323

2

The common mode rejection ratio is

dBCMRR

ACM

AvLogCMRR

113

120

=

=

The gain stage consists of a differential pair with an active

load. The differential stage is biased with the cascode current

mirror.

The gain of this stage is the output resistance of the active load

divided by 2(Re+re'). Also I ran into the problem of reduce

voltage swing as the voltage at the emitters of the differential

amplifiers was not close to zero but was around 8.3V. I

centered my voltage around 14V for a max swing of ±6V.

Ω== kmA

VRo 40

1

40

770262

402 =

Ω×Ω

=k

Av

The output stage was design for low output impedance. I used

a common emitter to drop the voltage from 14V to around

1.4V and then used a Darlington pair to reduce my output

impedance. The DC out put component was 0.5V. This could

be adjusted by changing the amount of voltage drop across the

common emitter amplifier in the previous stage.

Ignoring loading effect (as I believe that I can as I designed

each stage accordingly) the over all calculated gain was about

150,000.

III. BJT OP-AMP SIMULATIONS

After the design process was finished I build and tested my

design. I had problems getting the cascode current mirrors to

function correctly so a removed them and replace them with a

basic current mirror. This did reduce my CMRR but I was still

satisfied with the results. I look at the open loop gain,

measured the common mode gain and measured the input

impedance. I tested my design with a negative feedback

network with a gain of -10 and a non-inverting gain of 1. The

results can be seen if fig. XX in the appendix.

TABLE I – Characteristic of the BJT OP-Amp

Parameter Condition Dan's

OPAMP

Units

Input Offset

Voltage

TA = 25°C 111 mV

Input Offset

Current

TA = 25°C 200 µA

Input Bias

Current

TA = 25°C 9.1 µA

Input

Resistance

TA = 25°C 400 kΩ

Output

Voltage Swing

VS = ±15V

RL ≥ 1kΩ

± 5 V

Output Short

Circuit Current

TA = 25°C 45 mA

CMRR TA = 25°C

f = 1 kHz

60 dB

Bandwidth TA = 25°C 2 MHz

Slew Rate 0.2 V/µs

.

IV. MOSFET DESIGN

I was not as happy with the MOSFET OP-Amp Design as I had

so difficulties with centering my voltage from the differential

gain stage. Besides that everything was straight forward. I

designed a cascode current mirror for a current of 2mA. This

bias the differential pair and the active loads. I used the

CD4007 transistor array to model my design.

N-Channel

KP = 111µ

Vto = 2v

P-Channel

KP = 55µ

Vto = -1.5V

( )( )vVgs

vVgsmA

VtoVgskId

24.6

211122

2

=

−=

−=

µ

Implementing a cascode current mirror the bias resistor is

Ω=

−=

kR

mAR

bias

bias

76.13

2

24.6*240

I modeled my design in LTSpice and got a simulated open loop

gain of around 10,000. Also I connect a negative feed back

network to control the gain with a gain of -10. as seen in Fig. 2.

You can see in Fig. 3 that this design does not allow for more

then 1.2Vp swing.

EET 323

3

Fig. 2. MOSFET inverting amplifier Av = -10

Fig. 3. MOSFET inverting amplifier Av = -10

V. CONCLUSION

There are a few things that I should have done differently in

the BJT design. I could have added emitter resistors to

increase the input impedance or I could have used the

SSM2210 with a Beta of 605 at 1mA. That would have

increased Zin to 9.5MΩ. I should have picked transistors with

a higher early voltage to get more gain when used as an active

load and better CMRR when used as a current mirror. I still

need no learn more about voltage shifters and output stages to

improve the BJT design.

I was not very satisfied with my MOSFET design but I do

understand the current mirror and active loads.

EET 323

4

APPENDIX

Fig. 4. BJT OP-Amp Design

Fig. 5. MOSFET OP-Amp design

EET 323

5

Fig. 6. BJT OP-Amp Open loop gain

Fig. 7. BJT OP-Amp with negative feedback Av = -10

Fig. 8. BJT OP-Amp Non-inverting Av = 1

Fig. 9. BJT OP-Amp Measuring Slew Rate. SR = 0.2 v/µs

Fig. 10. BJT OP-Amp Measuring Common mode gain ACM = 0.001

Daniel L. Longstreet is pursuing his Bachelor of Science in Electronic

Engineering Technology from the Oregon Institute of Technology in Portland,

OR USA and is expected to graduate June 2009. He also has an Associates of

Science in Industrial Electronics from the Technical College of the

LowCounrty Beaufort, SC. USA May 2005.

He is working at TriQuint Semiconductor in Hillsboro Oregon as a RF Test

Technician.