1
Experimental results Figure 2. a) Non-volatile multi-level switching of a typical photonic phase-change memory (inset) using a single optical pulse. b) Relation between used pulse energy, addressed level and corresponding change in readout, for write operations used in a). Ref. [2] On - chip All - Photonic Phase - Change Memories Emanuele Gemo 1 , C.David Wright 1 , Anna Baldycheva 1 , Harish Bhaskaran 2 [email protected] http://ex.ac.uk/eg402 www.exeter.ac.uk/metamaterials Abstract Chip-scale memory devices consisting of a thin phase-change material (pcm) layer deposited on top of an integrated waveguide are investigated. The Ge 2 Sb 2 Te 5 pcm alloy provides a suitable platform at TC wavelengths, modulating a low power beam transmission as a function of the pcm phase distribution. Writing is performed via tailored high-power pulses. Novel waveguide designs drawing concepts from metamaterials and plasmonics will be analysed, in order to enhance memory density, power efficiency, reliability and throughput. Simulation results The time-dependent propagating field, temperature and phase distributions have been calculated successfully reproducing previously published experimental data [2] , as briefly described in Fig 5. The adopted phase-change model is classical nucleation and growth, with the inclusion of an exponential equation mimicking the melting process. Future work will focus on the refinement of this simulation framework, particularly over TBRs, material thermal properties, e.m. loss. We will also develop a 3D Gillespie-Cellular Automaton model capable to simulate larger volume and multiple phases. References [1] Pernice, W.H. and Bhaskaran, H., 2012. Photonic non-volatile memories using phase change materials. Applied Physics Letters, 101(17), p.171101. [2] C. Rios, et al., ‘Integrated all-photonic non-volatile multi-level memory’, Nat.Phot. 9, 725–732 (2015) [3] Rudé, et al., 2013. Optical switching at 1.55 μ m in silicon racetrack resonators using phase change materials. Applied Physics Letters, 103(14), p.141119. [4] Cheng, Z., Ríos, C., Pernice, W.H., Wright, C.D. and Bhaskaran, H., 2017. On-chip photonic synapse. Science Advances, 3(9), p.e1700160. Scope The incorporation of a phase-switchable cell of GST with integrated waveguide structures has been experimentally demonstrated to be capable of providing the write, erase and read operations required for a non-volatile memory in a photonic integrated circuit (PIC) architecture [1,2] . Device and concepts are illustrated in Fig.1. Fast write operations (sub-nanosecond Reset), long data retention and multi-bit per cell storage have been demonstrated [2] . Despite these desirable features, devices developed to date have large footprint and relatively high power consumption. This work focus on the simulation of this class of devices, for the future aim to design and fabricate new phase-change based PIC memory architectures, in order to reduce size, power requirement and operations time, maintaining the optimal signal modulation. 1. Department of Engineering, University of Exeter, Exeter EX4 4QF, United Kingdom 2. Department of Materials, University of Oxford, Parks Road, Oxford OXI 3PH, United Kingdom Figure 1. a) Device structure and optical memory operative principles. i) A GST layer (green) is deposited on top of a Si 3 N 4 rib waveguide (grey). The absorption of the evancescent component of the field by the GST layer modulates the waveguide transmission for the low power read operation and provides the heat source with high power pulses write operations. b) Inset: Scanning electron microscope image of a device with a footprint of 0.4 × 0.4 μm 2 [2] Probe 1 0 Reset Set Read: intensity modulation Write: temperature-driven phase switch GST a b Figure 5. Simulations results of Si 3 N 4 /silica 1300x335nm rib waveguide – 1.3x1um 2 crGST cell, 1550nm wavelength, 300pJ/20ns pulse. a) Wave propagation, norm of the E. field plot [V/m]; b) Heat diffusion, temperature isotherms [K] at t = 1ns. c) Top view of the GST layer, time dependent evolution of the crystallinity (black: crystalline, grey: amorphous/liquid). After 35ns, only a minor fraction of the amorphized phase is retained below T m , leading to the experimentally measured change in readout (ref. [2]). a b t = 0 t = 20ns t = 35ns time c Figure 3. Transmitted spectrum of a waveguide coupled with a nanoring resonator (inset), used as a demultiplexer, during crystallization a) and reamorphization b) of the 1.5x3 um 2 GST area. Ref. [3] Normalized Transmission Wavelength (nm) Wavelength (nm) Levels a Figure 4. Optical phase-change synapse structure (inset). a) Demonstration of differential synaptic weighting during switching between crystalline and amorphous states of GST islands. b) Measured transmission as a function of the pulse number, for forward and backward switching. Ref. [4] Time (s) Pulse Transmission (x10 -4 ) Weight a b a b b

On-chip All-Photonic Phase-Change Memoriesemps.exeter.ac.uk/.../metamaterials/presentations/... · demultiplexer, during crystallization a) and reamorphization b) of the 1.5x3 um2

  • Upload
    others

  • View
    1

  • Download
    0

Embed Size (px)

Citation preview

Page 1: On-chip All-Photonic Phase-Change Memoriesemps.exeter.ac.uk/.../metamaterials/presentations/... · demultiplexer, during crystallization a) and reamorphization b) of the 1.5x3 um2

Experimental results

Figure 2. a) Non-volatile multi-level switching of a typical photonic phase-change memory (inset)using a single optical pulse. b) Relation between used pulse energy, addressed level andcorresponding change in readout, for write operations used in a). Ref. [2]

On-chip All-Photonic Phase-Change MemoriesEmanuele Gemo1, C.David Wright1, Anna Baldycheva1, Harish Bhaskaran2

[email protected]://ex.ac.uk/eg402www.exeter.ac.uk/metamaterials

Abstract Chip-scale memory devices consisting of a thin phase-change material (pcm) layer deposited on top of an integrated waveguideare investigated. The Ge2Sb2Te5 pcm alloy provides a suitable platform at TC wavelengths, modulating a low power beam transmission as afunction of the pcm phase distribution. Writing is performed via tailored high-power pulses. Novel waveguide designs drawing conceptsfrom metamaterials and plasmonics will be analysed, in order to enhance memory density, power efficiency, reliability and throughput.

Simulation resultsThe time-dependent propagating field, temperature and phase distributionshave been calculated successfully reproducing previously publishedexperimental data[2], as briefly described in Fig 5. The adopted phase-changemodel is classical nucleation and growth, with the inclusion of an exponentialequation mimicking the melting process. Future work will focus on therefinement of this simulation framework, particularly over TBRs, materialthermal properties, e.m. loss. We will also develop a 3D Gillespie-CellularAutomaton model capable to simulate larger volume and multiple phases.

References[1] Pernice, W.H. and Bhaskaran, H., 2012. Photonic non-volatile memories using phase change materials. Applied Physics Letters, 101(17), p.171101. [2] C. Rios, et al., ‘Integrated all-photonic non-volatile multi-level memory’, Nat.Phot. 9, 725–732 (2015) [3] Rudé, et al., 2013. Optical switching at 1.55 μ m in silicon racetrack resonators using phase change materials. Applied Physics Letters, 103(14), p.141119.[4] Cheng, Z., Ríos, C., Pernice, W.H., Wright, C.D. and Bhaskaran, H., 2017. On-chip photonic synapse. Science Advances, 3(9), p.e1700160.

ScopeThe incorporation of a phase-switchable cell of GST withintegrated waveguide structures has been experimentallydemonstrated to be capable of providing the write, eraseand read operations required for a non-volatile memory in aphotonic integrated circuit (PIC) architecture[1,2]. Deviceand concepts are illustrated in Fig.1. Fast write operations(sub-nanosecond Reset), long data retention and multi-bitper cell storage have been demonstrated[2]. Despite thesedesirable features, devices developed to date have largefootprint and relatively high power consumption. This workfocus on the simulation of this class of devices, for the futureaim to design and fabricate new phase-change based PICmemory architectures, in order to reduce size, powerrequirement and operations time, maintaining the optimalsignal modulation.

1. Department of Engineering, University of Exeter, Exeter EX4 4QF, United Kingdom2. Department of Materials, University of Oxford, Parks Road, Oxford OXI 3PH, United Kingdom

Figure 1. a) Device structure and optical memory operative principles. i) A GST layer (green) is deposited on top of a Si3N4 ribwaveguide (grey). The absorption of the evancescent component of the field by the GST layer modulates the waveguidetransmission for the low power read operation and provides the heat source with high power pulses write operations. b) Inset:Scanning electron microscope image of a device with a footprint of 0.4 × 0.4 μm2 [2]

Probe

10

Reset

Set

Read: intensity modulation

Write: temperature-driven phase switch

GST

a b

Figure 5. Simulations results of Si3N4/silica 1300x335nm rib waveguide – 1.3x1um2 crGST cell, 1550nmwavelength, 300pJ/20ns pulse. a) Wave propagation, norm of the E. field plot [V/m]; b) Heat diffusion,temperature isotherms [K] at t = 1ns. c) Top view of the GST layer, time dependent evolution of the crystallinity(black: crystalline, grey: amorphous/liquid). After 35ns, only a minor fraction of the amorphized phase is retainedbelow Tm, leading to the experimentally measured change in readout (ref. [2]).

a b

t = 0 t = 20ns t = 35ns

time

c

Figure 3. Transmitted spectrum of a waveguide coupled with a nanoring resonator (inset), used as ademultiplexer, during crystallization a) and reamorphization b) of the 1.5x3 um2 GST area. Ref. [3]

No

rmal

ized

Tra

nsm

issi

on

Wavelength (nm) Wavelength (nm)

Leve

ls

a

Figure 4. Optical phase-change synapse structure (inset). a) Demonstration of differential synapticweighting during switching between crystalline and amorphous states of GST islands. b) Measuredtransmission as a function of the pulse number, for forward and backward switching. Ref. [4]

Time (s) Pulse

Transm

ission

(x10

-4)

Wei

ght

a b

a b

b