Ofer Rosenberg Senior Staff Engineer Qualcomm Israel … · PCI-SIG Developers Conference Disclaimer 2 Presentation Disclaimer: All opinions, judgments, recommendations, etc. that

1

Using PCIe® in Mobile Devices

Ofer Rosenberg

Senior Staff Engineer

Qualcomm Israel LTD

©2015 Qualcomm Technologies, Inc. All Rights Reserved.

Used by PCI-SIG under license

PCI-SIG Developers Conference

Disclaimer

2

Presentation Disclaimer: All opinions, judgments, recommendations,

etc. that are presented herein are the opinions of the presenter of the

material and do not necessarily reflect the opinions of the PCI-SIG®.



PCI-SIG Developers Conference 3

Introduction: PCIe® at Qualcomm Technologies Inc. (QTI)

Case Study – PCIe in MDM

QTI PCIe Perspective

Contents

Qualcomm Snapdragon is a product of

Qualcomm Technologies Inc.




PCIe Importance to QTI


Used by PCI-SIG under license4

QTI ships around a Billion Application Processors each year

Each has one or more PCIe Root Complexes

Key interface for communicating with Modem/Wi-Fi devices

QTI ships XX Modem devices each year

Connect as PCIe end-points

Key interface for connecting the device to QTI or 3rd Party Application Processors


Few years ago, QTI identified the need for long-term solution for high-speed Chip-to-Chip (C2C) connection

Modem, Wifi and Storage speeds increase

Existing serial interfaces speed became a bottleneck

Needed a long term, evolving, high speed interface which will meet future speed increase

PCIe was chosen due to its extendibility, design philosophy, features and power management capabilities

Motivation

WCDMA HSPA HSPA+ LTE

CAT 3 CAT 5 CAT 10

Max DL

rate (bps)384K 14M 28M 100M 300M 450M

Max UL

rate (bps)128K 5.7M 11M 51M 75M 100M

802.11a 802.11n

(20MHz)

802.11n

(40MHz)

802.11ac

(wave1)

802.11ac

(wave2)

TPT

(bps)54M 300M 600M 1.3G 6.7G




QTI develops both Root-Complex and End-Point

PCIe at QTI

QTI Three Pillars

of PCIe use

Root Complex:

Qualcomm® Snapdragon™ Application Processors provide PCIe Root-Complex Port/s

Qualcomm Server Chips will arrive with Multiple Root Complex Ports

End-Point:

Qualcomm® Gobi™ Modems connect as PCIe EP

WLAN Devices connect using PCIe EP

WiGig Devices connect using PCIe EP

Other…

* Qualcomm® Gobi is a product of Qualcomm Technologies Inc.



Embedded/Mobile

C2C

High-End Expansion

Bus

High-End C2C


Mobile Device Chipset

7

Application

Processor

Modem

Wi-Fi

Audio

Codec

PCIe



Camera

Display

Storage

WiGig


Case Study – PCIe in Mobile Data Modem (MDM) Chipset

8©2015 Qualcomm Technologies, Inc. All Rights Reserved.


PCIe

(at system level,

including PCIe L1ss)


Example for Common Usage:

Application Processor connected to External Modem

Samsung Galaxy Note 4

PCIe in Mobile Devices




“Smart” Devices Advantage



Application Processor

Modem

Chipset

SMMUModule AModule B

CPUMem

InterfaceDDR

RAM PCIe

RC

PCIe

EP

PCIe devices are “smart”

Access different entities inside the SoC (pending on access rights)

Autonomously handle data transfers (reads and writes)

The Direct & Autonomous access has SoC power management advantages

Access Modules & DDR without waking the CPU

Access Modules with standalone memory without waking the DDR


Typical LTE Activity

LTE works in “Bursts” of 1mSec

The device issues a burst of data write (downlink) and read (uplink), and then remains silent until next subframe

Burst length depends on generation (CAT 1 - 10)

Ideal for smart devices which know to handle power states …

11

CAT 1 CAT 2 CAT 3 CAT 5 CAT 10

Max DL

rate (bps)10M 50M 100M 300M 450M

Max UL

rate (bps)5M 25M 51M 75M 100M

#0 #1 #2 #3 #18 #19…

Radio Frame – 10mSec

subframe – 1mSec




PCIe Power States

12

L1Substates

L1.2

L1(L1.0)

CLKREQ#Assert

L1.1

CLKREQ#Assert

L0L0sL2/L3 Ready

L3

L2

Power OFF

Vaux

PM Msgs.

Power ON

WAKE#

EIOS

FTS

Active

ASPMMsgs.

LinkRecovery

Tx Idle

LinkInitialization

CLKREQ#De-AssertLTR >= Threshold

CLKREQ#De-Assert

LTR < Threshold



PLL /

PIPE

RX Idle

Detect

Tx Comn

Mode

L0 On On On

L1.0 Off On On

L1.1 Off Off On

L1.2 Off Off Off


Race to Idle Philosophy The Basics

Resume

Transmit as fast as possible (PCIe 1/2/3 …)

Go back to low-power state

The Challenges

Buffering

UL/DL sync

Correctly Select L1.1 / L1.2



PCIe Link

1mSec . 1mSec . 1mSec

L1.2

L0

L1.2àL0L1.0

L0àL1.0

L1.1L1.0àL1.1


System Perspective

PCIe Link inactivity

Short intervals, such as 1mSec frames

Longer intervals due to data link inactivity

Power management is a joint HW-SW effort

HW manages short interval transitions (L1ss – L0)

Host / SW manages deeper transitions (D0 – D3/L2)



Normal

Operation

Host : ON

Device : ON

PCIe : D0 / ASPM

Device in

Low Power

Host : ON

Device : Low Power

PCIe : D0 / L1ss

Host in

Low Power

Host : Low Power

Device : On

PCIe : D3cold / L2

Host & Device in

Low Power

Host : Low Power

Device : Low Power

PCIe : D3cold / L2

Device

enters/exists

Low power

Host

enters/exists

Low power

Device

enters/exists

Low power


SUMMARY




QTI PCIe Perspective

Full-Fledge PCIe topology QTI Mobile typical usage

Single Bus/Device per RC

(Very) Short links

Frequent switch between Active & Low-Power



Host CPU

PCIe Root

PCIe Switch

PCIe

EndPoint

PCIe

EndPoint

PCIe Switch

PCIe

EndPoint

PCIe

EndPoint

PCIe

EndPoint

PCIe Bridge

PCI

AdapterPCI-X

Adapter

Application Processor

PCIe Root

PCIe

EndPoint

PCIe Root

PCIe

EndPoint


QTI PCIe Perspective What do we like in PCIe ?

Highly extendable interface, from 2.5 GT/s x1 to 8 GT/s x16

Philosophy of “Smart” devices:

– Initiate data transactions

– Handle power state changes

Advanced capabilities (TC, MSI, TPH, ATS, IOV and more… )

Low-Power States

What would we like to enhance in PCIe ?

Optimized behavior for Low-Power / Chip-to-Chip scenarios

– Revisit Legacy features (such as ECAM)

– Revisit LTSSM, up/down link time, etc.

Enhanced support in interconnect fabrics

– Example: Ordering Rules



17


QTI Vision for PCIe

Power States transitions cleanup (redundant states, reduce min. duration)

Improve Support in Advanced System Buses

Optimize Chip-to-Chip scenarios

Standardize handling of Host power states

More…




TIME FOR QUESTIONS…




Disclaimer

Qualcomm Snapdragon™ and Gobi™ are trademarks of Qualcomm Incorporated, registered in the United States and

other countries, used with permission.

Other product and brand names may be trademarks or registered trademarks of their respective owners




Thank you for attending the PCI-SIG Developers Conference

Israel 2015

For more information please go to www.pcisig.com



Documents

Ofer Rosenberg Senior Staff Engineer Qualcomm Israel … · PCI-SIG Developers Conference Disclaimer 2 Presentation Disclaimer: All opinions, judgments, recommendations, etc. that