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Noise and Reliability in Advanced Bipolar Technologies. Md Mazhar Ul Hoque Advisor: Prof. Zeynep Celik-Butler Department of Electrical Engineering University of Texas at Arlington. Outline. Introduction: Limitations in existing noise models. Importance and motivation of research. - PowerPoint PPT Presentation
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UTA Noise and Reliability Laboratory 1
Md Mazhar Ul Hoque
Advisor: Prof. Zeynep Celik-Butler
Department of Electrical EngineeringUniversity of Texas at Arlington
Noise and Reliability in Advanced Bipolar Technologies
UTA Noise and Reliability Laboratory 2
Outline Introduction:
Limitations in existing noise models. Importance and motivation of research.
Noise in polysilicon emitter bipolar transistors: Experimental setup. SIB modeling:
noise mechanisms, effect of bias, geometry and IFO. SIC modeling:
noise mechanisms, effect of bias and IFO. SVr modeling:
Collector-emitter measurement setup, effect of bias and IFO. Computer codes.
Noise in SiGe heterojunction bipolar transistors: Dominant noise source. Effect of selective collector implant. Effect of higher extrinsic base implant. Effect of SiGe epi-SiGe poly interface. Effect of emitter-poly overlap. Physical origin and modeling of SIB.
Conclusion
UTA Noise and Reliability Laboratory 3
Current BJT low-frequency noise models
Gummel-Poon:
VBIC – Flicker noise due to IBE, IBEP
MEXTRAM:
MODELLA:
ff
IKFI EF
AFB
BN
2
fMULTI
KFMULTI
KFNf
MULTiN BB
B
21
222
ff
IIMULTKFiN
AFLERE
AF
B
1
2
UTA Noise and Reliability Laboratory 4
Importance and motivation
Only one single noise source in base current: SIB=KF.IBAF.
Noise in base current dominant only for higher base series resistance.
Does not include any geometry, temperature or process parameter.
Noise in collector current and internal resistances are neglected. Noise in collector current contributes at lower base series
resistance. Noise from internal resistance contributes at higher bias current.
To model all possible noise sources in advanced bipolar transistors: Noise in base current, collector current and internal resistances.
Developing physics based scalable equations for the noise sources: Incorporating geometry, temperature and process dependant
parameters. Writing computer source code for device and circuit analysis CAD
tools to incorporate all possible noise sources in BJT.
Research goal:
Limitations in existing noise models:
UTA Noise and Reliability Laboratory 5
Polysilicon emitter bipolar transistors: 2nd generation BiCMOS technology, Texas
Instruments Inc. NPN and PNP transistors. Variable size, variable IFO thickness.
SiGe heterojunction bipolar transistors: 1st generation BiCMOS technology, National
Semiconductor Corporation. NPN transistors. Variable size, variable design rules. Variable doping in base and collector.
Advanced bipolar technologies under investigation
UTA Noise and Reliability Laboratory 6
Outline Introduction:
Limitations in existing noise models. Importance and motivation of research.
Noise in polysilicon emitter bipolar transistors: Experimental setup. SIB modeling:
noise mechanisms, effect of bias, geometry and IFO. SIC modeling:
noise mechanisms, effect of bias and IFO. SVr modeling:
Collector-emitter measurement setup, effect of bias and IFO. Computer codes.
Noise in SiGe heterojunction bipolar transistors: Dominant noise source. Effect of selective collector implant. Effect of higher extrinsic base implant. Effect of SiGe epi-SiGe poly interface. Effect of emitter-poly overlap. Physical origin and modeling of SIB.
Conclusion
UTA Noise and Reliability Laboratory 7
100K 100K4.8V RS
RL 12V
br
brVS
BISr
bi bi
CISor crVS
cr
LRVS
LR
2BVS
2BR
erVS
er
SRVS
SR
1BVS
1BR
CVSBVS
(a)
(b)
Collector-base measurement setup
UTA Noise and Reliability Laboratory 8
CBrB IIVV SwSvSuS
CBrC IIVV SzSySxS
rVS If has the dominant contribution, ux
S
S
B
C
V
V
vy
S
S
B
C
V
V BIS If has the dominant contribution,
wz
S
S
B
C
V
V CIS If has the dominant contribution,
Collector-base measurement
for unity coherence:
CB
BC
VV
V
SS
S
22
brerr VVV SSS
UTA Noise and Reliability Laboratory 9
Dominant noise source 0.7x100 μm2 NPN, thickest IFO,
RS=1MΩ0.7x100 μm2 PNP, thickest IFO, RS=1MΩ
100
101
102
103
104
105
106
0
1
10-8 10-7 10-6
measured at 1 HzS
IB contribution dominant
SIC
contribution dominantS
Vr contribution dominant
S VC/S
VB
Coh
eren
ce (a
t 1 H
z)
IB (A)
0.5
10-1
100
101
102
103
104
105
106
0
1
10-7 10-6 10-5
measured at 1 HzS
IB contribution dominant
SIC
contribution dominantS
Vr contribution dominant
S VC/S
VB
Coh
eren
ce (a
t 1 H
z)
IB (A)
0.5
Calculated SVC/SVB considering SIB contribution dominant closely matches experimental SVC/SVB; SIB contribution dominant.
UTA Noise and Reliability Laboratory 10
Outline Introduction:
Limitations in existing noise models. Importance and motivation of research.
Noise in polysilicon emitter bipolar transistors: Experimental setup. SIB modeling:
noise mechanisms, effect of bias, geometry and IFO. SIC modeling:
noise mechanisms, effect of bias and IFO. SVr modeling:
Collector-emitter measurement setup, effect of bias and IFO. Computer codes.
Noise in SiGe heterojunction bipolar transistors: Dominant noise source. Effect of selective collector implant. Effect of higher extrinsic base implant. Effect of SiGe epi-SiGe poly interface. Effect of emitter-poly overlap. Physical origin and modeling of SIB.
Conclusion
UTA Noise and Reliability Laboratory 11
Area dependence of SIB in NPN transistors
10-23
10-22
10-21
10-20
1 10
IB= 0.1mA
IB= 0.2mA
IB= 0.3mA
IB= 0.4mA
IB= 0.5mA
IB= 0.6mA
S IB (A
2 /Hz)
Emitter Area (m2)
~ 1/A
Noise source homogeneously
distributed underneath the emitter.
[ Darby Lan ]
UTA Noise and Reliability Laboratory 12
Internal emitter resistance and ideality factor of base current
1
1.1
1.2
1.3
1.4
1.5
1.6
1.0E-03 5.0E-03 9.0E-03 1.3E-02 1.7E-02
gmi (ohm-1)
m
re=27.8 ohmnb=1.07
~ m = 27.8 gmi + 1.07
0.7x100 μm2 NPN, thickest IFO, RS=1MΩ
C
B
V
V
i
LSS
rRm
imi r
g
Bi qI
kTr
bmie ngrm
m
gmi (ohm-1)
UTA Noise and Reliability Laboratory 13
Base current dependence diffusion fluctuation in emitter.
tunneling fluctuation in IFO.
recombination fluctuation in emitter- base space charge region.
recombination fluctuation at spacer oxide interface.
Emitter perimeter dependence Noise source distributed homogeneously around the emitter. Recombination fluctuation at the spacer oxide interface.
Emitter area dependence Noise source distributed homogeneously underneath the
emitter. Diffusion fluctuation in emitter or tunneling fluctuation in IFO.
diffdiffB BI IS
2tuntunB BI IS
2recrecB BI IS
Physical origin of SIB
UTA Noise and Reliability Laboratory 14
recBtunBdiffBB IIII SSSS
tunBdiffBB III SSS
Unity ideality factor of negligible .
negligible .
BI
recBIS
recBI
Physical origin of SIB (cont.)
UTA Noise and Reliability Laboratory 15
Diffusion and tunneling fluctuation component of SIB
1.00E-17
2.10E-16
4.10E-16
6.10E-16
8.10E-16
1.E-08 2.E-07 3.E-07 5.E-07 6.E-07 8.E-07
IB(A)
S IB/I B
(A/H
z)
~ SIB/IB = 1.13x10-9 IB + 7.85x10-17
SIBT = 1.13x10-9
SIBD = 7.85x10-17
0.7x100 μm2 NPN, medium IFO, RS=1MΩ
TBDBB III SSS
2BTBD IKFIKF
BTDB
I IKFKFI
SB
UTA Noise and Reliability Laboratory 16
Area dependence of tunneling fluctuation of SIB in PNP transistors
Tunneling-fluctuation source homogeneously distributed underneath
the emitter.
Thickest oxide
Smaller device-dimension severely affected by
lateral diffusion and mask undercut; effective
emitter area considered.10-10
10-9
10-8
10-7
10-1 100 101 102
KF T
Emitter area: AE (m2)
~1/AE
(0.847)
Thickest IFO
UTA Noise and Reliability Laboratory 17
Wm WpL
0 x1 x2 x3
base mono-silicon
oxide Poly-silicon
metal contact
c
arri
er c
once
ntra
tion
p(
x) sox
sm
p(x)
p(x)
αm, Dm αp, Dp
p
pmDWs
xpxp
132
1
1
1110
p
p
moxm
mDW
ssDW
xpp
232
1
11
)()(ln
)()0(ln
moxp
p
m
m
p
p
m
m
B
I
ssDW
DW
xpxp
fDq
xpp
fDq
I
SDB
Diffusion fluctuation in SIB
αm : Hooge parameter in mono-Si
αp : Hooge parameter in poly-Si
Assumption: αm = αp =α
UTA Noise and Reliability Laboratory 18
Tunneling fluctuation in SIB
tan
ox
oV
oxide permittivity barrier height for the minority carriers modified Planck’s constantarea of IFOloss tangent of the oxide
A
2
2
211
mn
t
p
p
m
m
mox
B
I
t
SDW
DW
ss
I
SmnTB
AfVqkTLm
t
S
oxomn
tmn
2
3*
2 3tan
mnt
mntS
*m
q
k
L
tunneling probability of minority carriers fluctuation in effective mass of minority carrierselectronic chargeBoltzmann constant IFO thickness
mnt
UTA Noise and Reliability Laboratory 19
Scaling effect on SIB
Relative AF
IFO thickness0.7x100( μm2 )
0.7x0.7( μm2 )
thickest 1.12 1.89medium 1.23 2.09thinnest 1.01
Diffusion fluctuation dominant in large (0.7x100μm2) devices.
Tunneling fluctuation dominant in small (0.7x0.7μm2) devices.
AFBI IKFS
B
AF for SIB in PNP transistors
tunBdiffBB III SSS
2BTBD IKFIKF
UTA Noise and Reliability Laboratory 20
Scaling effect on SIB in PNP transistors with thickest IFO
Total SIB
Tunneling fluctuation component of SIB
Diffusion fluctuation component of SIB
SIB
SIBT
SIBD
10-24
10-23
10-22
10-21
10-20
10-19
S I(A2 /H
z)
A = 0.7x100m2
AF=1.12
Diffusion fluctuation dominant
10-24
10-23
10-22
10-21
10-20
10-19
10-18
A = 0.7x10m2
AF=1.79
10-24
10-23
10-22
10-21
10-20
10-19
10-8 10-7 10-6 10-5
S I(A2 /H
z)
A = 0.7x0.7m2
AF=1.89
Tunneling fluctuation dominant
10-24
10-23
10-22
10-21
10-20
10-19
10-8 10-7 10-6 10-5
IB(A)
A = 0.7x2.8m2
AF=1.66
UTA Noise and Reliability Laboratory 21
Poly-Si emitter
oxide dl
ds
mono-Si emitter
dl < ds
Large device small device
base
Thicker polysilicon in smaller transistors. Lower dopant concentration; shallower junction.
higher chance for minority carriers from base to reach and tunnel through the oxide interface; tunneling fluctuation dominant.
FLUORINE EFFECT: fluorine enhances oxide break-up. lower fluorine (from BF2) concentration causes less oxide breakup in smaller PNP devices; increased
tunneling: (no fluorine in the transistors studied here)
Emitter plug effect in smaller device
UTA Noise and Reliability Laboratory 22
Poly-Si emitter
oxide d1
d1 < d2
base
d2
mono-Si emitter
Polysilicon surface almost perpendicular to wafer surface at emitter window sidewall.
Reduced doping concentration in the perimeter region.
Shallower junction close to emitter window perimeter. An overlap of the emitter-base space charge region
with poly-mono silicon interface might occur close to perimeter.
Perimeter depletion effect
UTA Noise and Reliability Laboratory 23
Perimeter/area vs. emitter area
emitter area (μm2)
Peri
met
er/a
rea
For smaller transistors perimeter/area ratio increases sharply. non ideal peripheral component of base current
increases. fluctuation in non-ideal base current might become
significant.
Perimeter depletion effect in smaller transistors
1.00
2.00
3.00
4.00
5.00
0 20 40 60 80 100 120
UTA Noise and Reliability Laboratory 24
Effect of IFO on DC characteristics of 0.7x100μm2 NPN transistors
0
100
200
300
400
500
600thickest IFOmedium IFOthinnest IFO
0.3 0.4 0.5 0.6 0.6 0.7 0.8 0.9 110-14
10-12
10-10
10-8
10-6
10-4
10-2
100
102
IC (thickest IFO)
IB (thickest IFO)
IC (medium IFO)
IB (medium IFO)
IC (thinnest IFO)
IB (thinnest IFO)
0.3 0.4 0.5 0.6 0.6 0.7 0.8 0.9 1
IC
IB
Cur
rent
(A)
Cur
rent
gai
n
VBE
(V)
IFO increases the current gain significantly.
UTA Noise and Reliability Laboratory 25
Effect of IFO on DC characteristics of 0.7x100μm2
PNP transistors
10-12
10-10
10-8
10-6
10-4
10-2
100
102
0.3 0.4 0.5 0.6 0.6 0.7 0.8 0.9 1
IC (thickest IFO)
IB (thickest IFO)
IC (medium IFO)
IB (medium IFO)
IC (thinnest IFO)
IB (thinnest IFO)
IC
IB
0
40
80
120
160
0.3 0.4 0.5 0.6 0.6 0.7 0.8 0.9 1
thickest IFOmedium IFOthinnest IFO
VBE
(V)
Cur
rent
(A)
Cur
rent
gai
n
No significant improvement in current gain with increasing IFO thickness.
UTA Noise and Reliability Laboratory 26
Effect of interfacial oxide on SIB in NPN and PNP transistors
10-24
10-23
10-22
10-21
10-20
10-19
10-8 10-7 10-6 10-5
thickest IFOmedium IFOthinnest IFO
S IB (A
2 /Hz)
IB (A)
10-24
10-23
10-22
10-21
10-20
10-19
10-8 10-7 10-6 10-5
thickest IFOmedium IFOthinnest IFO
S IB (A
2 /Hz)
IB (A)
0.7x100 μm2 NPN 0.7x100 μm2 PNP
IFO increases SIB both in NPN and PNP transistors.
UTA Noise and Reliability Laboratory 27
In PNP, diffusion fluctuation in mono and poly-silicon emitter dominates; less effect of IFO.
In NPN, both diffusion fluctuation in mono and poly-silicon emitter, and tunneling fluctuation through IFO contribute.
tundiffB IBIBI SSS 2IBKFIBKF TD
AFBI IKFS
B
Difference in the effect of IFO in NPN and PNP transistors
0.7x100μm2 transistors
Device type
AF
PNP ~ 1NPN ~ 1.5
UTA Noise and Reliability Laboratory 28
Physics behind difference in NPN and PNP transistors
Hole barrier height larger than electron barrier height at interfacial oxide: minority carriers (holes) severely suppressed in NPN; significant
current gain improvement. minority carriers (electrons) not suppressed significantly in
PNP; little current gain improvement. Effect of fluorine:
fluorine accelerates oxide break-up. fluorine from emitter dopant BF2 in PNP creates more oxide
breakup; reduced tunneling and increased diffusion through broken oxide.
Increased oxide breakup and faster diffusion of boron makes the emitter deeper in PNP: increased recombination-base current, reduced current gain
improvement. higher diffusion fluctuation in larger monosilicon emitter region.
Different oxidation rate of the base material could create different IFO thickness for NPN and PNP transistors on the same wafer.
UTA Noise and Reliability Laboratory 29
Outline Introduction:
Limitations in existing noise models. Importance and motivation of research.
Noise in polysilicon emitter bipolar transistors: Experimental setup. SIB modeling:
noise mechanisms, effect of bias, geometry and IFO. SIC modeling:
noise mechanisms, effect of bias and IFO. SVr modeling:
Collector-emitter measurement setup, effect of bias and IFO. Computer codes.
Noise in SiGe heterojunction bipolar transistors: Dominant noise source. Effect of selective collector implant. Effect of higher extrinsic base implant. Effect of SiGe epi-SiGe poly interface. Effect of emitter-poly overlap. Physical origin and modeling of SIB.
Conclusion
UTA Noise and Reliability Laboratory 30
10-21
10-20
10-19
10-18
10-17
10-16
10-15
10-5 10-4 10-3
thickest IFO: AFC=1.72medium IFO: AFC=1.71
S IC (A
2 /Hz)
IC (A)
10-21
10-20
10-19
10-18
10-17
10-16
10-15
10-6 10-5 10-4 10-3
thickest IFO: AFC=1.54medium IFO: AFC=1.74thinnest IFO: AFC=2.01
S IC (A
2 /Hz)
IC (A)
0.7x100 μm2 NPN 0.7x100 μm2 PNP
Effect of interfacial oxide on SIC
IFO increases SIC both in NPN and PNP transistors.
UTA Noise and Reliability Laboratory 31
Some researchers assign the same origin of SIB to SIC.
is merely an amplified SIB.
SIC modeling
DCNCC III SSS
CDCN IKFIKF 22L
VI
R
SS CC
Number fluctuation in SIC requires further investigation.
carrier transport determined by electric field in base collector
junction.
Hooge type fluctuation at the collector side of base-
collector junction.
)12( KCI IS
C
KCIh 22
1K
1.E-07
1.E-06
1.E-05
1.E-05 1.E-04 1.E-03IC (A)
outp
ut c
ondu
ctan
ce h 22
(ohm
-1)
~ IC(0.98)
K=0.98
0.7x100μm2 PNP, thickest IFO
UTA Noise and Reliability Laboratory 32
n(x)
α, D
Diffusion fluctuation in SIC
)()0(ln2 BBC
I
Wnn
fWqD
I
SDC B
Bs
B WDWD
Wnn
//
)()0(
s saturated drift velocity
WB
collector
0
base mono-silicon
oxide Poly-silicon
metal contact
c
arri
er c
once
ntra
tion
n(
x)
UTA Noise and Reliability Laboratory 33
Outline Introduction:
Limitations in existing noise models. Importance and motivation of research.
Noise in polysilicon emitter bipolar transistors: Experimental setup. SIB modeling:
noise mechanisms, effect of bias, geometry and IFO. SIC modeling:
noise mechanisms, effect of bias and IFO. SVr modeling:
Collector-emitter measurement setup, effect of bias and IFO. Computer codes.
Noise in SiGe heterojunction bipolar transistors: Dominant noise source. Effect of selective collector implant. Effect of higher extrinsic base implant. Effect of SiGe epi-SiGe poly interface. Effect of emitter-poly overlap. Physical origin and modeling of SIB.
Conclusion
UTA Noise and Reliability Laboratory 34
Effect of bias on coherence in NPN and PNP transistors
0
0.2
0.4
0.6
0.8
1
1.2
100 101 102 103 104 105C
oher
ence
Frequency (Hz)
a: IB= 301 nA
b: IB=493 nA
c: IB=1.09
d: IB=1.48
e: IB=1.99
0.7x100 μm2 NPN, thickest IFO, RS=1MΩ 0.7x100 μm2 PNP, thickest IFO, RS=1MΩ
0
0.2
0.4
0.6
0.8
1
100 101 102 103 104 105
Coh
eren
ce
Frequency (Hz)
a: IB= 72 nA
b: IB=264 nA
c: IB=384 nA
d: IB=546 nA
e: IB=760 nA
'a' to 'e'(increasing bias current)
Coherence decreases with increasing bias in NPN transistor.
UTA Noise and Reliability Laboratory 35
10-17
10-16
10-15
10-14
10-13
10-12
100 101 102 103 104 105
RS=1MRS=100KRS=50KRS=10KBackground noise
S VB (V
2 /Hz)
Frequency (Hz)
decreasing RS
10-15
10-14
10-13
10-12
10-11
10-10
10-9
100 101 102 103 104 105
RS=1MRS=100KRS=50KRS=10KRS=1KRS=120
S VC (V
2 /Hz)
Frequency (Hz)
decreasing RS
Effect of varying base bias resistance (RS) on SV
0.7x100 μm2 NPN, thickest IFO, IB=384nA
SVC does not decrease any more for RS smaller than 1 kΩ. SVB becomes comparable to system background noise for
RS smaller than 10 kΩ.
UTA Noise and Reliability Laboratory 36
4.8V 12V
1K100K
RS
RL
SVE SVC
RE
Collector-emitter measurement setup
UTA Noise and Reliability Laboratory 37
0.7x100 μm2 NPN, thickest IFO, RS=100Ω
Dominant noise source in collector-emitter measurement
Unity coherence.One single
dominant noise source:
SIC or SVr?
101
102
103
104
105
10-7 10-6 10-5
measured
SIC
contribution dominant
SIB
contribution dominant
SVr
contribution dominant
S VC/S
VE
cohe
renc
e at
1 H
z
IB (A)
0.5
1
0
UTA Noise and Reliability Laboratory 38
10-18
10-17
10-16
10-15
10-14
10-4 10-3 10-2
thickest IFO : AFC=3.21
medium IFO : AFC=3.58
S IC (A
2 /Hz)
IC (A)
SIC in collector-emitter measurement
0.7x100 μm2 NPN, RS=100Ω
no physical explanation for
such high current dependence:SPURIOUS?
AFCCI IKFCS
C
58.3~05.3AFC
UTA Noise and Reliability Laboratory 39
10-15
10-14
10-13
10-12
10-11
10-4 10-3 10-2
thickest IFO
medium IFO
S Vr (V
2 /Hz)
IE (A)
~ IE
2
err VV SS
erE SI 2
brerr VVV SSS
0.7x100 μm2 NPN, RS=100Ω
Effect of interfacial oxide on SVr
UTA Noise and Reliability Laboratory 40
Effect of internal resistance in collector-emitter measurement
0.7x100 μm2 NPN, thickest IFO
Collector-base measurement, RS=1MΩ
Collector-emitter measurement, RS=100Ω
1.E-12
1.E-11
1.E-10
1.E-09
1.E-08
1.E-07
1.E-06
1.E-05
1.E-04
1.E-03
0.4 0.5 0.6 0.7 0.8 0.9 1VBE (V)
Bas
e cu
rren
t (A
)
noise measurement
region
exponential fitted line( η=1.12 )
1.E-12
1.E-11
1.E-10
1.E-09
1.E-08
1.E-07
1.E-06
1.E-05
1.E-04
1.E-03
0.4 0.5 0.6 0.7 0.8 0.9 1VBE (V)
Bas
e cu
rren
t (A
)
noise measurement
region
exponential fitted line( η=1.1 )
UTA Noise and Reliability Laboratory 41
Tunneling fluctuation through interfacial oxide
AfVqkTLm
t
S
r
S
oxomj
t
e
r mje
2
3*
22 3tan
mjt tunneling probability of the majority carriers through IFO
mjtS fluctuation in mjt
base mono-silicon
oxide Poly-silicon
metal contact
fluctuation in minority carrier tunneling
fluctuation in majority carrier tunneling erS
TBIS
UTA Noise and Reliability Laboratory 42
Interfacial oxide thickness
Relative Emitter area interfacial oxide thickness (Å) fromIFO thickness (μm2) minority carrier majority carrier
fluctuation (SIBT) fluctuation (SVre)
PNP NPN NPN 0.7x100 14.50 4.08
thickest 0.7x10 16.90
0.7x2.8 14.50
0.7x0.7 11.00
medium 0.7x100 4.13 11.30 2.26
0.7x0.7 8.78
thinnest 0.7x100 2.70
0.7x0.7 2.81
VVh 363.0 VVe 097.0
oh mm 81.0* oe mm 08.1*
tan
Inconsistency:uncertainty in loss tangent, mass and potential barrier of the carriers at oxide interface.
obtained
from Kleinpenning et. al, IEEE Trans. on Elec. Dev., vol. 42, 1995.
as high as 1.8V and as high 1 V found in literature.
unique for each sample.tanhV eV
UTA Noise and Reliability Laboratory 43
Outline Introduction:
Limitations in existing noise models. Importance and motivation of research.
Noise in polysilicon emitter bipolar transistors: Experimental setup. SIB modeling:
noise mechanisms, effect of bias, geometry and IFO. SIC modeling:
noise mechanisms, effect of bias and IFO. SVr modeling:
Collector-emitter measurement setup, effect of bias and IFO. Computer codes.
Noise in SiGe heterojunction bipolar transistors: Dominant noise source. Effect of selective collector implant. Effect of higher extrinsic base implant. Effect of SiGe epi-SiGe poly interface. Effect of emitter-poly overlap. Physical origin and modeling of SIB.
Conclusion
UTA Noise and Reliability Laboratory 44
Experimental and Simulated data
Simulated Noise vs Lab
0.1
1.0
10.0
100.0
1000.0
1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07
Freq (Hz)
Nois
e (V
/sqr
t(Hz)
AU)
Production Models THS4271 Lab Spot Models
Noise data measured at TI
Simulation results vs. Measured
Experimental data
Simulated with existing model
Simulated with modified model
UTA Noise and Reliability Laboratory 45
Computer source code
Existing BERKELEY SPICE source code has been modified. Source code written at Texas Instruments Inc. by
Douglas Weiser. and have been added to the
existing noise model in addition to . An area scaling factor has been added to the
equations to make the noise models scalable.
The modified BERKELEY SPICE source code is available to the SRC (Semiconductor Research Corporation) member companies (TI, Intel, IBM, Motorola, National Semiconductor Corporation, AMD, etc.)
CIS rVS
BIS
UTA Noise and Reliability Laboratory 46
Outline Introduction:
Limitations in existing noise models. Importance and motivation of research.
Noise in polysilicon emitter bipolar transistors: Experimental setup. SIB modeling:
noise mechanisms, effect of bias, geometry and IFO. SIC modeling:
noise mechanisms, effect of bias and IFO. SVr modeling:
Collector-emitter measurement setup, effect of bias and IFO. Computer codes.
Noise in SiGe heterojunction bipolar transistors: Dominant noise source. Effect of selective collector implant. Effect of higher extrinsic base implant. Effect of SiGe epi-SiGe poly interface. Effect of emitter-poly overlap. Physical origin and modeling of SIB.
Conclusion
UTA Noise and Reliability Laboratory 47
xyz
shallow trench shallow trench
n+ poly Si emitter SiGe epi-SiGe poly interface dielectric isolation
n+ Si emitter
p+ SiGe poly p+ SiGe poly
DTI(deep trench
isolation)
p+ SiGe epi
p+ SiGe epi
DTI(deep Trench
isolation)
p SiGe epi
DTI(deep trench
isolation)
Device structure under investigation
x = emitter-poly overlapy = composite enclosure of polyz = DTI enclosure of composite
Selectively implanted
collector
Transistors described as x-y-z; e.g. SIC:25-10-25.
UTA Noise and Reliability Laboratory 48
100
101
102
103
104
105
10-6 10-5 10-4
experimentalS
IB contribution dominant
SIC
contribution dominantS
Vr contribution dominant
S VC/S
VB
IB (A)
SIC:20-20-40
103
104
105
106
0
0.2
0.4
0.6
0.8
1
10-6 10-5 10-4
base series resistanceinput resistancecoherence at 10 Hz
Res
ista
nce
(
Coh
eren
ce a
t 10
Hz
IB (A)
SIC:20-20-40
Dominant noise source
Calculated SVC/SVB with SIB contribution dominant closely matches experimental SVC/SVB ; SIB contribution dominant.
IB increases rπ decreases coherence increases.
UTA Noise and Reliability Laboratory 49
Outline Introduction:
Limitations in existing noise models. Importance and motivation of research.
Noise in polysilicon emitter bipolar transistors: Experimental setup. SIB modeling:
noise mechanisms, effect of bias, geometry and IFO. SIC modeling:
noise mechanisms, effect of bias and IFO. SVr modeling:
Collector-emitter measurement setup, effect of bias and IFO. Computer codes.
Noise in SiGe heterojunction bipolar transistors: Dominant noise source. Effect of selective collector implant. Effect of higher extrinsic base implant. Effect of SiGe epi-SiGe poly interface. Effect of emitter-poly overlap. Physical origin and modeling of SIB.
Conclusion
UTA Noise and Reliability Laboratory 50
Selectively implanted collector (SIC)
Higher collector doping
Higher collector-base capacitance
Lower maxf
Retarded Kirk-effect Higher Tf
Selectively implanted collector
Higher and reduced degradation of
Reduced base-width by compensation of boron tail
Tf
maxf
UTA Noise and Reliability Laboratory 51
Effect of selectively implanted collector
10-14
10-12
10-10
10-8
10-6
10-4
10-2
0
50
100
150
200
250
300
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
SIC:25-10-2525-10-25
noise measurementregion
I B, I
C (A
)
curr
ent g
ain:
VBE
(V)
IC
IB
10-21
10-20
10-19
10-18
10-7 10-6 10-5
SIC:25-10-2525-10-25
S IB.f
(A2 ) a
t 10
Hz
IB (A)
~ IB
2
SIC retards Kirk-effect higher β for wider range of bias.
No degradation in noise.
UTA Noise and Reliability Laboratory 52
Outline Introduction:
Limitations in existing noise models. Importance and motivation of research.
Noise in polysilicon emitter bipolar transistors: Experimental setup. SIB modeling:
noise mechanisms, effect of bias, geometry and IFO. SIC modeling:
noise mechanisms, effect of bias and IFO. SVr modeling:
Collector-emitter measurement setup, effect of bias and IFO. Computer codes.
Noise in SiGe heterojunction bipolar transistors: Dominant noise source. Effect of selective collector implant. Effect of higher extrinsic base implant. Effect of SiGe epi-SiGe poly interface. Effect of emitter-poly overlap. Physical origin and modeling of SIB.
Conclusion
UTA Noise and Reliability Laboratory 53
Higher extrinsic base implant (HEBI)
High dose implantation in extrinsic base
Smaller base resistance
Higher maxf
Lower RF noise figure
UTA Noise and Reliability Laboratory 54
Effect of higher extrinsic base implant
10-14
10-12
10-10
10-8
10-6
10-4
10-2
0
100
200
300
400
500
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
SIC:25-10-25HEBI,SIC:25-10-25
noise measurementregion
I B, I
C (A
)
curr
ent g
ain:
V
BE (V)
IC I
B
10-21
10-20
10-19
10-18
10-7 10-6 10-5
SIC:25-10-25HEBI,SIC:25-10-25
S IB.f
(A2 ) a
t 10
Hz
IB (A)
~ IB
2
Higher gain for higher extrinsic base implant is possibly due to relative changes in Ge profile.
No degradation in noise.
UTA Noise and Reliability Laboratory 55
Outline Introduction:
Limitations in existing noise models. Importance and motivation of research.
Noise in polysilicon emitter bipolar transistors: Experimental setup. SIB modeling:
noise mechanisms, effect of bias, geometry and IFO. SIC modeling:
noise mechanisms, effect of bias and IFO. SVr modeling:
Collector-emitter measurement setup, effect of bias and IFO. Computer codes.
Noise in SiGe heterojunction bipolar transistors: Dominant noise source. Effect of selective collector implant. Effect of higher extrinsic base implant. Effect of SiGe epi-SiGe poly interface. Effect of emitter-poly overlap. Physical origin and modeling of SIB.
Conclusion
UTA Noise and Reliability Laboratory 56
SiGe epi-SiGe poly interface
Non-selective epitaxial growth of SiGe base
SiGe epi on top of exposed Si
SiGe poly on top of shallow trench
Interface of epitaxial and polycrystalline SiGe
smaller distance between SiGe epi-SiGe poly interface & intrinsic base
Smaller base-collector capacitance
Higher maxf
TfHigher
UTA Noise and Reliability Laboratory 57
Effect of SiGe epi-SiGe poly interface
10-14
10-12
10-10
10-8
10-6
10-4
10-2
0
50
100
150
200
250
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
SIC:20-10-25SIC:20-20-40
noise measurement region
I B, I
C (A
)
curr
ent g
ain:
V
BE (V)
IC
IB
10-22
10-21
10-20
10-19
10-18
10-17
10-7 10-6 10-5 10-4
SIC:20-20-40SIC:20-10-25
S IB.f
(A2 ) a
t 10
Hz
IB (A)
~ IB
2
No significant impact on DC characteristics. No degradation in noise; boron implantation in
extrinsic base passivates the interface-defects.
UTA Noise and Reliability Laboratory 58
Outline Introduction:
Limitations in existing noise models. Importance and motivation of research.
Noise in polysilicon emitter bipolar transistors: Experimental setup. SIB modeling:
noise mechanisms, effect of bias, geometry and IFO. SIC modeling:
noise mechanisms, effect of bias and IFO. SVr modeling:
Collector-emitter measurement setup, effect of bias and IFO. Computer codes.
Noise in SiGe heterojunction bipolar transistors: Dominant noise source. Effect of selective collector implant. Effect of higher extrinsic base implant. Effect of SiGe epi-SiGe poly interface. Effect of emitter-poly overlap. Physical origin and modeling of SIB.
Conclusion
UTA Noise and Reliability Laboratory 59
Effect of emitter-poly overlap
10-15
10-14
10-13
10-12
10-11
10-10
IB = 0.5 A
IB = 1 A
IB = 4 A
100 101 102 103
~ 1/f
S VC (V
2 /Hz)
SIC:20-10-25
Frequency (Hz)
10-15
10-14
10-13
10-12
10-11
10-10
100 101 102 103
IB = 0.5uA
IB = 1uA
IB = 4uA
IB = 10uA
S VC (V
2 /Hz)
Frequency (Hz)
SIC:10-10-25~ 1/f
Significant g-r noise for smaller emitter-poly overlap. g-r noise diminished at higher currents in comparison
to increased 1/f noise.
UTA Noise and Reliability Laboratory 60
Effect of emitter-poly overlap (cont.)
10-22
10-21
10-20
10-19
10-18
10-17
10-7 10-6 10-5 10-4
SIC:25-10-25SIC:20-10-25SIC:10-10-25
S IB .f
at 1
0 H
z (A
2 )IB(A)
~ IB
2
10-14
10-12
10-10
10-8
10-6
10-4
0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1
SIC:25-10-25SIC:20-10-25SIC:10-10-25
I B (A
)
VBE
(V)
r = 3.08
Higher non-ideal base current for smaller emitter-poly overlap.
SIB deviates from ~IB2 dependence for smaller emitter-
poly overlap.
UTA Noise and Reliability Laboratory 61
Outline Introduction:
Limitations in existing noise models. Importance and motivation of research.
Noise in polysilicon emitter bipolar transistors: Experimental setup. SIB modeling:
noise mechanisms, effect of bias, geometry and IFO. SIC modeling:
noise mechanisms, effect of bias and IFO. SVr modeling:
Collector-emitter measurement setup, effect of bias and IFO. Computer codes.
Noise in SiGe heterojunction bipolar transistors: Dominant noise source. Effect of selective collector implant. Effect of higher extrinsic base implant. Effect of SiGe epi-SiGe poly interface. Effect of emitter-poly overlap. Physical origin and modeling of SIB.
Conclusion
UTA Noise and Reliability Laboratory 62
10-22
10-21
10-20
10-19
10-18
10-17
10-7 10-6 10-5 10-4
20-20-40SIC:20-20-4010-20-40SIC:10-20-4025-10-25
SIC:25-10-25SIC:20-10-25SIC:10-10-25HEBI:25-10-25HEBI,SIC:25-10-25
S IB .f
at 1
0 H
z (A
2 )
IB(A)
~ IB
2
1
1.2
1.4
1.6
1.8
2
1 1.5 2 2.5 3 3.5 4
AF
r
smaller emitter-poly overlap (x = 0.1 m)
Physical origin of SIB
All except smaller emitter-poly overlap ηr≤1.6, AF≈2.
Smaller emitter-poly overlap ηr>3, AF≈1.
UTA Noise and Reliability Laboratory 63
SIB model
21 BI IKFS B
22
1)2(1
1
i
iN
iB
fIKF
1N i
2AF
Total number of traps in emitter- base junction.
Characteristics time constant of ith trap.
SRH g-r centers in E-B depletion region
Capture and emission of carriers
Perturbation in free carrier density
Continuous distribution of time constants
1/f noiseSuperpositionof Lorentzians
: :
UTA Noise and Reliability Laboratory 64
Noise from Surface recombination current
Smaller emitter-poly overlap
Extrinsic base moves closer to emitter perimeter
Two parallel BJTs
n+ emitter, p SiGe intrinsic base, collector
n+ emitter, p+ SiGe extrinsic base, collector
Thin depletion region & high electric field
Recombination through trap assisted tunneling
n+ emitter - p+ extrinsic base diode
n+ poly Si emitter
p SiGe epi(intrinsic base)
p+ SiGe epi(extrinsic base)
n+ Si emitter
dielectric isolation
UTA Noise and Reliability Laboratory 65
SIB model for smaller emitter-poly overlap
1AF
fKTAC
NqKF
sc22
42
2N
A scC
Oxide slow state volume density.
Attenuation tunneling distance.
Area of surface region.
Surface capacitance per unit area.
: :
: :
AFBI IKFS B
From intrinsic E-B junction
From surface of E-B junction
22
21 svB BBI IKFIKFS
UTA Noise and Reliability Laboratory 66
1.E-15
1.E-14
1.E-13
1.E-12
1.E-11
1.E-10
1.E-09
1.E-08
1.E-07
1.E-06
1.E-05
1.E-04
1.E-03
0 0.2 0.4 0.6 0.8 1
ηi = 1.09
ηr = 1.47 IBs
IBv = IB - IBs
I B(A
)
VBE(V)
22
2
12KF
I
IKF
I
S
s
v
s
B
B
B
B
I
2N = 9.65x1015 ~ 3.08x1016 /eV/cm3.
Published values = 1017 ~ 1018 /ev/cm3.
Uncertainties in and . scC)exp(KT
qVII
r
BEBB sos
22
21 svB BBI IKFIKFS
Separation of SIB components
UTA Noise and Reliability Laboratory 67
Outline Introduction:
Limitations in existing noise models. Importance and motivation of research.
Noise in polysilicon emitter bipolar transistors: Experimental setup. SIB modeling:
noise mechanisms, effect of bias, geometry and IFO. SIC modeling:
noise mechanisms, effect of bias and IFO. SVr modeling:
Collector-emitter measurement setup, effect of bias and IFO. Computer codes.
Noise in SiGe heterojunction bipolar transistors: Dominant noise source. Effect of selective collector implant. Effect of higher extrinsic base implant. Effect of SiGe epi-SiGe poly interface. Effect of emitter-poly overlap. Physical origin and modeling of SIB.
Conclusion
UTA Noise and Reliability Laboratory 68
Conclusion
The base current fluctuations dominate at relatively high external base resistance values.
Collector current fluctuations contribute when the external base resistance becomes comparable to or less than the input resistance.
Fluctuations caused by the internal emitter resistance take over for high currents with small base resistance.
From the dependence of noise magnitude on the geometry and temperature, fluctuations in the non-ideal base current was neglected.
Polysilicon emitter bipolar transistors:
UTA Noise and Reliability Laboratory 69
Conclusion (cont.)
SIB originates from diffusion fluctuations of minority carriers in poly and monosilicon emitter, and tunneling fluctuations of minority carriers at IFO; SIC from diffusion and number fluctuations of minority carriers in base, and SVre from tunneling fluctuations of majority carrier at IFO.
Diffusion fluctuations dominate over the tunneling fluctuations for larger devices; tunneling fluctuations dominate over diffusion fluctuations for the smaller ones.
IFO increases the current gain significantly in NPN; both tunneling and diffusion fluctuations contribute.
No significant improvement with increasing IFO thickness in PNP; diffusion fluctuations dominant.
UTA Noise and Reliability Laboratory 70
Conclusion (cont.)
Selectively implanted collector causes higher current gain for wider range of bias; no noise degradation.
No significant effect of SiGe epi-SiGe poly interface and higher extrinsic base implant.
Severe impact of smaller emitter-poly overlap: increases non-ideality of the base current;
trap assisted tunneling current due to parasitic BJT.
g-r noise at lower bias currents. At higher bias currents, fluctuations from trap
assisted tunneling current contribute. For all transistors except smaller emitter poly
overlap, noise originates from intrinsic E-B junction.
SiGe heterojunction bipolar transistors:
UTA Noise and Reliability Laboratory 71
Acknowledgements
Zeynep Celik-ButlerSupervising Professor:
UTA Noise & Microsensor Group:
Semiconductor Research Corporation:
Texas Higher Education Board, Advanced Technology Prog.
Texas Instruments Inc. National Semiconductor Corporation
Bigang Min, Siva P. Devireddy, Shadi Dayeh, Enhai Zhao