Multilevel inverters design and simulation on matlab simulink

SCHOOL OF ENGINEERING

DISCIPLINE OF ELECTRICAL, ELECTRONICS AND COMPUTER ENGINEERING

Electrical Design 5

Topic:

DC-DC BUCK CONVERTER DESIGN

Report type:

Final Report

Compiled by: Khanyisani E. Mlondo (210522880)

Supervised by: Dr C. Venugopal

Date: 16 May 2014

Abstract

In this project, the practical design of the buck converter is detailed through

simulations in PSCAD and multisim circuit diagrams. The report shows the

design and selection of the electrical components that forms it. This is the final

report of the project and therefore consists of conceptual designs, simulations and

the practical design of the models.

Table of Content

sAbstract.........................................................................................................................2

List of Abbreviations....................................................................................................5

1) Introduction.............................................................................................................6

Literature Survey..........................................................................................................1

Continuous conduction mode...............................................................................................2

Discontinuous conduction mode...........................................................................................2

Design of Circuit Components.............................................................................................2

Operation at the Discontinuous and Continuous Mode boundary....................................3

Operation at the Continuous Conduction Mode...............................................................3

2) Design Procedure.....................................................................................................4

2.1) Requirement analysis....................................................................................................4

2.2) Specifications................................................................................................................4

2.2.2) Prototype Design and Simulation Studies.............................................................4

2.3) Objective and Solution..................................................................................................4

Prototype Design..............................................................................................................5

Triangular wave generator................................................................................................6

Power Consumption..........................................................................................................6

Mosfet:..............................................................................................................................6

Diode:...............................................................................................................................7

Inductor:............................................................................................................................7

Total Power loss:..............................................................................................................7

4) Plan...........................................................................................................................7

5) Conclusion................................................................................................................9

6) References..............................................................................................................10

Appendices.................................................................................................................11

7.1) Appendix A.................................................................................................................11

Buck Chopper Operation..............................................................................................11

Minimum Capacitance..................................................................................................13

Continuous and discontinuous mode boundary........................................................15

Output Capacitor and Inductor Transients.................................................................16

3.2) Appendix B..................................................................................................................17

(3.2.2) Simulation Results analysis.........................................................................19

2.2.2) Results, Discussion and PSCAD Circuit Diagram..................................................19

(3.2.3) Simulation Stages Results............................................................................21

7.1) Appendix C..........................................................................................................29

List of Abbreviations

Abbreviation MeaningV VoltsA AmperesBJT Bipolar Junction TransistorMOSFET Metal Oxide Semiconductor Field Effect

TransistorDC Direct CurrentAC Alternating CurrentPOL Point-of-LoadPSCAD Power System Computer Aided DesignFCT Field Controlled ThyristorCM Critical ModeCCM Continuous Conduction ModeDCM Discontinuos Conduction Mode

1) Introduction

1.1 Background

This is the Final Report for the DC-DC buck converter project in electrical design 5. This final report details the work of the project[1-5].

1.2 DC-DC Buck Converter

The DC-DC buck converter is a device that converts one DC voltage level to another DC voltage level with a minimal loss of energy. This device can be imagined as a transformer but for direct current instead of alternating current[5].

Although DC-DC converters for both increasing and decreasing the voltage level exist, this project focuses on a converter which decreases the voltage level (buck). The specific converter is a switching converter of Buck type. The power stage of this converter consists of a switch (MOSFET), a capacitor, an inductor, and a diode. More details about the design of the circuit are presented in the design protype section[1-5].

The simplest way to step down DC voltage is to use a resistor potential divider. This will however lead to great energy losses due to heating of the resistor. Another way is to use a resistor and a switch that is turned on and o regularly. This will lead to less energy losses, in fact as small as there will ever be possible. The output voltage of the system will not be a good one, it will alter from input to zero level and there will be a lot of high frequency components[6].

To get around the higher frequencies a low-pass filtering capacitor is introduced to the circuit. This will however invoke to large currents when switching, but is easily solved by connecting an inductor to the system. A diode is added to give the inductor current a path to low when the switch is turned off. This will get rid of the high frequencies and give a more stable output voltage[5-7].

This is the complete converter circuit and it will provide a relatively steady output voltage. There will be a ripple on the output voltage which won't make it an ordinary output voltage. This ripple is because the components are loaded and unloaded during the switching period. The size of the ripple is dependent on the switching frequency. There are ways to reduce the ripple and get an (almost) direct current output. One way is to manually adjust the switch duty cycle such that the output voltage remains constant. This method is the one that is used in this project[.

The previous two reports had been about the research, paper design and simulations about the design topic (DC-DC buck converter). Appendix B summarizes the simulations that were done in PSCAD. This final report is about the practical design of the converter.

Literature Survey

The DC-DC buck converters are power electronic circuits that transform a source of DC voltage from a higher DC voltage level to a lower DC voltage value. While the voltage is stepped down, the current is stepped up equally [1-5], this will be shown in this report. These converters employ a concept of switched mode conversion. In this concept, a power electronic switch is repeatedly switched on and off by a sequence of pulses that are delivered by an external circuit. The pulses cause the static switch to switch around on and off state. Figure 1 below shows the basic circuit diagram of a buck converter. In this figure, the controller that generates the pulses for the switch is omitted, it will be incorporated later, and only the pulses from the controller are shown.

L1

C2 RVs C1

U1

From PWM Loop

S1

VoS2

Figure 1: Basic circuit diagram of the buck converter

On a broader viewpoint, DC-DC buck converters for stepping up the voltage, stepping up and down, changing the voltage polarity also exist for different applications. These converters are categorized by their output voltage that they produce with respect to the input.

DC converters are also categorized according to the polarity of their output voltage and the direction of the output current in both conducting and non-conducting periods. In this method of classification, the buck converter falls under class A choppers because its output voltage is always positive and the current never reverses the direction. Appendix y shows a diagram that relates to this method of classifying choppers.

In figure 1, switch S1 is a controlled switch that is toggled by pulses. This can be a transistor, an IGBT or a thyristor. Switch S2 is a diode. This repetitive switching of the switch by pulses causes that the input voltage to be chopped at the output. This process causes the output voltage (V o) to be directly related to the input voltage by the duty cycle of the switch (S1). In addition to the output voltage being chopped, the output voltage is also made to consist of harmonics at the switching frequency. The LC filter that is formed by L1 and C2 exists to filter these harmonics [2].

At switching frequencies of 13 kHz and above, power MOSFETS are the lowest loss devices [4-5]. It is for this reason that power MOSFETS are the best switches for higher switching frequencies in buck converters.


Buck converters have two distinct modes of operation: (1) continuous conduction mode, (2) discontinuous conduction mode, and the critical mode. These modes are characterized by the current that flows through the inductor. The filter inductance that is in the circuit is a factor that controls the converter mode of operation. Equation 12 provides the value of the inductance that causes the converter to operate in the critical mode or boundary. This equation is derived in appendix A. If the filter inductance is less than LB, the converter operates in discontinuous mode.

LB=D (V ¿−V o)

2 I o F s

……………………………… ……………………………………….(12)

The ripple voltage in the inductance is minimized by connecting the output capacitance (C2). The minimum value of this capacitance is related to the ripple voltage and ripple current by equation 8. Again, equation 8 is derived in appendix A.

Cmin=∆ I L

8 F s ∆ V… ………………………………………… ………………………………… (8)

The design of filter capacitor needs to also consider the output voltage stability (changes in the output voltage because of the input voltage changes or the load changes). This condition is incorporated by further calculating the capacitance that will accommodate both CCM operation and stability. Equation 15 provides this value of the capacitance and is also derived in appendix A. C stab is usually greater than Cmin and is then acceptable in most cases because it exceeds the minimum capacitance.

C stab=L [I L+

∆ I L

2 ]2

[V o+∆ V ]2−V o2

………………………………………… ……………………….(15)

Continuous conduction mode

In this mode, the inductor current always fluctuates above zero. This is caused by the fact that the off-time is always shorter than the discharging time of the inductor. So the inductor never discharges fully. Equation 4 defines the value of the inductance that keeps the converter in the CCM.

L=[ V ¿−V o

∆ I L, on F s]D ……………… ………………………………………… ……………(4)

Discontinuous conduction mode

In this particular mode, the off-time is longer than the inductor discharging time. The inductor fully discharges such that the current momentarily remains zero. Any inductance value that is below LB will drive the converter to this mode of operation.

2


Design of Circuit ComponentsThe input voltage is a range, so the maximum value of the input voltage will be used.

Therefore; V ¿=24 V

At this input voltage,

Duty cycle = D = V o

V ¿= 6

24=0.25

Operation at the Discontinuous and Continuous Mode boundary

The converter operates in this mode if the inductor value is equal to LB as shown in equation 12. Cmin does not depend on the inductance and will thus be equal to Cmin for CCM.

LB=V o(1−D)

2 I o F s

=D (V ¿−V o)

2 I o F s

LB=6 (1−0.25 )

2 (2 ) (500 x103 )=2.25 μH

The capacitance that is critical for stability depends on the value of the inductance, so it must also be calculated.

C stab=L [I L+

∆ I L

2 ]2

[V o+∆ V ]2−V o2=

(2.5 x10−6 )[2+ 0.62 ]

2

[6+0.06 ]2−62=1.75 μF

In this mode, Cmin accommodates both the stability and DCM as it is greater than C stab.

Operation at the Continuous Conduction Mode

At CCM, L is greater than LB and is given by equation 4. Thus,

∆ I L, on=[V ¿−V o

L ]D T s so , L=[ V ¿−V o

∆ I L ,on F s]D

L=[ 24−6

(0.6 ) (500 x 103 ) ] (0.25 )=15 μH

From equation 8;

Cmin=∆ I L

8 F s ∆ V= 0.6

8(500 x103)(0.06)=2.5 μF

3


And accounting for stability, from equation 15;

C stab=L [I L+

∆ I L

2 ]2

[V o+∆ V ]2−V o2=

(15 x10−6 )[2+ 0.62 ]

2

[6+0.06 ]2−62=10.5 μF

Therefore, to optimize the converter for both the continuous conduction mode and stability;

C=10.5 μF.

2) Design Procedure

2.1) Requirement analysisThe requirement is to design a DC-DC buck converter that will produce a constant 6 V in its output when an input voltage range of 12-24 V is supplied in its input.

2.2) SpecificationsThe DC-DC converter will take a variable input voltage range of 12-24 V and produce a constant voltage of 6 V. Further specifications are as follows:

2.2.2) Prototype Design and Simulation StudiesInput voltage range: 12 to 24 V

Load Current (I LOAD): 2 A

Output voltage: 6 V

Current ripple=28 % of I LOAD=560 mA

Voltage ripple=1.2 % of load voltage=72mV

Switching frequency (f s): 500 kH Z

2.3) Objective and SolutionThe design is aimed at modeling and simulating the DC-DC buck converter in PSCAD and building the design prototype practically.

This is aimed to be achieved by designing the power supply which will provide the input to the DC-DC buck converter and to the pulse width modulation (PWM) circuit. The PWM circuit will be used to produce the signals for the chopper switch at the specified chopping frequency of 500 kHz. The entire system is illustrated by the block diagram below.

4


Prototype Design

Design Description

The system is an open loop system. This means that, a change in the input voltage must be accompanied by a change in the reference voltage (Duty cycle changing by varying resistor R4).

The operational amplifiers U3 and U4 form a circuit that generates a triangular wave. This triangular wave is fed to the comparator U2 which then uses it and the reference (supplied by the potential divider R3 and R4) to generate pulse width modulation.

The pulse width modulation signal is fed to the mosfet driver U1A, where the signal is made compatible with the mosfet Q1.

U1A7407N

U2

LM311N

B/STB VS+

GND

BAL

VS-

2

3

4

8

7

1

56

R2

1.0kΩ

Q1IRF540

D31N5820G

RL3.3Ω

C12.2µF

L1

14.7µH

R4

100kΩKey=A

50 %

U4

LM741CN

3

2

4

7

6

5 1

R1

1.0kΩ

R310kΩ

VCC

12V

VDD

-12V

U3

LM741CN

3

2

4

7

6

5 1

VCC

12V

VDD

-12V

R6

50kΩ

R5

10kΩ

R7

1kΩ

V112 V

Figure 1: System Circuit Diagram

Component selection

5


MOSFET DRIVER

The output of the LM311 if fed to the driver and it is used to control transistor Q1.The phasing is such that if the output voltage goes slightly high, the error amplifier DC level goes closer to the bottom of the PWM triangle, so that the triangle crosses the reference DC level earlier in time and transistor Q1 turn on time decreases bringing the output voltage down again. If the output voltage goes high by a certain percentage, the on time decreases by the same percentage to keep the output voltage constant.

U1A is a a MOSFET driver with a pull up resistor (R2) after it. This resistor is required because the collector of the output transistor inside LM311 does not have an internal pull up resistor (open collector). When the output goes low the output transistor inside LM311 will pull low. For the output to go high the output transistor switches off and the output is left floating, R 2 is also required to ensure that the output does not float when internal output transistor goes off.

In order to allow fast turn on R2 were chosen to be equal to 1kΩ. Resistors R3 and R4 divide the voltage from 0-12 volts.

Triangular wave generator

This circuit consist two 741 operational amplifiers(U3 as a Schmidt trigger and U4 as an integrator). U3 produces a square wave which is intergrated by U4 into a triangular wave.

The oscillation frequency of the wave generated by triangular wave generator is given by:

Fosc=R 6

R 7 x R 8 C

And to obtain 500 kHz operation, The following values were used.

R6 = 10 kΩ

R7 = 1 kΩ

R8 = 50 kΩ

C = 10nF

Power Consumption

6


Mosfet:For the IRF540 mosfet that is used:

On resistance = 44 mOhm

Ploss=I L2 Ron=2 x2 x

441000

=0.176 W

Diode:V drop during on=0.21 V

Ploss=0.21x 2 = 0.42

Inductor:

ESR = 0.1 ohm

Ploss=I L2 RESR=4 x 0.1=0.4 W

Total Power loss:

Ploss = 0.996 W

Pout=12W

Effiency = Pout

Pout+Ploss

=0.9234=92.34 %

The practical results in the form of pictures for the system is shown in appendix c. The PWM output, the output voltage waveforms are shown in the results.

7


4) Plan

Task Duration Start- End Progress

Proposed Actual Proposed Actual

1. Initial research

2 weeks 2 weeks 11 Feb - 21 Feb

11 Feb - 21 Feb

Complete

2. First Progress Report

Due date Due date 28 February 28 February Complete

3. Finalize project specs

2 days About 2 Months

6 - 7 Mar 6 March- 2 April

Complete

4. Final research

1 week 1 week 10 Mar - 14 Mar

10 Mar - 14 Mar

Complete

5. Finalize PSCAD simulations for the DC-DC converter

1 week 3 weeks 17-21 Mar 17 Mar- 8 April

Complete

6. Interim Report Writing

1 week 1 week 24 -31 Mar 24 -31 Mar Complete

7. Interim Report

Due Date Due Date 04 April 04 April Complete

8. Presentation

Due date 07 April Complete

9. Design and test the controller(PWM) and DC-DC converter

10 Days 12-21 April Complete

10. Finalize 2 weeks 22 April – 03 May

Complete

8


the report

11. Final Report

Due date 16 May Complete

12. Project Presentation

Due date 19 May pending

5) Conclusion

In this report, the entire design of the DC-DC buck converter has been presented. It has been

shown how the system was arranged in order to accommodate the varying input voltage. The

report also showed the performance of the system when the input voltage is varied. When the

input is change, the system user must adjust the reference voltage such that the output

remains 6V. The design shows a better Effiency (92 %) which is what theory predicts [3].

9


6) References

Textbooks:

[1] Bird, B M. King, KG. Pedder, DAG. An Introduction to Power Electronics. New York: John Wiley & Sons, 1993

[2] Mohan, N. Undeland M. Tore, Robbins. P. Williams. Power Electronics, Converters, Applications and Design. New York: John Wiley & Sons,1993

[3] Bose, BK. Modern Power Electronics, Evolution Technology, and application. New York: IEEE press, 1991

[4] Vithayathil, J. Power Electronics, Principles and Applications. New York: McGraw-Hill, Inc, 1995

[5] Rashid, MH. Power Electronics, Circuits, Devices and Applications. New Jersey: Prentice Hall Inc, 1991

Journal Articles:

[4] M.S Adler and S.R Westbrook. “Power Semiconductor switching devices- A comparison based on inductive switching.”, IEEE Transactions on Electron Devices, VOL.ED-29,NO.6,1982

[5] A.Y Kalbat.”PSCAD Simulation of grid-tied Photovoltaic Systems and Total Harmonic Distortion Analysis.”,International conference on electrical Power and energy conversion systems, 2013

10


Appendices

7.1) Appendix A

Buck Chopper Operation

Figure A1 below shows the basic circuit diagram of a buck converter. In this figure, the controller that generates the pulses for the switch is omitted, in the practical operation of this circuit where the input voltage will vary while the output is constant, the duty cycle controller that updates the duty cycle when the input voltage changes is connected as a feedback loop.

L1

C2 RVs C1

U1

From PWM Loop

S1

VoS2

Figure A2: Buck Chopper schematic

When switch S1 opens (switch off), the inductor will discharge to the circuit and this will turn the diode (S2) on. When S2 is closed (On), S2 is reversed biased.

The preliminary analysis for this circuit utilizes the following assumptions.

C2 is large enough that the output voltage ripple is small relative to its average value; L is large enough to ensure that the inductor current stays positive for the switching

period (this is referred to as continuous conduction mode (CCM)). This is to ensure that when the switch is off, the diode turns on.

All components are assumed to be ideal. In practice, S1, S2, L, C1 and C2 all have parasitic elements that must be considered properly in designing the system components.

Utilizing the second assumption regarding the inductor, two circuits are deduced for both the on-state and the off-state of S2. Figure k below shows the circuits.

11


Figure k: Two topological states for a buck chopper in CCM.

The on-time [T on] and the off-time [T off] of switch S2 are related to the duty cycle [D] and the switching period [T s] as follows.

D=T on

T s

…………………… ………………………………………… ………………………(1)

T on=T on

T s

. T s=D T s ..………… ..………………… ……………………………………… (2)

T off=T s−T on=T s−D T s=(1−D )T s ……………… …………………………… ..(3)

If the output voltage ripple (ΔV) is very small, then it can be assumed that the output voltage is constant at its average value¿¿].

From figure k (a), it follows that:

V L=LdLon

dt=V ¿−V o

∆ I L ,on

∆ t on

=V ¿−V o

L

And using (2), this becomes:

∆ I L, on=[V ¿−V o

L ]D T s… ………………………………………… ……………………. (4 )

Furthermore, from the figure 2(b), it follows that:

V L=LdLoff

dt=0−V o

∆ I L ,off

∆ t off

=−V o

L12


And using (3)

∆ I L, off=−V o

L(1−D)T s ………………………………… ………………………………. (5 )

Assuming steady state operation, it follows that:

∆ I L, on+∆ I L, off=0

Substituting (4) and (5), we arrive at,

V o=DV ¿………………………………… ………………………………………… …….(6)

Using the ideality of the components;

P¿=Po

V ¿ I ¿=V o I o

Using equation 6;

I o=I ¿

D

This shows that while the voltage is stepped down by a factor D, the current is stepped up equally by a factor D.

Minimum Capacitance

The previous discussion assumes the capacitor (C2) to be so large such that it keeps V o constant. However, there exist a finite value of the output voltage ripple and can be calculated by considering the graphs in figure A2.

The area under the inductor current graph that is in figure A2 is the charge stored in the capacitor. Relating it to the capacitance of C2, the switching period and the inductor current ripple, results in the following equations.

∆ Q=12 [T s

2 ][ ∆ I L

2 ]=Cmin ∆ V ……………………………… …………………………….(7)

And;

Cmin=∆ I L

8 F s ∆ V… ………………………………………… ……………………………… (8 )

If (5) is substituted to (7), the following is obtained.

13


∆ V =T s V o

8 L Cmin

(1−D)T s

This can be manipulated to:

∆ VV o

=π 2

2(1−D )( f c

f s)

2

…………… ………………………………………… ………… (9 )

Where f c=1

2 π √LC

Equation 8 provides the minimum capacitance for a given ripple current, ripple voltage and a selected operating frequency. The capacitor that is obtained using (8) will cause the ripple voltage to be equal to the specified ripple voltage (∆ V ) when the converter is operating at switching frequency (f s). The ripple voltage is further related to the corner frequency ( f c) of the LC network. This equation shows that the ripple voltage can be minimized by selecting the corner frequency of the low-pass filter (LC) at the output such that f c≪ f s .

Following the discussion that has been endeavored in so far, which assumes CCM, the following can be proclaimed.

The current across the inductor [I L] builds up at a rate of [V ¿−V o

L ] for the period of

T on=D T s .

I L decreases linearly[ at a rate of V o

L ] for the period of T off=(1−D )T s.

The capacitor voltage [V c] fluctuates around zero

The capacitor current [I c] fluctuates on an analogous pattern to the inductor current (I L).

The difference is that I c has an average value of zeroThis information is presented graphically in figure 2 below.

14


Figure A3: Steady-State Buck Waveforms Assuming CCM

The following analysis considers the operation of the buck converter at the boundary between continuous and discontinuous mode and in the discontinuous conduction mode (DCM).

Continuous and discontinuous mode boundary

The boundary between CCM and DCM occurs when the minimum inductor current is at zero.

I min=0

I min = I L ,av−∆ I L

2=0……………………………… …………………………………… ..(10)

∆ I L=V o

L(1−D )T s=

V o(1−D)L F s

…………… ………………………………………….(11)

The from (10) and (11);

LB=V o(1−D)

2 I o F s

=D (V ¿−V o)

2 I o F s

……………………………… ………………………….(12)

I minis the minimum inductor current and LBis the minimum inductance that is required to keep the converter in CCM. If LB is used as the value of the converter inductance, the converter will operate at the boundary between CCM and DCM.

If the converter inductance is less than LB, the converter will operate at DCM. If the inductance (L) is greater than LB, the chopper will operate at CCM. The waveforms below show

15


the inductor current when (1) Converter is operating in DCM, (2) when Converter is operating in CCM and (3) when the converter is operating in the critical mode.

Figure A4: Converter operation in DCM and CCM

Figure A5: Converter operation at the critical mode

Output Capacitor and Inductor Transients

When the input voltage is varied, the output voltage changes according to the current duty cycle. The control loop then detects this change in output voltage and modulates the duty cycle such that the output voltage gets back to the specified constant value [4].

Therefore, the selected capacitor must able to withstand this change in the output voltage. To incorporate this effect in the design of the capacitor, the energy that is stored in the capacitor and the inductor before the change of voltage and after the change is equated and then the value of the capacitor is obtained. The derivation follows below.

ENERGY BEFORE=ENERGY AFTER

12

C V O2+ 1

2L I peak

2=12

C (V o+∆ V )2 ……………………… …………… ..… …………… ..(13)

But;

I peak=I L+∆ I L

2………… ………………………………………… ……………………….…(14)

16


Combining (13) and (14) and solving for C gives;

C=C stab=L[ I L+

∆ I L

2 ]2

[V o+∆ V ]2−V o2

………………………………………… …………………….(15)

In addition to equation 8, that gives the minimum output capacitance at a given ripple current, voltage and switching frequency, equation 15 gives the minimum value of the capacitor that will be able to operate when the input voltage changes. This capacitor value ensures stability of the converter (subscript stab). Both equation 15 & 8 must be satisfied in the buck converter design.

3.2) Appendix B

3.2.1) Simulation results

Figure B1 shows the system setup in PSCAD when the circuit was simulated for Critical mode, continuous conduction mode and discontinuous conduction mode operation.

Table B 1 : Inductance values for different modes of operation

Mode of operation Inductance(μH)1) CM 2.252) CCM 163) DCM <2.25 (2μH was used to obtain the results )

17


Figure B1: Buck Converter Circuit in PSCAD

3.2.1.1) Converter Operation at CM

Figure B2: Inductor current and Output voltage waveforms at CM

3.2.1.2) Converter Operation at CCM

18


Figure B3: Inductor Current and Voltage Waveforms

3.2.1.2) Converter Operation at the DCM

Figure B4: Inductor Current and Voltage waveforms at DCM

(3.2.2) Simulation Results analysis

Figure 2: System Block diagram

19


2.2.2) Results, Discussion and PSCAD Circuit Diagram

Figure 3 shows the circuit when it is built and simulated in PSCAD. This circuit is the exact implementation of the circuit that is described in figure 1. The transistor (Tr) separates the diode (D) and the filter network (L and C). A load of three ohm was connected at the output for simulation purposes. In real life, this circuit consists of a feedback loop from the output and feeding pulses to the transistor switch. When the input voltage changes, the feedback loop sense the changed output voltage and vary the duty cycle such that the output gets back to the constant required value.

However, this requires fundamental electronic components such as operational amplifiers and these do not exist in PSCAD. Consequently, the system was modeled as non-automated system. A change in voltage had to be followed by a manual change in duty cycle so that the circuit would mimic the behavior of the practical circuit.

Figure 3: PSCAD Circuit diagram

The circuit was simulated for the three modes of operation: CCM, CM and DCM.

Critical Mode

In this mode of operation, it was expected that the minimum value of the current be zero and the ripple current to be twice the average value of the current. This is shown by figure A4 in appendix A.

The inductance and capacitance values at this mode of operation are calculated in section 2 and they are found to be, L=2.25μL and C = 2 μF.Using these values on simulating figure 3, the waveforms in figure B2 of appendix B were obtained. These waveforms show an exact conformation with the theoretical predictions that are discussed in appendix A and section 2.

20


The ripple current = 2 A which is higher than the specified value of 560 mA. It then becomes an apparent decision to design the circuit such that it never operates in the critical mode when the power supply is supplying current sensitive systems.

Continuous Conduction Mode

In CCM, the current is predicted theoretically to fluctuate around the average output current and not touching the time axis. Using the values that were calculated in section 2, waveforms in figure B3 were obtained. These waveforms also agree to the theoretically predicted waveforms.

The ripple current in figure B3 = 541 mA. This is within the specified ripple current of 560mA.

Discontinuous Conduction Mode

This mode is classified by a momentarily zero current at the inductor/load. This is shown in figure A3 of appendix A. The simulation in figure B4 also portrays this behavior in the inductor current. However, this mode causes the output voltage to increase above the specified voltage. This is caused by the fact that the capacitor fails to sink the charge (ripple) as it has to supply the power back to the inductor when the inductor has completely discharged.

(3.2.3) Simulation Stages Results

Table B2: Circuit Parameters that were recorded using PSCAD and Matlab

Duty cycle

Input Current

Diode Current

Inductor Current

Output Voltage

Efficiency (R=3)

0.25 0.5039 1.4561 1.96 5.881 0.9532910.275 0.5527 1.6025 2.1553 6.5779 1.0873080.3 0.7373 1.6161 2.3534 7.0625 0.9395940.325 0.9096 1.641 2.5506 7.6507 0.8937570.35 0.9778 1.7676 2.7454 8.372 0.9955790.375 1.0461 1.8944 2.9405 8.8276 1.0346170.4 1.291 1.8472 3.1382 9.4157 0.9537760.425 1.5195 1.8163 3.3359 10.1662 0.944679

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0.45 1.6072 1.9235 3.5307 10.5932 0.9697320.475 1.695 2.0308 3.7257 11.1817 1.0245040.5 1.9991 1.9244 3.9235 11.7705 0.962549

3.2.2.1) Matlab Graphs with respect to duty cycle

Figure B5: Efficiency vs. Duty cycle curve

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Figure B6: Inductor current vs. duty cycle

Figure B7: Diode current vs. Duty cycle

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Figure B8: Input Current vs. Duty Cycle

Figure B9: Output Voltage vs. Duty Cycle

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Calculation of output voltage at an input of 24V and duty cycle varied from 0.1, 0.25, 0.3μs

V ¿=24 V

For T on=0.1 μs

D=T on

T s

=0.1 μs2 μs

=0.05=5%

V o=DV ¿=(0.05 ) (24 )=1.2 V

Figure B10

Figure B11

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For T on=0.25 μs

D=T on

T s

=0.25 μs2 μs

=0.125=12.5 %

V o=DV ¿=(0.125 ) (24 )=3V

Figure B12

Figure B13

For T on=0.3 μs

D=T on

T s

=0.3 μs2 μs

=0.15=15 %

V o=DV ¿=(0.15 ) (24 )=3.6 V

26


Figure B14

Figure B15

Calculation of the total rise and fall of inductor ripple current for on-time of 0.5 μs

For T on=¿0.5μs

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D=T on

T s

=0.5 μs2 μs

=0.25=25 %

∆ I L, on=[V ¿−V o

L ]D T s… ………………………………………… ……………………. (4 )

∆ I L, off=−V o

L(1−D)T s ………………………………… ………………………………. (5 )

From equation 4;

rise rate=[V ¿−V o

L ]= 24−616 x10−6=1125 x103

Falling rate=V o

L= 6

16 x10−6 =375 x103

rise=(rise rate ) (T on )=(1125 x103 ) (0.5 μs )=0.5625 A

fall=(fall rate ) (T off )=(375 x103 ) (1.5 μs )=0.5625 A

Figure 6: Load Current at T_on = 0.5μs

Plot of the average load current for a load of 5 Ω For the load of 5 Ω, the average inductor current is equal to the average load current.

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Ripple and output voltage for the above condition.

Figure B16

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7.1) Appendix C

Figure 7: PWM out from the comparator

Volts/div = 5

Vp = 10 V

Time per div = 2 us

Period = 2 us

Figure 8: triangular wave generator output

Volts/div = 3

Vp = 9 V

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Time per div = 2 us

Period = 2 us

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