MimasV2UserManual

8/17/2019 MimasV2UserManual

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Mimas V2 Spartan 6 FPGA Development Board

U G id


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Get in touc! wit! us"

Please #eel #ree to send a mail to one o# t!e mail $Ds %elow or use t!e &ontact Us pa'e athttp://www.numato.com to drop us a (uic) messa'e.

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> Mimas V2 Spartan 6 FPGA Developmant Board User Guide

USB $nter#ace

*!e on %oard #ull speed USB controller !elps a computer to communicate

wit! t!is module. Use a USB A to Mini B ca%le to connect wit! a P&. B

de#ault t!e module is powered #rom USB so ma)e sure not to overcrowd

unpowered USB !u%s.

Visit !ttp300numato.com0ca%les8accessories to %u ca%les and

accessories #or t!is product.

D& Power Suppl

*!is module uses K7V power suppl to #unction properl. By default the board

is configured to use +! supply from "#B. #o an e$ternal +! power is not

re%uired unless "#B port is unable to supply enough current. &n most cases

"#B ports are capable of pro'iding enough current for the module. (urrent

re%uirement for this board largely depends on your application. )lease

consult *)A datasheet for more details on power re%uirements. $# #or an

reason/ an eternal 7V power suppl needs to %e used #or t!e module/ t!e

Power select Lumper s!ould %e con#i'ured properl %e#ore connectin' t!e power suppl. Please re#er

to t!e mar)in' on t!e %oard #or more details.

Power Select

*! P S l t ! d :5 i d t #i t! # t! % d *! L i i 5

http://numato.com/cables-accessorieshttp://numato.com/cables-accessories


6/33

Mimas V2 Spartan 6 FPGA Developmant Board User Guide

&on#i'uration Mode Selection

Slide switc! S1N is used to switc! %etween t!e USB con#i'uration mode and UAR*. Slide t!e switc! to

Position 5 to download %it stream t!rou'! USB con#i'uration tool and Position 2 to use t!e inter#ace

as a UAR* in order to communicate #rom our code in FPGA wit! t!e P&. B de#ault t!e %oard is

s!ipped wit! slide switc! position in USB con#i'uration tool mode.

UAR*

*!e M$MAS V2 includes USB8UAR*/ w!ic! !elps to esta%lis! t!e communication %etween t!e code in

t!e FPGA and an application runnin' on t!e P&. Data can %e send and received #rom t!e FPGA %

usin' Serial *erminal at %aud rate 52;;.


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7 Mimas V2 Spartan 6 FPGA Developmant Board User Guide

9D/ Pus! Button and Dip Switc!

M$MAS V2 !as si pus! %utton switc!es/ an ei'!t position D$P switc! and ei'!t 9Ds #or !uman

interaction. All switc!es are directl connected to Spartan 6 FPGA and can %e used in our desi'n wit!

minimal e##ort.

Mi SD


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VGA and Audio

*!e VGA inter#ace provides t!is %oard t!e a%ilit to 'enerate VGA si'nals #rom FPGA and displa

in#ormation an Displa0monitor t!at supports standard VGA connector. *!is VGA inter#ace uses

resistor networ) %ased DA& #or eas code implementation. *!is H %it VGA inter#ace can displa up to

276 colors.

*wo $s on t!e FPGA are dedicated #or 'eneratin' two c!annels o# audio. Di##erent audio tones can %e

'enerated % usin' P1M and Fre(uenc snt!esis.


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N Mimas V2 Spartan 6 FPGA Developmant Board User Guide

NSe'ment 9D Displa

*!is %oard #eatures t!ree N8se'ment 9D displa multipleed #or low pin count operation. 9ac!

module can %e separatel turned on and o## wit! t!e t!ree switc!in' transistors.


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H Mimas V2 Spartan 6 FPGA Developmant Board User Guide

GP$s

*!is %oard is e(uipped wit! >2 user $ pins t!at can %e used #or various custom applications. Pin

assi'nments on t!e connectors are availa%le in t!e ta%les %elow.

+9AD9R P6

+eader Pin 4o. Pin description Spartan86 ?&SG>2@ Pin 4o.

5 $O>PO2 UN

2 $O>4O2 VN

> $O6>PO2 *

$O6>4O2 V

7 $OPOD>O2 U7

6 $O4ODO2 V7

N $O62POD7O2 R>

H $O624OD6O2 *>

G4D 4A

5; G4D 4A


11/33

Mimas V2 Spartan 6 FPGA Developmant Board User Guide

G4D 4A

5; G4D 4A

55 V&&AUC 4A

52 V&&AUC 4A

+9AD9R PH

+eader Pin 4o. Pin description Spartan86 ?&SG>2@ Pin 4o.

5 $O56PO2 R55

2 $O564OVR9FO2 *55

> $O2POG&:>O2 R5;

$O24OG&:2O2 *5;

7 $O5POD55O2 U5>6 $O54OD52O2 V5>

N $O2>PO2 U55

H $O2>4O2 V55

G4D 4A

5; G4D 4A


12/33

5; Mimas V2 Spartan 6 FPGA Developmant Board User Guide

H $O24OG&:6O*RD=5OM5DMO5 56

G4D 4A

5; G4D 4A

55 V&&AUC 4A

52 V&&AUC 4A


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Driver $nstallation

1indows

*!is product re(uires a driver to %e

installed #or proper #unctionin' w!en

used wit! 1indows. *!e driver

pac)a'e can %e downloaded #rom t!e

product pa'e. *o install t!e driver/

unEip t!e contents o# t!e downloaded

driver pac)a'e to a #older. Attac! USB

ca%le to t!e P& and w!en as)ed %

1indows device installation wiEard/

point to t!e #older w!ere driver #iles

are present. 1!en driver installation is complete/ t!e module s!ould appear in 1indows Device

Mana'er as a serial port ?see t!e picture on t!e ri'!t@. 4ote down t!e name o# t!e serial port ?&M5/

&M2 etc..@. *!is in#ormation is re(uired w!ile pro'rammin' t!e module wit! con#i'uration tool.

inu

*o use t!is product wit! inu/ USB &D& driver needs to %e compiled in wit! t!e )ernel. Fortunatel/


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Generatin' Bit Stream #or M$MAS V2

+D desi'n needs to %e converted to %it stream %e#ore it can %e pro'rammed to FPGA. M$MAS V2

con#i'uration tool at t!is time accepts onl %inar ?.%in@ %it stream created % C$$4C $S9

?!ttp300www.ilin.com0tools0we%pac).!tm @. nce t!e +D is snt!esiEed/ it is eas to create a %inar

%it stream out o# it. Please #ollow t!e Steps %elow to 'enerate %inar %it stream #rom our desi'n

usin' $S9 1e% Pac).

Step 53 Ri'!t clic) on t!e Generate Pro'rammin' FileQ option in ProcessesQ window.

http://www.xilinx.com/tools/webpack.htmhttp://www.xilinx.com/tools/webpack.htm


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5> Mimas V2 Spartan 6 FPGA Developmant Board User Guide

Step 23 Select Process PropertiesQ #rom t!e pop up menu. $n t!e dialo' %o/ c!ec) &reate Binar

&on#i'uration FileQ &!ec) %o and clic) ApplQ.


16/33


Powerin' Up M$MAS V2

M$MAS V2 can %e powered directl #rom USB port so ma)e sure t!at ou are usin' a USB port t!at can

power t!e %oard properl. $t is recommended to connect t!e %oard directl to t!e P& instead usin' a

!u%. $t is practicall ver di##icult to estimate t!e power consumption o# t!e %oard/ as it depends

!eavil on our desi'n and t!e cloc) used. C$$4C provides tools to estimate t!e power consumption.

$n an case i# power #rom USB is not enou'! #or our application/ an eternal suppl can %e applied to

t!e %oard. M$MAS V2 re(uires two di##erent volta'es/ a >.>V and a 5.2V suppl. n8%oard re'ulators

derive t!ese volta'es #rom t!e USB09t power suppl.

&on#i'urin' M$MAS V2

*!e M$MAS V2 Spartan6 module can %e con#i'ured % two met!ods/

a@ Usin' M$MAS V2 con#i'uration tool t!rou'! USB.

%@ Usin' t!e Cilin pro'rammin' ca%le..

&on#i'urin' M$MAS V2 usin' con#i'uration tool

M$MAS V2 !as an on8%oard micro8controller w!ic! #acilitates eas repro'rammin' o# on8%oard SP$

#las! t!rou'! USB inter#ace. *!e micro8controller receives %it stream #rom t!e !ost application and

pro'ram it in to t!e SP$ Flas! and lets t!e FPGA %oot #rom t!e #las!. *!e M$MAS V2 con#i'uration

http://www.numato.com/


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#tep 1: Ma)e sure ou !ave selected USB con#i'uration mode ?Slide S1N to position 5. Re#er to t!e

section &on#i'uration Mode SelectionQ #or more in#ormation@. Run M$MAS V2 &on#i'uration *ool andselect t!e correct port ?Re#er to section Driver installationQ #or more in#ormation on #indin' port

num%er@. &lic) pen #ile %utton and select t!e .%in #ile.


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#tep 2: &lic) on Pro'ramQ %utton. 1ait till DoneQ appears on t!e screen.


19/33

5N Mimas V2 Spartan 6 FPGA Developmant Board User Guide

&on#i'urin' M$MAS V2 usin' *AG

M$MAS V2 Spartan6 module #eatures an on8%oard *AG connector w!ic! #acilitates eas

repro'rammin' o# SRAM and on8%oard SP$ #las! t!rou'! *AG pro'rammer li)e C$$4C Plat#orm8ca%le

us%Q. Pro'rammin' M$MAS V2 usin' *AG re(uires C$$4C $S9 iMPA&*Q so#tware w!ic! is %undled

wit! C$$4C $S9 Desi'n Suite. *o pro'ram SP$ #las! we need a .mcs #ile w!ic! needs to %e 'enerated

#rom t!e .%it #ile. Steps #or 'eneratin' .mcs #ile is discussed %elow. Pro'rammin' FPGA SRAM does

not re(uire a mcs #ile to %e 'enerated.

Generatin' .mcs #ile #or M$MAS V2

#tep 1: pen $S9 iMPA&*. &lic) on &reate PRM #ile?PRM #ile #ormatter@Q.$n t!e dialo' %o/ select

&on#i'ure Sin'le FPGAQ in stora'e device tpe. *!en clic) on t!e 'reen arrow at t!e ri'!t side.


20/33

5H Mimas V2 Spartan 6 FPGA Developmant Board User Guide

#tep 2: Select 56M in Stora'e Device ?%its@ list. 4ow

clic) on Add Stora'e DeviceQ/ t!en t!e 'reen arrow at

t!e ri'!t side.

#tep 3: Set an output #ile name and an output #ile location ?t!e

.mcs #ile will %e 'enerated at t!is location w!ic! will %e

re(uired later #or pro'rammin' t!e FPGA@/ t!en clic) : twice/

t!en select t!e .%it #ile we alread 'enerated t!en clic) pen

and clic) 4 w!en it prompts to add anot!er device #ile.


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#tep 4: Dou%le clic) on Generate FileQ. A messa'e Generate SucceededQ will %e displaed as s!own

in #i' %elow i# t!e mcs #ile is 'enerated success#ull.


22/33

2; Mimas V2 Spartan 6 FPGA Developmant Board User Guide

Pro'rammin' on%oard SP$ #las! usin' $S9 iMPA&*

#tep 1: Ma)e sure Cilin Plat#orm &a%le USB is connected properl to t!e %oard. pen $S9 iMPA&*.

&lic) on Boundar ScanQ in t!e iMPA&* #lows window in t!e le#t top corner. *!en ri'!t clic) on t!e

window panel in t!e ri'!t side. Select $nitialiEe &!ainQ.


23/33


#tep 2: $# t!e device is detected properl ou will 'et a pop up window as s!own %elow/ &lic) :. *!en

ri'!t clic) on t!e SP$0BP$ ?net to t!e %lac) arrow in t!e %elow #i'.@/ select Add SP$0BP$ Flas!.


24/33


#tep 3: Select t!e .mcs #ile we alread created and clic) :. 4ow c!oose M27P56Q in t!e dialo'ue

%o appeared/ t!en clic) :.

#tep 4: &lic) on Flas!Q/ Dou%le &lic) on Pro'ram/ select :. $# t!e pro'rammin' is success#ul/ a

con#irmation messa'e will %e displaed.


25/33

2> Mimas V2 Spartan 6 FPGA Developmant Board User Guide

*ec!nical Speci#ications

)arameter 5 !alue "nit

Basic #pecifications

4um%er o# GP$s >2

4um%er o# 9Ds H

4um%er o# Pus! Buttons 6

SP$ Flas! Memor ?M27P56@ 56 M%

Power suppl volta'e ?USB or eternal@ 7 8 N V

*)A #pecifications

$nternal suppl volta'e relative to G4D ;.7 to 5.27 V

Auiliar suppl volta'e relative to G4D ;.7 to >.N7 V

utput drivers suppl volta'e relative to G4D ;.7 to >.N7 V < All parameters considered nominal. 4umato Sstems Pvt td reserve t!e ri'!t to modi# products wit!out notice.


26/33


P!sical Dimensions

1 2 3 4 5


27/33

1 2 3 4 5

A A

B B

C C

Date: 3 nov 2 15

KiCad E.D.A.

Rev: V2ize: A4

Id: 1/7

Title: MIMAS V2

File: MimasV2.sch

Sheet: /

Numato Lab

http://www.numato.com

License: CC BY-SA

LPDDR

Lpddr.sch

DDR-D[0..15]

DDR-A[0..12]

DDR-UDM

DDR-LDM

DDR-CK_P

DDR-CK_N

DDR-CKE

DDR-WE

DDR-CAS

DDR-RAS

DDR-BA0

DDR-BA1

DDR-UDQS

DDR-LDQS

RZQ

POWER SUPPLY

LPDDR

SPARTAN XC6SLX9

CSG324

PIC18F14K50

Pic18f14k50.sch

PROGB

DONE

INITB

SCK

CS

SO

SI

MCLK

TX

RX

SPARTAN XC6SLX16

Spartan6.sch

DDR-D[0..15]

DDR-A[0..12]

DDR-UDM

DDR-LDM

DDR-RAS

DDR-CAS

DDR-CK_P

DDR-CK_N

DDR-BA0

DDR-BA1

DDR-WE

DDR-CKE

CS

SI

SO

SCK

DDR-LDQS

DDR-UDQS

RZQ

PROGB

INITB

7Seg_[0..7]

7Seg_1en

7Seg_2en

7Seg_3en

Vsync

Hsync

B[0..1]

R[0..2]

G[0..2]

DAT0

DAT1

DAT2

DAT3

CMD

CLK

LED[1..8]

DP[1..8]

SW[1..6]

AUDIO_L

AUDIO_R

EXP_IO_P[1..16]

EXP_IO_N[1..16]

DONE

MCLK

TX

RX

PIC18F14K50

Expansion

Modules

POWER

Power.sch

Expansion

Connectors

Expansion Modules

ExpansionModules.sch

7Seg_[0..7]

7Seg_1en

7Seg_2en

7Seg_3en

Vsync

Hsync

B[0..1]

G[0..2]

R[0..2]

CLK

CMD

DAT3

DAT2

DAT0

DAT1

LED[1..8]

SW[1..6]

AUDIO_L

AUDIO_R

Expansion Connectors

ExpansionConnectors.sch

EXP_IO_P[1..16]

EXP_IO_N[1..16]

DP[1..8]

1 2 3 4 5


28/33

1 2 3 4 5

A A

B B

C C

Date: 3 nov 2 15

KiCad E.D.A.

Rev:ize: A4

Id: 2/7

Title: MIMAS V2

File: Lpddr.sch

Sheet: /LPDDR/

Numato Lab


License: CC BY-SA

DDR1V8

DDR-D0

DDR-D1

DDR-D2

DDR-D3

DDR-D4

DDR-D5

DDR-D6

DDR-D7

DDR-D9

DDR-D10

DDR-D11

DDR-D12

DDR-D13

DDR-D14

DDR-D15

DDR-D8

DDR-A12

DDR-A11

DDR-A10

DDR-A9

DDR-A8

DDR-A7

DDR-A6

DDR-A5

DDR-A4

DDR-A3

DDR-A2

DDR-A1

DDR-A0

R27

100R

DDR-D[0..15]

DDR-A[0..12]

DDR-UDQS

DDR-LDQS

DDR-UDM

DDR-LDM

DDR-CK_P

DDR-CK_N

DDR-CKE

DDR-WE

DDR-CAS

DDR-RAS

DDR-BA0

C76

0.1uF

C77

0.1uF

C78

0.1uF

C79

0.1uF

C80

0.1uF

C81

0.1uF

C82

0.1uF

GND

DDR-D[0..15]

DDR-BA1

DDR1V8

VSS

1

VDDQ

1

VSSQ

1

VDDQ

1

VSSQ

1

VSS

1

CKE

G1

A9 H1

A6

J1

VSS

1

DQ15

2

DQ13

2

DQ11

2

DQ9

2

UDQS

E2

UDM

F2

CK

G2

A11

H2

A7

J2

A4

K2

VSSQ

3

DQ14

3

DQ12

3

DQ103

DQ8

3

NC

F3

CK

G3

A12

H3

A8

J3

A5

K3

VDDQ

7

DQ1

7

DQ3

7

DQ5

7

DQ7

7

A13

F7

WE

G7

CS

H7

A10

J7

A2

K7

DQ0

8

DQ2

8

DQ4

8

DQ6

8

LDQS

E8

LDM

F8

CAS G8

BA0

H8

A0

J8

A3

K8

VDD

9

VSSQ

9

VDDQ

9

TEST

D9

VDDQ

9

VDD

9

RAS

G9

BA1

H9

A1

J9

VDD

9

U9

MT46H32M16LF

GND

GND GND

R

1

GND

R

4

7

GND

DDR1V8

R29

100R

ZQ

GND

C75

0.1uF

1 2 3 4 5


29/33

1 2 3 4 5

A A

B B

C C

Date: 3 nov 2 15

KiCad E.D.A.

Rev:ize: A4

Id: 3/7

Title: MIMAS V2

File: Pic18f14k50.sch

Sheet: /PIC18F14K50/

Numato Lab


License: CC BY-SA

VCC3V3

AN1

AN2

GND

M

H

INITB

SPI FLASH

C5

0.1uF

SO

CS

SCK

SI

R

1

FWUP

P

C

C

D-

D

GND

VCCAUX

MCLR

2

3

4

5

6

P2

GND

AN1

AN2

1

2

3

4

P4

AN0

AN2

AN1

SI

DONE

PROGB

VCCAUX

R

1

VCCAUX

R

1

R

1

SO

CS

SCK

GND

MCLR

VCCAUX

VCCAUX

R1

C3

0.1uF

C4

0.1uF

MCLR

D-

D

C

2

C

2

Q

C

VDD

RA5/OSC1/CLKI

RA4/AN3/OSC2/CLKO

RA3/MCLR/VPP

RC5/CCP1/P1A/T0CKI

5

RC4/P1B/C12OUT/SRQ

6

RC3/AN7/P1C/C12IN3/PGM

7

RC6/AN8/T13CKI/T1OSC1 8

RC7/AN9/SDO/T1OSC0

9

RB7/TX/CK

10

V

2

RB6/SCK/SCL

11

RB5/AN11/RX/DT

12

RB4/AN10/SDI/SDA

13

RC2/AN6/P1D/C12IN2/CVREF/INT2

14

RC1/AN5/C12IN1-/INT1/VREF-

15

RC0/AN4/C12IN+/INT0/VREF+

16

VUSB

7

D-/PGC

8

D+/PGD

9

IC1

PIC18F14K50

VCCAUX

1

2

P3

PROGB

DONE

INITB

VCCAUX

VUSB

V

1

D

23

G

4

S

e

d

5

S

e

d

6

X

USB

VBUS

SCK

CS

SO

SI

MCLK

S

Q

W

VSS D

5

C

6

HOLD

7

VCC

8

U1

M25P16

GND

R

1

PWR_FLAG

R

1

N

P

N

P

N

P

PIC18F14K50

USB

TX

RX

A

1

2

C

3

SW7A

AN0

R52

R

R53

R

VCCAUX

GND

VCCAUX

R

0

1

2

UART

USB CONFIGURATION

1 2 3 4 5 6 7


30/33

1 2 3 4 5 6 7

A A

B B

C C

D D

E E

Date: 3 nov 2 15

KiCad E.D.A.

Rev:ize: A3

Id: 4/7

Title: MIMAS V2

File: Spartan6.sch

Sheet: /SPARTAN XC6SLX16/

Numato Lab


License: CC BY-SA

MISC

IO_L83N_VREF_3

C1

IO_L52N_M3A9_3

D1

IO_L50N_M3BA2_3

E1

IO_L48N_M3BA1_3

F1

IO_L46N_M3CLKN_3

G1

IO_L41N_GCLK26_M3DQ5_3

H1

IO_L40N_M3DQ7_3

J1

IO_L38N_M3DQ3_3

K1

IO_L37N_M3DQ1_3

L1

IO_L36N_M3DQ9_3

M1

IO_L35N_M3DQ11_3

N1

IO_L34N_M3UDQSN_3

P1

IO_L33N_M3DQ13_3

T1

IO_L32N_M3DQ15_3

U1

IO_L83P_3

C2

IO_L52P_M3A8_3

D2

IO_L48P_M3BA0_3

F2

IO_L41P_GCLK27_M3DQ4_3

H2

IO_L38P_M3DQ2_3

K2

IO_L37P_M3DQ0_3

L2

IO_L35P_M3DQ10_3

N2

IO_L34P_M3UDQS_3

P2

IO_L33P_M3DQ12_3

T2

IO_L32P_M3DQ14_3

U2

IO_L54N_M3A11_3

D3

IO_L50P_M3WE_3

E3

IO_L51N_M3A4_3

F3

IO_L46P_M3CLK_3

G3

IO_L44N_GCLK20_M3A6_3

H3

IO_L40P_M3DQ6_3

J3

IO_L42N_GCLK24_M3LDM_3

K3

IO_L39N_M3LDQSN_3

L3

IO_L36P_M3DQ8_3

M3

IO_L1N_VREF_3

N3

IO_L2N_3

P3

IO_L54P_M3RESET_3

E4

IO_L51P_M3A10_3

F4

IO_L44P_GCLK21_M3A5_3

H4

IO_L42P_GCLK25_TRDY2_M3UDM_3

K4

IO_L39P_M3LDQS_3

L4

IO_L1P_3

N4

IO_L2P_3

P4

IO_L55N_M3A14_3

F5

IO_L49N_M3A2_3

H5

IO_L43N_GCLK22_IRDY2_M3CASN_3

K5

IO_L43P_GCLK23_M3RASN_3

L5

IO_L31N_VREF_3

M5

IO_L55P_M3A13_3

F6

IO_L53N_M3A12_3

G6

IO_L49P_M3A7_3

H6

IO_L47N_M3A1_3

J6

IO_L45N_M3ODT_3

K6

IO_L31P_3

L6

IO_L53P_M3CKE_3

H7

IO_L47P_M3A0_3

J7

IO_L45P_M3A3_3

L7

U5D

SPARTAN6LXXXX-CSG324

BANK 3ANK 2ANK 1ANK 0

DDRD0

DDRD1

DDRD2

DDRD3

DDRD4

DDRD5

DDRD6

DDRD7

DDRD8

DDRD9

DDRD10

DDRD11

DDRD12

DDRD13

DDRD14

DDRD15

DDR-D0..15]

DDRA0

DDRA1

DDRA2

DDRA3

DDRA4

DDRA5

DDRA6

DDRA7

DDRA8

DDRA9

DDRA10

DDRA11

DDRA12

DDR-A[0..12]

DDR-LDQS

DDR-UDM

DDR-LDM

DDR-UDQS

DDR-RAS

DDR-CAS

DDR-CK_P

DDR-CK_N

DDR-BA0

DDR-BA1

DDR-WE

DDR-CKE

DDR1V8

GND

VCC1V2

GND

IO_L32P_A17_M1A8_1

H12

IO_L34P_A13_M1WE_1

K12

IO_L40P_GCLK11_M1A5_1

L12

IO_L32N_A16_M1A9_1

G13

IO_L36P_A9_M1BA0_1

H13

IO_L39P_M1A3_1

J13

IO_L34N_A12_M1BA2_1

K13

IO_L40N_GCLK10_M1A6_1

L13

IO_L61N_1

M13

IO_L30P_A21_M1RESET_1

F14

IO_L30N_A20_M1A11_1

G14

IO_L36N_A8_M1BA1_1

H14

IO_L39N_M1ODT_1

K14

IO_L61P_1

L14

IO_L53P_1

M14

IO_L53N_VREF_1

N14

IO_L1P_A25_1

F15

IO_L37P_A7_M1A0_1

H15

IO_L41P_GCLK9_IRDY1_M1RASN_1

K15

IO_L42P_GCLK7_M1UDM_1

L15

IO_L50P_M1UDQS_1

N15

IO_L74P_AWAKE_1

P15

IO_L33P_A15_M1A10_1

E16

IO_L1N_A24_VREF_1

F16

IO_L38P_A5_M1CLK_1

G16

IO_L37N_A6_M1A1_1

H16

IO_L44P_A3_M1DQ6_1

J16

IO_L41N_GCLK8_M1CASN_1

K16

IO_L42N_GCLK6_TRDY1_M1LDM_1

L16

IO_L47P_FWE_B_M1DQ0_1

M16

IO_L50N_M1UDQSN_1

N16

IO_L74N_DOUT_BUSY_1

P16

IO_L29P_A23_M1A13_1

C17

IO_L31P_A19_M1CKE_1

D17

IO_L35P_A11_M1A7_1

F17

IO_L43P_GCLK5_M1DQ4_1

H17

IO_L45P_A1_M1LDQS_1

K17

IO_L46P_FCS_B_M1DQ2_1

L17

IO_L48P_HDC_M1DQ8_1

N17

IO_L49P_M1DQ10_1

P17

IO_L51P_M1DQ12_1

T17

IO_L52P_M1DQ14_1

U17

IO_L29N_A22_M1A14_1

C18

IO_L31N_A18_M1A12_1

D18

IO_L33N_A14_M1A4_1

E18

IO_L35N_A10_M1A2_1

F18

IO_L38N_A4_M1CLKN_1

G18

IO_L43N_GCLK4_M1DQ5_1

H18

IO_L44N_A2_M1DQ7_1

J18

IO_L45N_A0_M1LDQSN_1

K18

IO_L46N_FOE_B_M1DQ3_1

L18

IO_L47N_LDC_M1DQ1_1

M18

IO_L48N_M1DQ9_1

N18

IO_L49N_M1DQ11_1

P18

IO_L51N_M1DQ13_1

T18

IO_L52N_M1DQ15_1

U18

U5B


IO_L2N_0

A2

IO_L2P_0

B2

IO_L4N_0

A3

IO_L4P_0

B3

IO_L5N_0

A4

IO_L5P_0

B4

IO_L1N_VREF_0

C4

IO_L1P_HSWAPEN_0

D4

IO_L6N_0

A5

IO_L6P_0

C5

IO_L8N_VREF_0

A6

IO_L8P_0

B6

IO_L3N_0

C6

IO_L3P_0

D6

*IO_L7N_0

E6

IO_L10N_0

A7

IO_L10P_0

C7

*IO_L9P_0

E7

*IO_L7P_0

F7

IO_L33N_0

A8

IO_L33P_0

B8

IO_L11N_0

C8

IO_L11P_0

D8

*IO_L9N_0

E8

*IO_L32N_0

F8

*IO_L32P_0

G8

IO_L35N_GCLK16_0

A9

IO_L35P_GCLK17_0

B9

IO_L34N_GCLK18_0

C9

IO_L34P_GCLK19_0

D9

IO_L38N_VREF_0

F9

IO_L38P_0

G9

IO_L37N_GCLK12_0

A10

IO_L37P_GCLK13_0

C10

*IO_L40N_0

F10

IO_L39N_0

A11

IO_L39P_0

B11

IO_L36N_GCLK14_0

C11

IO_L36P_GCLK15_0

D11

*IO_L42N_0

E11

*IO_L42P_0

F11

*IO_L40P_0

G11

IO_L41N_0

A12

IO_L41P_0

B12

*IO_L47N_0

C12

*IO_L47P_0

D12

IO_L51N_0

E12

IO_L51P_0

F12

*IO_L50N_0

A13

*IO_L50P_0

C13

IO_L63N_SCP6_0

E13

IO_L63P_SCP7_0

F13

IO_L62N_VREF_0

A14

IO_L62P_0

B14

IO_L65N_SCP2_0

C14

IO_L65P_SCP3_0

D14

IO_L64N_SCP4_0

A15

IO_L64P_SCP5_0

C15

IO_L66N_SCP0_0

A16

IO_L66P_SCP1_0

B16

U5A


VCC1V2

VCCBANK2

VCCAUX

CS

S

SO

SCK

GND

TCK

SUSPEND

GS5

SUSPENDND

1 2

3 4

5 6

7 8

9 10

11 12

13 14

P1

GND

TMS

TCK

TD

TDO

DDR1V8

HSWAP

IO_L62P_D5_2

R3

IO_L62N_D6_2

T3

IO_L65P_INIT_B_2

U3

IO_L65N_CSO_B_2

V3

IO_L63P_2

T4

IO_L63N_2

V4

IO_L64P_D8_2

N5

IO_L48P_D7_2

R5

IO_L48N_RDWR_B_VREF_2

T5

IO_L49P_D3_2

U5

IO_L49N_D4_2

V5

*IO_L47P_2

N6

IO_L64N_D9_2

P6

IO_L45P_2

T6

IO_L45N_2

V6

*IO_L44P_2

N7

*IO_L47N_2

P7

IO_L46P_2

R7

IO_L46N_2

T7

IO_L43P_2

U7

IO_L43N_2

V7

*IO_L40P_2

M8

*IO_L40N_2

N8

*IO_L44N_2

P8

IO_L31P_GCLK31_D14_2

R8

IO_L31N_GCLK30_D15_2

T8

IO_L41P_2

U8

IO_L41N_VREF_2

V8

*IO_L22N_2

N9

IO_L32P_GCLK29_2

T9

IO_L32N_GCLK28_2

V9

*IO_L22P_2

M10

*IO_L20P_2

N10

IO_L29P_GCLK3_2

R10

IO_L29N_GCLK2_2

T10

IO_L30P_GCLK1_D13_2

U10

IO_L30N_GCLK0_USERCCLK_2

V10

*IO_L15P_2

M11

*IO_L15N_2

N11

*IO_L20N_2

P11

IO_L16P_2

R11

IO_L16N_VREF_2

T11

IO_L23P_2

U11

IO_L23N_2

V11

IO_L13P_M1_2

N12

IO_L13N_D10_2

P12

*IO_L19P_2

T12

*IO_L19N_2

V12

IO_L3P_D0_DIN_MISO_MISO1_2

R13

IO_L3N_MOSI_CSI_B_MISO0_2

T13

IO_L14P_D11_2

U13

IO_L14N_D12_2

V13

IO_L12P_D1_MISO2_2

T14

IO_L12N_D2_MISO3_2

V14

IO_L1P_CCLK_2

R15

IO_L1N_M0_CMPMISO_2

T15

*IO_L5P_2

U15

*IO_L5N_2

V15

IO_L2P_CMPCLK_2

U16

IO_L2N_CMPMOSI_2

V16

U5C


C19

0.01uF

C21

0.01uF

C23

0.01uF

C25

0.01uF

C27

0.01uF

C29

0.01uF

C31

0.01uF

C33

0.01uF

C35

0.01uF

C37

0.01uF

C39

0.01uF

C40

0.01uF

C41

0.01uF

C42

0.01uF

C44

0.01uF

C46

0.01uF

C48

0.01uF

C50

0.01uF

C52

0.01uF

C54

0.01uF

C55

0.01uF

C56

0.01uF

C57

0.01uF

C58

0.01uF

C59

0.01uF

C60

0.01uF

C63

0.01uF

C64

0.01uF

C18

0.01uF

C20

0.01uF

C22

0.01uF

C24

0.01uF

C26

0.01uF

C28

0.01uF

C30

0.01uF

C32

0.01uF

C34

0.01uF

C36

0.01uF

C38

0.01uF

C43

0.01uF

C45

0.01uF

C47

0.01uF

C49

0.01uF

C51

0.01uF

C53

0.01uF

DDR1V8

GND

GND

VCC1V2

R14

4.7K

HSWAP

R

4

INT_B

R18

1K

R

4

DONE

PROG

1

2

DL

DONE

PROG

INT_B

GNG

1

VCCAUX

B1

GND

1

GND

1

VCCO_3

E2

GND

2

VCCO_3

J2

GND

2

VCCO_3

R2

PROGRAM_B_2

2

GND

3

VCCO_3

G4

GND

4

VCCO_3

M4

GND

4

VCCO_2

U4

VCCO_0

B5

GND

5

VCCAUX

E5

GND

5

VCCO_3

J5

VCCAUX

P5

GND

6

VCCO_2

R6

GND

6

GND

7

VCCO_0

D7

VCCINT

G7

VCCAUX

K7

VCCINT

M7

GND

8

VCCINT

J8

GND

8

VCCINT

L8

VCCAUX

E9

VCCINT

H9

GND

9

VCCINT

K9

GND

9

VCCAUX

M9

VCCO_2

P9

GND

9

VCCO_2

U9

VCCO_0

B10

GND

10

VCCO_0

E10

VCCAUX

G10

GND

10

VCCINT

J10

GND

10

VCCINT

L10

VCCAUX

P10

VCCINT

H11

GND

11

VCCINT

K11

GND

11

GND

12

VCCAUX

J12

VCCINT

M12

VCCO_2

R12

GND

12

GND

13

VCCO_0

D13

GND

13

CMPCS_B_2

13

VCCAUX

E14

VCCO_1

J14

VCCAUX

P14

GND

14

VCCO_2

U14

VCCO_0

B15

TDI

15

GND

15

VCCO_1

G15

GND

15

VCCO_1

M15

GND

16

TDO

16

SUSPEND

16

GND

16

TCK

17

VCCAUX

B17

VCCO_1

E17

GND

17

VCCO_1

J17

GND

17

VCCO_1

R17

DONE_2

17

GND

18

TMS

18

GND

18

GND

18

U5E


M0

M1

GS6

GS7

GND

M0

M1

R1 R1

ZIO

RZQ

E/D

G ND O UT

3

VCC

4

U10

FXO-HC536R

GND

C84

0.01uF

GCLK1

C83

15pF

GND

GND

GCLK1

PROGB

INTB

JTAG00MHz OSCILLATOR

VCCAUX

VCCBANK2

EXP_IO_P1

EXP_IO_N1

EXP_IO_P2

EXP_IO_N2

EXP_IO_P3

EXP_IO_N3

EXP_IO_P4

EXP_IO_N4

EXP_IO_P5

EXP_IO_N5

EXP_IO_P6

EXP_IO_N6

EXP_IO_P7

EXP_IO_N7

EXP_IO_P8

EXP_IO_N8

EXP_IO_P9

EXP_IO_N9

EXP_IO_P10

EXP_IO_N10

EXP_IO_P11

EXP_IO_N11

EXP_IO_P12

EXP_IO_N12

EXP_IO_P13

EXP_IO_N13

EXP_IO_P14

EXP_IO_N14

EXP_IO_P15

EXP_IO_N15

EXP_IO_P16

EXP_IO_N16

7Seg_[0..7]

7Seg_1en

7Seg_2en

7Seg_3en

Vsync

Hsync

B0..1]

R0..2]

G[0..2]

DAT0

DAT1

DAT2

DAT3

CMD

CLK

LED1..8]

DP1..8]

SW1..6]

AUDO_L

AUDO_R

SW1

SW2

SW3

SW4

SW5

SW6

DP1

DP2

DP3

DP4

DP5

DP6

DP7

DP8

LED1

LED2

LED3

LED4

LED5

LED6

LED7

LED8

7Seg_0

7Seg_1

7Seg_2

7Seg_3

7Seg_4

7Seg_5

7Seg_6

7Seg_7

EXP_IO_P1..16]

EXP_IO_N1..16]

EXP_IO_P1..16]

EXP_IO_N1..16]

EXP_IO_N1..16]

B0

B1

R0

R1

R2

G0

G1

G2

DONE

MCLK

TX

RX

1 2

3 4

5 6

7 8

R

0R

TDI

TMS

TDO

VCCAUX VCCBANK2

VCCAUX

VCCAUX

VCCAUX

VCCAUX VCCAUX

VCCAUX

VCCAUX

1 2 3 4 5


31/33

1 2 3 4 5

A A

B B

C C

Date: 3 nov 2 15

KiCad E.D.A.

Rev:ize: A4

Id: 5/7

Title: MIMAS V2

File: Power.sch

Sheet: /POWER/

Numato Lab


License: CC BY-SA

A

1

OUT

2

IN

U6

LM1117

A

1

OUT

2

IN

U7

LM1117

A

1

OUT

2

IN

U8

LM1117

VCCIN

DDR1V8

VCC1V2CCAUX

1

2

3

J1

VCCAUX VCC1V2

DDR1V8

C70

10uF

C73

0.1uF

GND

GND

VCCIN

VCCIN

R

2

R

0

R

2

R

1

R

2

R

3

C69

10uF

C72

0.1uF

C71

10uF

C74

0.1uF

+

C65

47uF

VCCIN

1

2

3

K

CCIN

VBUS

E

P

W

E

1

2

3

1 - 2 USB PWR

2 - 3 EXT PWR

A

1

OUT

2

IN

U3

LM1117

VCCIN VCCBANK2

VCCBANK2

C9

10uF

C10

0.1uF

R2

R

3

1 2 3 4 5


32/33

1 2 3 4 5

A A

B B

C C

Date: 3 nov 2 15

KiCad E.D.A.

Rev:ize: A4

Id: 6/7

Title: MIMAS V2

File: ExpansionModules.sch

Sheet: /Expansion Modules/

Numato Lab


License: CC BY-SA

e

d

C.A.

3

c

DP

5

b

a

C.A.

8

f

g

0

AFF2

7SEGMENTS

e

d

C.A.

3

c

DP

5

b

a

C.A.

8

f

g

0

AFF3

7SEGMENTS

e

d

C.A.

3

c

DP

5

b

a

C.A.

8

f

g

0

AFF1

7SEGMENTS

7Seg_[0..7]

7Seg_0

7Seg_1

7Seg_2

7Seg_3

7Seg_4

7Seg_5

7Seg_6

7Seg_7

7Seg_1en

7Seg_2en

7Seg_3en

1

2

3

4

5

6

7

8

9

10

11

12

13

14

15

J2

DB15

Red

Green

Bue

Hsync

Vsync

GND

R35

2K

R36

1K

R37

510R

R12

2K

R13

1K

R30

510R

R10

1K

R11

510R

R8

200R

R9

200R

Vsync

Hsync

B[0..1]

G[0..2]

R[0..2]

VGA Connector

B0

B1

G0

G1

G2

R0

R1

R2

R

1

R

1

R

1

1 2

3 4

5 6

7 8

R

330R

1 2

3 4

5 6

7 8

R

330R

GND

GND

GND

R42

100K

CLK

CMD

DAT3

DAT2

DAT0

DAT1

6

0.1uF

DAT2

DAT3

CMD

VCC

CLK

GND

DAT0

DAT1

SHELD

9

SHELD

10

SHELD

11

SHELD

12

U2

MICRO_SD_N

SW3

SW2

SW1

SW4

SW4

SW3

SW2

SW1

1 2

D6

1 2

D7

1 2

D8

1 2

D9

1 2

D5

1 2

D4

1 2

D3

1 2

D2

1 2

3 4

5 6

7 8

R

2

1 2

3 4

5 6

7 8

R

2

GND

LED8

LED1

LED2

LED3

LED4

LED5

LED6

LED7

LED[1..8]

SW[1..6]

1

2

3

4

GND

CON1

AUDIO_JACK

C7

0.1uF

C8

0.1uF

R45

3.3K

R46

3.3K

AUDIO_L

AUDIO_R

GND

VCCAUX

SW6

SW5

W5

SW6

GND

PUSH BUTTON SWITCH

AUDIO

SEVEN SEGMENT DISPLAY

MICROSD

VCCAUX

VCCAUX

VCCAUX

VCCAUX

1 2

3 4

5 6

7 8

R

1

1 2

3 4

5 6

7 8

RN5

680R

1 2

3 4

5 6

7 8

RN4

680R

B

1

E

2

C

3

Q3

PNP_N

B

1

E

2

C

3

Q2

PNP_N

B

1

E

2

C

3

Q4

PNP_N

1 2 3 4 5


33/33

1 2 3 4 5

A A

B B

C C

Date: 3 nov 2 15

KiCad E.D.A.

Rev:ize: A4

Id: 7/7

Title: MIMAS V2

File: ExpansionConnectors.sch

Sheet: /Expansion Connectors/

Numato Lab


License: CC BY-SA

1 2

3 4

5 6

7 8

9 10

11 12

P6

1 2

3 4

5 6

7 8

9 10

11 12

P7

1 2

3 4

5 6

7 8

9 10

11 12

P8

1 2

3 4

5 6

7 8

9 10

11 12

P9

EXP_IO_P[1..16] EXP_IO_N[1..16]

EXP_IO_P1

EXP_IO_P2

EXP_IO_P3

EXP_IO_P4

EXP_IO_P5

EXP_IO_P6

EXP_IO_P7

EXP_IO_P8

EXP_IO_P9

EXP_IO_P10

EXP_IO_P11

EXP_IO_P12

EXP_IO_P13

EXP_IO_P14

EXP_IO_P15

EXP_IO_P16

EXP_IO_N1

EXP_IO_N2

EXP_IO_N3

EXP_IO_N4

EXP_IO_N5

EXP_IO_N6

EXP_IO_N7

EXP_IO_N8

EXP_IO_N9

EXP_IO_N10

EXP_IO_N11

EXP_IO_N12

EXP_IO_N13

EXP_IO_N14

EXP_IO_N15

EXP_IO_N16

GND

GND

GND

GND GND

GND

GND

GND

VCCAUX

VCCAUX

VCCAUX

VCCAUX

VCCAUX

VCCAUX

VCCAUX

VCCAUX

VCCAUX

VCCAUX

DIP SWITCH

DP4

DP3

DP2

DP1

GND

DP[1..8]

DP8

DP7

DP6

DP5

1

2

3

4

5

6

7

8 9

10

11

12

13

14

15

16

P5

O

N

O

F

1 2

3 4

5 6

7 8

R

2

1 2

3 4

5 6

7 8

R

2

1

2

3

4

5

6

7

8

Documents

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