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MICROPROCESSOR TECHNOLOGY

Assis. Prof. Hossam El-Din Moustafa

Lecture 7

Ch.3 Addressing Modes (cont.)

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6. Register Relative Addressing

It is similar to base-plus-index addressing and displacement addressing.

Data are addressed by adding the displacement to the contents of a base or index register (BP, BX, DI, or SI).

Example:

MOV AX, [BX+1000H]

Given: BX = 0100H

Ds = 0200H

DS

dd

gatedelayI

VCT *

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6. Register Relative Addressing (cont.)

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6. Register Relative Addressing (cont.)

The displacement can be a number added to or subtracted from the register within the [ ]

Examples: MOV AL,[DI+2]

MOV AL,[SI-1]

The displacement can be an offset address appended to the front of the [ ].

Example: MOV AL, DATA[DI]

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6. Register Relative Addressing (cont.)

In the 8086 – 80286, the value of the displacement is limited to a 16-bit signed number with a value ranging between +32767 and -32768 (7FFH – 8000H)

In the 386 and above, a 32 bit displacement is allowed with a value ranging between:

2 147 483 647, -2 147 483 648 (7FFFFFFFH – 800000000H)

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6. Register Relative Addressing (cont.)

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7. Base Relative Plus-Index Addressing

Similar to the base-plus-index addressing but it adds a displacement, besides using a base register and an index register, to form the memory address.

It often addresses a two dimensional array of memory data.

It is the least used addressing mode.

Example: MOV AX,[BX+SI+100H]

Given: BX=0020H SI=0010H DS=1000H

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7. Base Relative Plus-Index Addressing (cont.)

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7. Base Relative Plus-Index Addressing (cont.)

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8. Scaled-Index Addressing

It is unique to the 80386-P4 microprocessors.

It uses 32 bit registers (a base register and an index register) to access memory.

The index register is multiplied by a scaling factor (1X, 2X, 4X, 8X).

The factor of 1X is implied and not written.

The scaling factor 2X is used to address word-sized memory arrays.

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8. Scaled-Index Addressing (cont.)

The scaling factor 4X is used to address double-word-sized memory arrays.

The scaling factor 8X is used to address quad-word-sized memory arrays.

Example: MOV AX,[EDI+2*ECX]

i.e. Multiply the contents of ECX by 2before adding it to the EDI register to form the memory address

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8. Scaled-Index Addressing (cont.)

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II. Program Memory Addressing Modes

Program memory addressing modes used with the JMP instruction consist of three forms:

1. Direct

2. Relative

3. Indirect

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1. Direct Program Memory Addressing

Used by early microprocessors for calls and jumps.

It is less used than other types

It is also used in high-level languages, such as the BASIC language GOTO, GOSUB instructions

The instructions store the address with the opcode.

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1. Direct Program Memory Addressing (cont)

Inter-segment jump: A jump to any memory location within the entire memory system.

The direct jump is called far jump, Why????

In real mode, a far jump accesses any location within the first 1M byte of memory.

In protected mode, a far jump can access any memory location within the 4G byte range in the 80386 – P4 microprocessors.

The CALL instruction uses direct program addressing.

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2. Relative Program Memory Addressing

The term relative means “relative to the instruction pointer”.

It is a 1-byte instruction, with a 1-byte displacement (for short jumps) or a 2-byte displacement (for near jumps and calls) that adds to the instruction pointer.

Intra-segment jump: A jump anywhere within the current code segment.

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2. Relative Program Memory Addressing (cont.)

Relative JMP and CALL instructions contain either 8-bit or 16-bit (32-bit for 80386–P4) signed displacement that allows a forward or a reverse memory reference.

The short jump (8-bit displacement) has a range between (+127, -128)

The near jump (16-bit displacement) has a range between (+32K, -32K) bytes

In the 80386-P4, the 32-bit displacement allows a range (+2G, -2G) bytes. (used only in protected mode)

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3. Indirect Program Memory Addressing

It can use any 16-bit register; any relative register ([BP], [BX], [DI], or [SI]).

In 80386-P4, the extended register can be used to hold the address or indirect address of relative JMP or CALL.

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III. Stack-Memory Addressing Modes

The stack holds data temporarily and stores return addresses for procedures.

The stack memory is LIFO (Last-in, First-out) memory.

Data are placed onto the stack with a PUSH instruction and removed with a POP one.

The CALL instruction uses the stack to hold the return address for procedure, and a RET instruction to remove the return address from it.

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III. Stack-Memory Addressing Modes (cont.)

The stack memory is maintained by two registers; the stack pointer (ESP) and the stack segment register (SS).

The ESP register adds SS*10H to form the stack memory address in the real mode.

In protected mode, the SS register holds a selector that accesses a descriptor for the base address of the stack segment.

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III. Stack-Memory Addressing Modes (cont.)

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III. Stack-Memory Addressing Modes (cont.)

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Thank You

With all best wishes !!