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Memories Last updated 5/15/20

Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

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Page 1: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

Memories

Last updated 5/15/20

Page 2: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

2 © tjEE 3921

Counters

These slides review the design for several types of memories

Upon completion: You should be able to design ROMs and RAMS of various sizes and register

configurations

Page 3: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

3 © tjEE 3921

Memories

• ROM – mux based with memory values stored as constants

Page 4: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

4 © tjEE 3921

Memories

• ROM – mux based

Page 5: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

5 © tjEE 3921

Memories

• ROM – mux based

Page 6: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

6 © tjEE 3921

Memories

• ROM – inferred with memory values stored in a xx.mif file

Page 7: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

7 © tjEE 3921

Memories

• ROM – inferred w/ mif file

rom_init.mif

Page 8: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

8 © tjEE 3921

Memories

• ROM – inferred w/ mif file

• Cannot be simulated

Page 9: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

9 © tjEE 3921

Memories

• SRAM – synchronous write – generic• No inferred memory

Page 10: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

10 © tjEE 3921

Memories

• SRAM – register based

32 bits x 64 words4 bytes x 64 words8x4x64 bits (registers) = 2048

Page 11: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

11 © tjEE 3921

• SRAM – register based

Memories

Page 12: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

12 © tjEE 3921

Memories

• SRAM – register based

Page 13: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

13 © tjEE 3921

Memories

• SRAM – synchronous read/write – generic• Inferred memory

Page 14: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

14 © tjEE 3921

Memories

• SRAM – inferred memory

8 bits x 4096 words = 32,768 bits

Page 15: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

15 © tjEE 3921

Memories

• SRAM – inferred memory

Page 16: Memories - faculty-web.msoe.edu€¦ · 15.05.2020  · synchronous RAM using inferred memories 1) downto Inputs: outputs: clk, addr, we _ b, data_out data—i n 4096 library ieee

16 © tjEE 3921

Memories

• SRAM – inferred memory