LT1993-2 Noise Differential Amplifier/ ADC Driver (AV = 2V

LT1993-2

1Rev B

For more information www.analog.comDocument Feedback

TYPICAL APPLICATION

FEATURES DESCRIPTION

APPLICATIONS

800MHz Low Distortion, Low Noise Differential Amplifier/

ADC Driver (AV = 2V/V)

The LT®1993-2 is a low distortion, low noise Differential Amplifier/ADC driver for use in applications from DC to 800MHz. The LT1993-2 has been designed for ease of use, with minimal support circuitry required. Exceptionally low input-referred noise and low distortion products (with either single-ended or differential inputs) make the LT1993-2 an excellent solution for driving high speed 12-bit and 14-bit ADCs. In addition to the normal unfiltered outputs (+OUT and –OUT), the LT1993-2 has a built-in 175MHz differential low pass filter and an additional pair of filtered outputs (+OUTFILTERED, –OUTFILTERED) to reduce external filtering components when driving high speed ADCs. The output common mode voltage is easily set via the VOCM pin, eliminating either an output trans-former or AC-coupling capacitors in many applications.

The LT1993-2 is designed to meet the demanding require-ments of communications transceiver applications. It can be used as a differential ADC driver, a general-purpose differential gain block, or in any other application requir-ing differential drive. The LT1993-2 can be used in data acquisition systems required to function at frequencies down to DC.

The LT1993-2 operates on a 5V supply and consumes 100mA. It comes in a compact 16-lead 3 × 3 QFN package and operates over a –40°C to 85°C temperature range.

n Differential ADC Driver for: Imaging Communications

n Differential Driver/Receivern Single Ended to Differential Conversionn Differential to Single Ended Conversionn Level Shiftingn IF Sampling Receiversn SAW Filter Interfacing/Buffering

n 800MHz –3dB Bandwidthn Fixed Gain of 2V/V (6dB)n Low Distortion:

38dBm OIP3, –70dBc HD3 (70MHz, 2VP-P) 51dBm OIP3, –94dBc HD3 (10MHz, 2VP-P)

n Low Noise: 12.3dB NF, en = 3.8nV/√Hz (70MHz)n Differential Inputs and Outputsn Additional Filtered Outputsn Adjustable Output Common Mode Voltagen DC- or AC-Coupled Operationn Minimal Support Circuitry Requiredn Small 0.75mm Tall 16-Lead 3 × 3 QFN Package

4-Channel WCDMA Receive Channel

••

2.2V19932 TA01a

MINI-CIRCUITSTCM4-19

1:4Z-RATIO

LTC2255 125Msps14-BIT ADC SAMPLING

AT 92.16Msps

70MHzIF IN

52.3pF82nH0.1µF

0.1µF

12.2Ω

LT1993-2

–INA

–INB

–OUTFILTERED

–OUT

+OUTFILTERED

+OUT+INB

+INA VOCMENABLE

12.2Ω

LTC2255ADC

AIN–

AIN+

FREQUENCY (MHz)0

AMPL

ITUD

E (d

BFS)

0

–20

–40

–80

–60

–100

–10

–30

–50

–90

–70

–110

–120

19932 TA01b

15105 20 25 4530 35 40

32768 POINT FFTTONE CENTER FREQUENCIESAT 62.5MHz, 67.5MHz, 72.5MHz, 77.5MHz

4-Tone WCDMA Waveform, LT1993-2 Driving LTC2255 14-Bit

ADC at 92.16Msps

All registered trademarks and trademarks are the property of their respective owners.

http://www.analog.com/LT1993-2?doc=LT1993-2.pdf

http://www.analog.com

https://form.analog.com/Form_Pages/feedback/documentfeedback.aspx?doc=LT1993-2.pdf&product=LT1993-2&Rev=0



LT1993-2

2Rev B

For more information www.analog.com

DC ELECTRICAL CHARACTERISTICS

Total Supply Voltage (VCCA/VCCB/VCCC to VEEA/VEEB/VEEC) ..................................................5.5V

Input Current (+INA, –INA, +INB, –INB, VOCM, ENABLE) ................................................ ±10mA

Output Current (Continuous) (Note 6) +OUT, –OUT (DC) .......................................... ±100mA

(AC) ........................................... ±100mA +OUTFILTERED, –OUTFILTERED (DC) ............. ±15mA

(AC) ............ ±45mAOutput Short Circuit Duration (Note 2) ............ IndefiniteOperating Temperature Range (Note 3) ....–40°C to 85°CSpecified Temperature Range (Note 4) ....–40°C to 85°CStorage Temperature Range .................. –65°C to 125°CJunction Temperature ........................................... 125°CLead Temperature Range (Soldering 10 sec)......... 300°C

(Note 1)

The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted.

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

Input/Output Characteristics (+INA, +INB, –INA, –INB, +OUT, –OUT, +OUTFILTERED, –OUTFILTERED)

GDIFF Gain Differential (+OUT, –OUT), VIN = ±0.8V Differential l 5.8 6.08 6.3 dB

VSWINGMIN Single-Ended +OUT, –OUT, +OUTFILTERED, –OUTFILTERED. VIN = ±2.2V Differential

l

0.25 0.35 0.5

V V

VSWINGMAX Single-Ended +OUT, –OUT, +OUTFILTERED, –OUTFILTERED. VIN = ±2.2V Differential

l

3.6 3.5

3.75 V V

VSWINGDIFF Output Voltage Swing Differential (+OUT, –OUT), VIN = ±2.2V Differential

l

6.5 6

7 VP-P VP-P

IOUT Output Current Drive (Note 5) l ±40 ±45 mA

VOS Input Offset Voltage

l

–6.5 –10

1 6.5 10

mV mV

TCVOS Input Offset Voltage Drift TMIN to TMAX l 2.5 µV/°C

IVRMIN Input Voltage Range, MIN Single-Ended l –0.1 V

IVRMAX Input Voltage Range, MAX Single-Ended l 5.1 V

RINDIFF Differential Input Resistance l 170 200 240

PIN CONFIGURATIONABSOLUTE MAXIMUM RATINGS

ORDER INFORMATIONLEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION TEMPERATURE RANGE

LT1993CUD-2#PBF LT1993CUD-2#TRPBF LBJG 16-LEAD (3mm × 3mm) PLASTIC QFN –40°C to 85°C

LT1993IUD-2#PBF LT1993IUD-2#TRPBF LBJG 16-LEAD (3mm × 3mm) PLASTIC QFN –40°C to 85°C

Consult ADI Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.

Tape and reel specifications. Some packages are available in 500 unit reels through designated sales channels with #TRMPBF suffix.

16 15 14 13

5 6 7 8

TOP VIEW

UD PACKAGE16-LEAD (3mm × 3mm) PLASTIC QFN

TJMAX = 125°C, θJA = 68°C/W, θJC = 4.2°C/WEXPOSED PAD IS VEE (PIN 17) MUST BE SOLDERED TO THE PCB

9

1017VEE

11

12

4

3

2

1VCCC

VOCM

VCCA

VEEA

VEEC

ENABLE

VCCB

VEEB

+INA

+INB

–INA

–INB

+OUT

+OUT

FILT

ERED

–OUT

FILT

ERED

–OUT



http://www.analog.com/media/en/package-pcb-resources/package/tape-reel-rev-n.pdf

LT1993-2

3Rev B



Input/Output Characteristics

–3dBBW –3dB Bandwidth 200mVP-P Differential (+OUT, –OUT) 500 800 MHz

0.1dBBW Bandwidth for 0.1dB Flatness 200mVP-P Differential (+OUT, –OUT) 50 MHz

0.5dBBW Bandwidth for 0.5dB Flatness 200mVP-P Differential (+OUT, –OUT) 100 MHz

SR Slew Rate 3.2VP-P Differential (+OUT, –OUT) 1100 V/µs

ts1% 1% Settling Time 1% Settling for a 1VP-P Differential Step (+OUT, –OUT)

4 ns

tON Turn-On Time 40 ns

tOFF Turn-Off Time 250 ns


CINDIFF Differential Input Capacitance 1 pF

CMRR Common Mode Rejection Ratio Input Common Mode –0.1V to 5.1V l 45 70 dB

ROUTDIFF Output Resistance 0.3

COUTDIFF Output Capacitance 0.8 pF

Common Mode Voltage Control (VOCM Pin)

GCM Common Mode Gain Differential (+OUT, –OUT), VOCM = 1.1V to 3.6V Differential (+OUT, –OUT), VOCM = 1.3V to 3.4V

l

0.9 0.9

1 1.1 1.1

V/V V/V

VOCMMIN Output Common Mode Voltage Adjustment Range, MIN

Measured Single-Ended at +OUT and –OUT

l

1.1 1.3

V V

VOCMMAX Output Common Mode Voltage Adjustment Range, MAX

Measured Single-Ended at +OUT and –OUT

l

3.6 3.4

V V

VOSCM Output Common Mode Offset Voltage Measured from VOCM to Average of +OUT and –OUT l –30 4 30 mV

IBIASCM VOCM Input Bias Current l 5 15 µA

RINCM VOCM Input Resistance l 0.8 3 M

CINCM VOCM Input Capacitance 1 pF

ENABLE Pin

VIL ENABLE Input Low Voltage l 0.8 V

VIH ENABLE Input High Voltage l 2 V

IIL ENABLE Input Low Current ENABLE = 0.8V l 0.5 µA

IIH ENABLE Input High Current ENABLE = 2V l 1 3 µA

Power Supply

VS Operating Range l 4 5 5.5 V

IS Supply Current ENABLE = 0.8V l 88 100 112 mA

ISDISABLED Supply Current (Disabled) ENABLE = 2V l 250 500 µA

PSRR Power Supply Rejection Ratio 4V to 5.5V l 55 90 dB

The l denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 25°C. VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted.

DC ELECTRICAL CHARACTERISTICS

AC ELECTRICAL CHARACTERISTICS TA = 25°C, VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted.



LT1993-2

4Rev B


AC ELECTRICAL CHARACTERISTICS


Common Mode Voltage Control (VOCM Pin)

–3dBBWCM Common Mode Small-Signal –3dB Bandwidth

0.1VP-P at VOCM, Measured Single-Ended at +OUT and –OUT

300 MHz

SRCM Common Mode Slew Rate 1.3V to 3.4V Step at VOCM 500 V/µs

Noise/Harmonic Performance Input/output Characteristics

1kHz Signal

Second/Third Harmonic Distortion 2VP-P Differential (+OUTFILTERED, –OUTFILTERED) –100 dBc

2VP-P Differential (+OUT, –OUT) –100 dBc

2VP-P Differential (+OUT, –OUT), RL = 100 –100 dBc

3.2VP-P Differential (+OUTFILTERED, –OUTFILTERED) –91 dBc

3.2VP-P Differential (+OUT, –OUT) –91 dBc

3.2VP-P Differential (+OUT, –OUT), RL = 100 –91 dBc

Third-Order IMD 2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 0.95kHz, f2 = 1.05kHz

–102 dBc

2VP-P Differential Composite (+OUT, –OUT), RL = 100 , f1 = 0.95kHz, f2 = 1.05kHz

–102 dBc

3.2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 0.95kHz, f2 = 1.05kHz

–93 dBc

OIP31k Output Third-Order Intercept Differential (+OUTFILTERED, –OUTFILTERED), f1 = 0.95kHz, f2 = 1.05kHz

54 dBm

en1k Input Referred Noise Voltage Density 3.5 nV/√Hz

1dB Compression Point RL = 100 22.7 dBm

10MHz Signal







Third-Order IMD 2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 9.5MHz, f2 = 10.5MHz

–96 dBc

2VP-P Differential Composite (+OUT, –OUT), RL = 100 , f1 = 9.5MHz, f2 = 10.5MHz

–96 dBc

3.2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 9.5MHz, f2 = 10.5MHz

–87 dBc

OIP310M Output Third-Order Intercept Differential (+OUTFILTERED, –OUTFILTERED), f1 = 9.5MHz, f2 = 10.5MHz

51 dBm

NF Noise Figure Measured Using DC800A Demo Board 11.3 dB

en10M Input Referred Noise Voltage Density 3.5 nV/√Hz


TA = 25°C, VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted.



LT1993-2

5Rev B


AC ELECTRICAL CHARACTERISTICS


50MHz Signal








–84 dBc


–88 dBc

3.2VP-P Differential Composite (+OUTFILTERED, –OUTFILTERED), f1 = 49.5MHz, f2 = 50.5MHz

–75 dBc


45 dBm




70MHz Signal





–70 dBc


–72 dBc


38 dBm




100MHz Signal





–58 dBc


–59 dBc


32 dBm


TA = 25°C, VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted.



LT1993-2

6Rev B


FREQUENCY (MHz)0

THIR

D OR

DER

IMD

(dBc

)

–10

–20

–30

–50

–40

–60

–70

–80

–90

–100

–110

19932 G06

604020 80 100 140120

2 TONES, 2VP-P COMPOSITE1MHz TONE SPACING

UNFILTERED OUTPUTS

FILTERED OUTPUTS

FREQUENCY (MHz)0

THIR

D OR

DER

IMD

(dBc

)

–10

–20

–30

–50

–40

–60

–70

–80

–90

–100

–110

19932 G04

604020 80 100 140120

UNFILTERED OUTPUTS

FILTERED OUTPUTS


FREQUENCY (MHz)

GAIN

(dB)

21

18

15

12

9

6

3

0

–31 100 1000 10000

19932 G03

10

VIN = 100mVP-PUNFILTERED OUTPUTS

10pF5pF2pF0pF

FREQUENCY (MHz)

GAIN

(dB)

12

9

6

3

0

–3

–6

–9

–121 100 1000 10000

19932 G01

10

VIN = 100mVP-PUNFILTERED: RLOAD = 400ΩFILTERED: RLOAD = 350Ω (EXTERNAL) +50Ω (INTERNAL, FILTERED OUTPUTS)

UNFILTERED OUTPUTS

FILTERED OUTPUTS

FREQUENCY (MHz)

GAIN

(dB)

12

9

6

3

0

–3

–6

–9

–121 100 1000 10000

19932 G02

10

VIN = 100mVP-PUNFILTERED: RLOAD = 100ΩFILTERED: RLOAD = 50Ω (EXTERNAL) +50Ω (INTERNAL, FILTERED OUTPUTS)

UNFILTERED OUTPUTS

FILTERED OUTPUTS

FREQUENCY (MHz)0

THIR

D OR

DER

IMD

(dBc

)

–10

–20

–30

–50

–40

–60

–70

–80

–90

–100

–110

19932 G05

604020 80 100 140120


UNFILTERED OUTPUTS

FILTERED OUTPUTS

Frequency Response RLOAD = 400

Frequency Response RLOAD = 100

Frequency Response vs CLOAD, RLOAD = 400

Third Order Intermodulation Distortion vs Frequency Differential Input, No RLOAD

Third Order Intermodulation Distortion vs Frequency Differential Input, RLOAD = 400

Third Order Intermodulation Distortion vs Frequency Differential Input, RLOAD = 100

TYPICAL PERFORMANCE CHARACTERISTICS

Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime.Note 2: As long as output current and junction temperature are kept below the Absolute Maximum Ratings, no damage to the part will occur.Note 3: The LT1993C-2 is guaranteed functional over the operating temperature range of –40°C to 85°C.

Note 4: The LT1993C-2 is guaranteed to meet specified performance from 0°C to 70°C. It is designed, characterized and expected to meet specified performance from –40°C and 85°C but is not tested or QA sampled at these temperatures. The LT1993I-2 is guaranteed to meet specified performance from –40°C to 85°C.Note 5: This parameter is pulse tested.Note 6: This parameter is guaranteed to meet specified performance through design and characterization. It has not been tested.




AC ELECTRICAL CHARACTERISTICS TA = 25°C, VCCA = VCCB = VCCC = 5V, VEEA = VEEB = VEEC = 0V, ENABLE = 0.8V, +INA shorted to +INB (+IN), –INA shorted to –INB (–IN), VOCM = 2.2V, Input common mode voltage = 2.2V, no RLOAD unless otherwise noted.



LT1993-2

7Rev B


FREQUENCY (MHz)1

DIST

ORTI

ON (d

Bc)

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–11010 100 1000

19932 G15

UNFILTERED OUTPUTSVOUT = 2VP-P

HD3

HD2

FREQUENCY (MHz)1

DIST

ORTI

ON (d

Bc)

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–11010 100 1000

19932 G14


HD3

HD2

FREQUENCY (MHz)1

DIST

ORTI

ON (d

Bc)

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–11010 100 1000

19932 G13


HD3

HD2

FREQUENCY (MHz)1

DIST

ORTI

ON (d

Bc)

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–11010 100 1000

19932 G12

FILTERED OUTPUTSVOUT = 2VP-P

HD3

HD2

FREQUENCY (MHz)1

DIST

ORTI

ON (d

Bc)

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–11010 100 1000

19932 G10


HD3

HD2

FREQUENCY (MHz)1

DIST

ORTI

ON (d

Bc)

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–11010 100 1000

19932 G11


HD3

HD2

FREQUENCY (MHz)0

OUTP

UT IP

3 (d

Bm)

60

55

50

40

45

35

30

25

20

19932 G08

604020 80 100 140120


UNFILTERED OUTPUTS

FILTERED OUTPUTS

FREQUENCY (MHz)0

OUTP

UT IP

3 (d

Bm)

60

55

50

40

45

35

30

25

20

19932 G09

604020 80 100 140120


UNFILTERED OUTPUTS

FILTERED OUTPUTS

FREQUENCY (MHz)0

OUTP

UT IP

3 (d

Bm)

60

55

50

40

45

35

30

25

20

19932 G07

604020 80 100 140120


UNFILTERED OUTPUTS

FILTERED OUTPUTS

Output Third Order Intercept vs Frequency, Differential Input, No RLOAD

Output Third Order Intercept vs Frequency, Differential Input, RLOAD = 400

Output Third Order Intercept vs Frequency, Differential Input, RLOAD = 100

Distortion (Filtered) vs Frequency Differential Input, No RLOAD

Distortion (Filtered) vs Frequency Differential Input, RLOAD = 400

Distortion (Filtered) vs Frequency Differential Input, RLOAD = 100

Distortion (Unfiltered) vs Frequency, Differential Input, No RLOAD

Distortion (Unfiltered) vs Frequency, Differential Input, RLOAD = 400

Distortion (Unfiltered) vs Frequency, Differential Input, RLOAD = 100




LT1993-2

8Rev B


FREQUENCY (MHz)1

DIST

ORTI

ON (d

Bc)

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–11010 100 1000

19932 G22

HD3

HD2


FREQUENCY (MHz)1

DIST

ORTI

ON (d

Bc)

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–11010 100 1000

19932 G24

HD3

HD2


FREQUENCY (MHz)1

DIST

ORTI

ON (d

Bc)

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–11010 100 1000

19932 G23

HD3

HD2


FREQUENCY (MHz)1

DIST

ORTI

ON (d

Bc)

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–11010 100 1000

19932 G20


HD3

HD2

FREQUENCY (MHz)1

DIST

ORTI

ON (d

Bc)

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–11010 100 1000

19932 G19


HD3

HD2

FREQUENCY (MHz)1

DIST

ORTI

ON (d

Bc)

–10

–20

–30

–40

–50

–60

–70

–80

–90

–100

–11010 100 1000

19932 G21


HD3

HD2

Distortion (Filtered) vs Frequency Single-Ended Input, No RLOAD

Distortion (Filtered) vs Frequency Single-Ended Input, RLOAD = 400

Distortion (Filtered) vs Frequency Single-Ended Input, RLOAD = 100

Distortion (Unfiltered) vs Frequency, Single-Ended Input, No RLOAD

Distortion (Unfiltered) vs Frequency, Single-Ended Input, RLOAD = 400

Distortion (Unfiltered) vs Frequency, Single-Ended Input, RLOAD = 100


OUTPUT AMPLITUDE (dBm)–1

DIST

ORTI

ON (d

Bc)

–50

–55

–60

–70

–65

–75

–80

–85

–90

–95

–100

19932 G18

531 7 9 11

HD3 UNFILTERED OUTPUTS


HD2 FILTERED OUTPUTS



DIST

ORTI

ON (d

Bc)

–50

–55

–60

–70

–65

–75

–80

–85

–90

–95

–100

19932 G16

531 7 9 11






DIST

ORTI

ON (d

Bc)

–50

–55

–60

–70

–65

–75

–80

–85

–90

–95

–100

19932 G17

531 7 9 11





Distortion vs Output Amplitude 70MHz Differential Input, No RLOAD

Distortion vs Output Amplitude 70MHz Differential Input, RLOAD = 400

Distortion vs Output Amplitude 70MHz Differential Input, RLOAD = 100



LT1993-2

9Rev B


FREQUENCY (MHz)10

INPU

T RE

FERR

ED N

OISE

VOL

TAGE

(nV/

Hz) 12

6

4

8

10

2

0100 1000

19932 G30

FREQUENCY (MHz)10

NOIS

E FI

GURE

(dB)

25

20

15

10

5

0100 1000

19932 G29

VCC = 5VMEASURED USING DC800A DEMO BOARD

FREQUENCY (MHz)1

OUTP

UT 1

dB C

OMPR

ESSI

ON (d

Bm)

30

25

20

15

10

5

0

–5

–1010 100 1000

19932 G28

RLOAD = 400Ω

RLOAD = 100Ω

UNFILTERED OUTPUTS


DIST

ORTI

ON (d

Bc)

–50

–55

–60

–70

–65

–75

–80

–85

–90

–95

–100

19932 G27

531 7 9 11






DIST

ORTI

ON (d

Bc)

–50

–55

–60

–70

–65

–75

–80

–85

–90

–95

–100

19932 G26

531 7 9 11






DIST

ORTI

ON (d

Bc)

–50

–55

–60

–70

–65

–75

–80

–85

–90

–95

–100

19932 G25

531 7 9 11





Distortion vs Output Amplitude 70MHz Single-Ended Input, No RLOAD

Distortion vs Output Amplitude 70MHz Single-Ended Input, RLOAD = 400

Distortion vs Output Amplitude 70MHz Single-Ended Input, RLOAD = 100

Output 1dB Compression vs Frequency Noise Figure vs Frequency

Input Referred Noise Voltage vs Frequency


FREQUENCY (MHz)

ISOL

ATIO

N (d

B)

–40

–50

–60

–70

–80

–90

–100

–1101 100 1000 10000

19932 G31

10

UNFILTERED OUTPUTS

FREQUENCY (MHz)1

INPU

T IM

PEDA

NCE

(MAG

NITU

DE Ω

, PHA

SE°) 300

250

200

150

100

50

0

–50

–10010 100 1000

19932 G32

IMPEDANCE MAGNITUDE

IMPEDANCE PHASE

FREQUENCY (MHz)1

0.1

OUTP

UT IM

PEDA

NCE

(Ω)

1

10

100

10 100 1000

19932 G33

UNFILTERED OUTPUTS

Isolation vs FrequencyDifferential Input Impedance vs Frequency

Differential Output Impedance vs Frequency



LT1993-2

10Rev B


OUTPUT COMMON MODE VOLTAGE (V)1.2

DIST

ORTI

ON (d

Bc)

–64

–66

–68

–72

–70

–74

–76

19932 G40

1.81.61.4 2.0 2.2 2.62.4

FILTERED OUTPUTS, NO RLOADVOUT = 70MHz 2VP-P

HD3

HD2

TIME (ns)0

VOLT

AGE

(V) 1

2

500 625

19932 G41

4

2

–2125 250 375

0

4

3

0

+OUT

–OUT

ENABLE

RLOAD = 100Ω PER OUTPUT

TIME (ns)0

OUTP

UT V

OLTA

GE (V

)

2.0

2.5

3.0

225200 250

19932 G39

1.5

1.0

050 100 150 17525 75 125

0.5

4.0

3.5 +OUT

–OUT

RLOAD = 100ΩPER OUTPUT

TIME (ns)0

OUTP

UT V

OLTA

GE (V

)

2.2

2.4

2.6

4540 50

19932 G38

2.0

1.8

1.410 20 30 355 15 25

1.6

3.0

2.8


TIME (ns)0

OUTP

UT V

OLTA

GE (V

)

2.20

2.22

2.24

4540 50

19932 G37

2.18

2.16

2.1210 20 30 355 15 25

2.14

2.28

2.26


TIME (ns)0

VOLT

AGE

(V) 1

2

500 625

19932 G42

4

2

–2125 250 375

0

4

3

0

+OUT

–OUT

ENABLE


Small-Signal Transient Response Large-Signal Transient Response Overdrive Recovery Time

Distortion vs Output Common Mode Voltage LT1993-2 Driving LTC2249 14-Bit ADC Turn-On Time Turn-Off Time


FREQUENCY (MHz)1

PSRR

, CM

RR (d

B)

100

90

80

70

60

50

40

30

20

10

010 100 1000

19932 G36

CMRR

PSRR

UNFILTERED OUTPUTS

FREQUENCY (MHz)10

INPU

T RE

FLEC

TION

COE

FFIC

IENT

(S11

)

0

–5

–50

–45

–40

–35

–30

–25

–20

–15

–10

100 1000

19932 G34

MEASURED USING DC800A DEMO BOARD

FREQUENCY (MHz)10

OUTP

UT R

EFLE

CTIO

N CO

EFFI

CIEN

T (S

22)

0

–5

–50

–45

–40

–35

–30

–25

–20

–15

–10

100 1000

19932 G35

MEASURED USING DC800A DEMO BOARD

Input Reflection Coefficient vs Frequency

Output Reflection Coefficient vs Frequency PSRR, CMRR vs Frequency



LT1993-2

11Rev B


FREQUENCY (MHz)0

AMPL

ITUD

E (d

BFS)

10 20 30 40

19932 G46

–120

–110

–100

–80

–60

–40

–20

–90

–70

–50

–30

–10

0

5 15 25 35

8192 POINT FFTfIN = 30MHz, –1dBFSFILTERED OUTPUTS

FREQUENCY (MHz)0

AMPL

ITUD

E (d

BFS)

10 20 30 40

19932 G47

–120

–110

–100

–80

–60

–40

–20

–90

–70

–50

–30

–10

0

5 15 25 35


FREQUENCY (MHz)0

AMPL

ITUD

E (d

BFS)

10 20 30 40

19932 G49

–120

–110

–100

–80

–60

–40

–20

–90

–70

–50

–30

–10

0

5 15 25 35

32768 POINT FFTTONE 1 AT 69.5MHz, –7dBFSTONE 2 AT 70.5MHz, –7dBFSFILTERED OUTPUTS

FREQUENCY (MHz)0

AMPL

ITUD

E (d

BFS)

10 20 30 40

19932 G48

–120

–110

–100

–80

–60

–40

–20

–90

–70

–50

–30

–10

0

5 15 25 35


0

–20

–40

–80

–60

–100

–10

–30

–50

–90

–70

–110

–120

FREQUENCY (MHz)0

AMPL

ITUD

E (d

BFS)

19932 G50

15105 20 25 4530 35 40

32768 POINT FFTTONE CENTER FREQUENCIESAT 67.5MHz, 72.5MHz

0

–20

–40

–80

–60

–100

–10

–30

–50

–90

–70

–110

–120

FREQUENCY (MHz)0

AMPL

ITUD

E (d

BFS)

19932 G51

15105 20 25 4530 35 40

32768 POINT FFTTONE CENTER FREQUENCIESAT 62.5MHz, 67.5MHz, 72.5MHz, 77.5MHz

30MHz 8192 Point FFT, LT1993-2 Driving LTC2249 14-Bit ADC



70MHz 2-Tone 32768 Point FFT, LT1993-2 Driving LTC2249 14-Bit ADC

2-Tone WCDMA Waveform, LT1993-2 Driving LTC2255 14-Bit ADC at 92.16Msps

4-Tone WCDMA Waveform, LT1993-2 Driving LTC2255 14-Bit ADC at 92.16Msps




LT1993-2

12Rev B


VOCM (Pin 2): This pin sets the output common mode voltage. Without additional biasing, both inputs bias to this voltage as well. This input is high impedance.

VCCA, VCCB, VCCC (Pins 3, 10, 1): Positive Power Supply (Normally Tied to 5V). All three pins must be tied to the same voltage. Bypass each pin with 1000pF and 0.1µF capacitors as close to the package as possible. Split sup-plies are possible as long as the voltage between VCC and VEE is 5V.

VEEA, VEEB, VEEC (Pins 4, 9, 12): Negative Power Supply (Normally Tied to Ground). All three pins must be tied to the same voltage. Split supplies are possible as long as the voltage between VCC and VEE is 5V. If these pins are not tied to ground, bypass each pin with 1000pF and 0.1µF capacitors as close to the package as possible.

+OUT, –OUT (Pins 5, 8): Outputs (Unfiltered). These pins are high bandwidth, low-impedance outputs. The DC out-put voltage at these pins is set to the voltage applied at VOCM.

+OUTFILTERED, –OUTFILTERED (Pins 6, 7): Filtered Outputs. These pins add a series 25 resistor from the unfiltered outputs and three 12pF capacitors. Each output has 12pF to VEE, plus an additional 12pF between each pin (See the Block Diagram). This filter has a –3dB bandwidth of 175MHz.

ENABLE (Pin 11): This pin is a TTL logic input referenced to the VEEC pin. If low, the LT1993-2 is enabled and draws typically 100mA of supply current. If high, the LT1993-2 is disabled and draws typically 250µA.

+INA, +INB (Pins 15, 16): Positive Inputs. These pins are normally tied together. These inputs may be DC- or AC-coupled. If the inputs are AC-coupled, they will self-bias to the voltage applied to the VOCM pin.

–INA, –INB (Pins 14, 13): Negative Inputs. These pins are normally tied together. These inputs may be DC- or AC-coupled. If the inputs are AC-coupled, they will self-bias to the voltage applied to the VOCM pin.

Exposed Pad (Pin 17): Tie the pad to VEEC (Pin 12). If split supplies are used, DO NOT tie the pad to ground.

PIN FUNCTIONS



LT1993-2

13Rev B


+

–14

–INA

5

+OUT

19932 BD3VCCA

10VCCB

1VCCC

11ENABLE

13

–INB

12pFVCCA

A

VEEA

VEEA

200Ω

200Ω

200Ω

200Ω

25Ω

200Ω

6

+OUTFILTERED

–

+16

+INA

8

–OUT

15

+INB

VCCB

B

VEEB

VEEB

200Ω

200Ω

25Ω

200Ω

12pF

12pF

7

–OUTFILTERED

12VEEC

9VEEB

4VEEA

+

–VEEC

C

VCCC

2

VOCM

BIAS

BLOCK DIAGRAM



LT1993-2

14Rev B


Circuit Description

The LT1993-2 is a low-noise, low-distortion differential amplifier/ADC driver with:

• DC to 800MHz –3dB bandwidth

• Fixed gain of 2V/V (6dB) independent of RLOAD

• 200 differential input impedance

• Low output impedance

• Built-in, user adjustable output filtering

• Requires minimal support circuitry

Referring to the block diagram, the LT1993-2 uses a closed-loop topology which incorporates 3 internal ampli-fiers. Two of the amplifiers (A and B) are identical and drive the differential outputs. The third amplifier (C) is used to set the output common mode voltage. Gain and input impedance are set by the 200 resistors in the internal feedback network. Output impedance is low, determined by the inherent output impedance of amplifiers A and B, and further reduced by internal feedback.

The LT1993-2 also includes built-in single-pole output filtering. The user has the choice of using the unfiltered outputs, the filtered outputs (175MHz –3dB lowpass), or modifying the filtered outputs to alter frequency response by adding additional components. Many lowpass and bandpass filters are easily implemented with just one or two additional components.

The LT1993-2 has been designed to minimize the need for external support components such as transformers or AC-coupling capacitors. As an ADC driver, the LT1993-2 requires no external components except for power-supply bypass capacitors. This allows DC-coupled operation for applications that have frequency ranges including DC. At the outputs, the common mode voltage is set via the VOCM pin, allowing the LT1993-2 to drive ADCs directly. No out-put AC-coupling capacitors or transformers are needed. At the inputs, signals can be differential or single-ended with virtually no difference in performance. Furthermore, DC levels at the inputs can be set independently of the output common mode voltage. These input characteristics often eliminate the need for an input transformer and/or AC-coupling capacitors.

Input Impedance and Matching Networks

Because of the internal feedback network, calculation of the LT1993-2’s input impedance is not straightforward from examination of the block diagram. Furthermore, the input impedance when driven differentially is different than when driven single-ended. When driven differentially, the LT1993-2’s input impedance is 200 (differential); when driven single-ended, the input impedance is 133 .

For single-ended 50 applications, an 80.6 shunt match-ing resistor to ground will result in the proper input termi-nation (Figure 1). For differential inputs there are several termination options. If the input source is 50 differen-tial, then input matching can be accomplished by either a 67 shunt resistor across the inputs (Figure 3), or a 33 shunt resistor on each of the inputs to ground (Figure 2). If additional AC gain is desired, a 1:4 impedance ratio transformer (like the Mini-Circuits TCM4-19) can also be used to better match impedances and to provide an addi-tional 6dB of gain (Figure 4). With a 1:4 impedance ratio transformer, ideal matching impedance at the transformer output is 200 , so no termination resistors are required to match the LT1993-2’s 200 input impedance.

19932 F01

IF IN

0.1µFLT1993-2

–INA

–INB–OUT

+OUT

8

5

+INB

+INA

14

13

15

80.6ΩZIN = 50ΩSINGLE-ENDED

16

Figure 1. Input Termination for Single-Ended 50 Input Impedance

Figure 2. Input Termination for Differential 50 Input Impedance

19932 F02

IF IN–

IF IN+

LT1993-2

–INA

–INB–OUT

+OUT

8

5+INB

+INA

14

13

15

33Ω

ZIN = 50ΩDIFFERENTIAL

16

33Ω

APPLICATIONS INFORMATION



LT1993-2

15Rev B


Single-Ended to Differential Operation

The LT1993-2’s performance with single-ended inputs is comparable to its performance with differential inputs. This excellent single-ended performance is largely due to the internal topology of the LT1993-2. Referring to the block diagram, if the +INA and +INB pins are driven with a single-ended signal (while –INA and –INB are tied to AC ground), then the +OUT and –OUT pins are driven differ-entially without any voltage swing needed from amplifier C. Single-ended to differential conversion using more conventional topologies suffers from performance lim-itations due to the common mode amplifier.

Driving ADCs

The LT1993-2 has been specifically designed to inter-face directly with high speed Analog to Digital Converters (ADCs). In general, these ADCs have differential inputs, with an input impedance of 1k or higher. In addition, there is generally some form of lowpass or bandpass filter-ing just prior to the ADC to limit input noise at the ADC, thereby improving system signal to noise ratio. Both the unfiltered and filtered outputs of the LT1993-2 can

easily drive the high impedance inputs of these differ-ential ADCs. If the filtered outputs are used, then cutoff frequency and the type of filter can be tailored for the specific application if needed.

Wideband Applications (Using the +OUT and –OUT Pins)

In applications where the full bandwidth of the LT1993-2 is desired, the unfiltered output pins (+OUT and –OUT) should be used. They have a low output impedance; there-fore, gain is unaffected by output load. Capacitance in excess of 5pF placed directly on the unfiltered outputs results in additional peaking and reduced performance. When driving an ADC directly, a small series resistance is recommended between the LT1993-2’s outputs and the ADC inputs (Figure 5). This resistance helps eliminate any resonances associated with bond wire inductances of either the ADC inputs or the LT1993-2’s outputs. A value between 10 and 25 gives excellent results.

Figure 3. Alternate Input Termination for Differential 50 Input Impedance

Figure 4. Input Termination for Differential 50 Input Impedance with 6dB Additional Gain

19932 F02

IF IN–

IF IN+

LT1993-2

–INA

–INB–OUT

+OUT

8

5+INB

+INA

14

13

15


16

67Ω

19932 F04

0.1µFLT1993-2

–INA

–INB–OUT

+OUT

8

5

+INB

+INA

14

13

15


1:4 TRANSFORMER(MINI-CIRCUITS TCM4-19)

16

19932 F05

LT1993-2

–OUT

+OUT

8

5

10Ω TO 25Ω

10Ω TO 25Ω

ADC

Figure 5. Adding Small Series R at LT1993-2 Output

Filtered Applications (Using the +OUTFILTERED and –OUTFILTERED Pins)

Filtering at the output of the LT1993-2 is often desired to provide either anti-aliasing or improved signal to noise ratio. To simplify this filtering, the LT1993-2 includes an additional pair of differential outputs (+OUTFILTERED and –OUTFILTERED) which incorporate an internal low-pass filter network with a –3dB bandwidth of 175MHz (Figure 6). These pins each have an output impedance of 25 . Internal capacitances are 12pF to VEE on each filtered output, plus an additional 12pF capacitor con-nected differentially between the two filtered outputs. This resistor/capacitor combination creates filtered outputs




LT1993-2

16Rev B


that look like a series 25 resistor with a 36pF capacitor shunting each filtered output to AC ground, giving a –3dB bandwidth of 175MHz.

it will appear at each filtered output as a single-ended capacitance of twice the value. To halve the filter band-width, for example, two 36pF capacitors could be added (one from each filtered output to ground). Alternatively one 18pF capacitor could be added between the filtered outputs, again halving the filter bandwidth. Combinations of capacitors could be used as well; a three capacitor solution of 12pF from each filtered output to ground plus a 12pF capacitor between the filtered outputs would also halve the filter bandwidth (Figure 8).

The filter cutoff frequency is easily modified with just a few external components. To increase the cutoff frequency, simply add 2 equal value resistors, one between +OUT and +OUTFILTERED and the other between –OUT and –OUTFILTERED (Figure 7). These resistors are in parallel with the internal 25 resistor, lowering the overall resis-tance and increasing filter bandwidth. To double the filter bandwidth, for example, add two external 25 resistors to lower the series resistance to 12.5 . The 36pF of capac-itance remains unchanged, so filter bandwidth doubles.

Figure 6. LT1993-2 Internal Filter Topology –3dB BW ≈175MHz

Figure 7. LT1993-2 Internal Filter Topology Modified for 2x Filter Bandwidth (2 External Resistors)

Bandpass filtering is also easily implemented with just a few external components. An additional 120pF and 39nH, each added differentially between +OUTFILTERED and –OUTFILTERED creates a bandpass filter with a 71MHz center frequency, –3dB points of 55MHz and 87MHz, and 1.6dB of insertion loss (Figure 9).

Figure 8. LT1993-2 Internal Filter Topology Modified for 1/2x Filter Bandwidth (3 External Capacitors)

19932 F06

25Ω

VEE

VEE

12pF

LT1993-2–OUT

+OUT

25Ω

12pF

12pF

–OUTFILTERED

+OUTFILTERED

8

7

6

5

FILTERED OUTPUT(175MHz)

VEE

VEE

19932 F07

25Ω

25Ω

12pF

LT1993-2–OUT

+OUT

25Ω

25Ω

12pF

12pF

–OUTFILTERED

FILTERED OUTPUT(350MHz)

+OUTFILTERED

8

7

6

5

To decrease filter bandwidth, add two external capacitors, one from +OUTFILTERED to ground, and the other from –OUTFILTERED to ground. A single differential capacitor connected between +OUTFILTERED and –OUTFILTERED can also be used, but since it is being driven differentially

VEE

VEE

19932 F08

25Ω

12pF

LT1993-2–OUT

+OUT

25Ω

12pF

12pF

12pF

12pF

12pF

–OUTFILTERED

+OUTFILTERED

8

7

6

5

FILTERED OUTPUT(87.5MHz)

Figure 9. LT1993-2 Output Filter Topology Modified for Bandpass Filtering (1 External Inductor, 1 External Capacitor)

VEE

VEE

19932 F09

25Ω

12pF

LT1993-2–OUT

+OUT

25Ω

12pF

12pF

120pF39nH

–OUTFILTERED

+OUTFILTERED

8

7

6

5

FILTERED OUTPUT(71MHz BANDPASS,–3dB @ 55MHz/87MHz)




LT1993-2

17Rev B


Output Common Mode Adjustment

The LT1993-2’s output common mode voltage is set by the VOCM pin. It is a high-impedance input, capable of setting the output common mode voltage anywhere in a range from 1.1V to 3.6V. Bandwidth of the VOCM pin is typically 300MHz, so for applications where the VOCM pin is tied to a DC bias voltage, a 0.1µF capacitor at this pin is recommended. For best distortion performance, the voltage at the VOCM pin should be between 1.8V and 2.6V.

When interfacing with most ADCs, there is generally a VOCM output pin that is at about half of the supply voltage of the ADC. For 5V ADCs such as the LTC17XX family, this VOCM output pin should be connected directly (with the addition of a 0.1µF capacitor) to the input VOCM pin of the LT1993-2. For 3V ADCs such as the LTC22XX fami-lies, the LT1993-2 will function properly using the 1.65V from the ADC’s VCM reference pin, but improved Spurious Free Dynamic Range (SFDR) and distortion performance can be achieved by level-shifting the LTC22XX’s VCM ref-erence voltage up to at least 1.8V. This can be accom-plished as shown in Figure 10 by using a resistor divider between the LTC22XX’s VCM output pin and VCC and then bypassing the LT1993-2’s VOCM pin with a 0.1µF capaci-tor. For a common mode voltage above 1.9V, AC coupling capacitors are recommended between the LT1993-2 and LTC22XX ADCs because of the input voltage range con-straints of the ADC.

Large Output Voltage Swings

The LT1993-2 has been designed to provide the 3.2VP-Poutput swing needed by the LTC1748 family of 14-bit low-noise ADCs. This additional output swing improves system SNR by up to 4dB. Typical performance curves and AC specifications have been included for these applications.

Input Bias Voltage and Bias Current

The input pins of the LT1993-2 are internally biased to the voltage applied to the VOCM pin. No external biasing resistors are needed, even for AC-coupled operation. The input bias current is determined by the voltage difference between the input common mode voltage and the VOCM pin (which sets the output common mode voltage). At both the positive and negative inputs, any voltage differ-ence is imposed across 200 , generating an input bias current. For example, if the inputs are tied to 2.5V with the VOCM pin at 2.2V, then a total input bias current of 1.5mA will flow into the LT1993-2’s +INA and +INB pins. Furthermore, an additional input bias current totaling 1.5mA will flow into the –INA and –INB inputs.

VOCM and Output Voltages for Proper Operation

The electrical tables suggest 1.3V VOCM minimum to ensure proper operation over temperature. The electrical tables also guarantee VSWINGMIN to be 0.5V over tem-perature. It would appear that operation is okay so long as the low output voltage on either pin is 0.5V or higher, and VOCM is 1.3V or higher. The values in the table are correct. However, the VSWINGMIN value is tested with the input difference overdriven. Overdriven input is a static condition during which the overdrive forces transistors well into their saturated state.

Amplifier Inputs

Dynamically, the situation is more complicated. Referring to the Block Diagram, an NPN differential pair with tail current forms the input stage of both amplifiers A and B. Appropriate biasing of these inputs requires 1.3V, or in other words the same value as the minimum VOCM.

19932 F10

IF IN

LT1993-2

–INA

–INBVOCM

231

6

7

1

2+INB

+INA

14

13

15

80.6Ω

16

10Ω

10Ω LTC22xx0.1µF

0.1µF

+OUTFILTERED

–OUTFILTERED

AIN+

AIN–

4.02k

11k

1.9V

1.5V

3V

VCM

Figure 10. Level Shifting 3V ADC VCM Voltage for Improved SFDR




LT1993-2

18Rev B


Specifically, the minimum voltage at amplifiers A and B should be 1.3V.

The calculation for the voltage at the A and B inputs is as follows.

Amp A CMINA •RR1 RR

VOCM •1

1 RR

Amp B CM–INB •RR

1 RRVOCM •

11 RR

RRRFRG

Gain2

Amplifier Outputs

The Amplifiers A and B output from the collectors of pull-down NPNs in combination with high-side cur-rent boosting NPN emitters. The pull-down NPN circuit includes degeneration resistors. Fully linear, non-satu-rated operation requires that the NPN collector voltage be 0.8V or higher. As a result, operation without compro-mised stability must be to 0.8V output voltages or higher. This requirement is at variance with the electrical table VSWINGMIN; again, VSWINGMIN uses input overdrive in a static condition, whereas full-speed operation demands non-saturated, full Beta transistors.

The following table shows examples of operating condi-tion voltages. The boldface numbers indicate examples that do one or more of the following:

• Amplifier input voltage is at the minimum suggested as noted above.

• Output voltage low level is 0.8V as noted above.

• Output voltage high level is at 3.5V (data sheet VSWINGMAX).

Table 1.

Gain 2 2

VOCM 1.3 2.5

–INA/–INB 1.3 3

+INA/+INB 1.8 2

VINDIFF 0.5 –1

RR 1 1

Amp CM A 1.55 2.25

Amp CM B 1.3 2.75

+VOUT 1.8 1.5

–VOUT 0.8 3.5

Application (Demo) Boards

The DC800A Demo Board has been created for stand-alone evaluation of the LT1993-2 with either single-ended or differential input and output signals. As shown, it accepts a single-ended input and produces a single-ended output so that the LT1993-2 can be evaluated using stan-dard laboratory test equipment. For more information on this Demo Board, please refer to the Demo Board section of this data sheet.

There are also additional demo boards available that combine the LT1993-2 with a variety of different Linear Technology ADCs. Please contact the factory for more information on these demo boards.




LT1993-2

19Rev B


TYPICAL APPLICATION



LT1993-2

20Rev B


3.00 ±0.10(4 SIDES)

RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS

1.45 ±0.05(4 SIDES)

NOTE:1. DRAWING CONFORMS TO JEDEC PACKAGE OUTLINE MO-220 VARIATION (WEED-2)2. DRAWING NOT TO SCALE3. ALL DIMENSIONS ARE IN MILLIMETERS4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE5. EXPOSED PAD SHALL BE SOLDER PLATED6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE TOP AND BOTTOM OF PACKAGE

PIN 1TOP MARK(NOTE 6)

0.40 ±0.10

BOTTOM VIEW—EXPOSED PAD

1.45 ± 0.10(4-SIDES)

0.75 ±0.05 R = 0.115TYP

0.25 ±0.05

1

PIN 1 NOTCH R = 0.20 TYPOR 0.25 × 45° CHAMFER

15 16

2

0.50 BSC

0.200 REF

2.10 ±0.053.50 ±0.05

0.70 ±0.05

0.00 – 0.05

(UD16) QFN 0904

0.25 ±0.050.50 BSC

PACKAGE OUTLINE

UD Package16-Lead Plastic QFN (3mm × 3mm)

(Reference LTC DWG # 05-08-1691 Rev Ø)

PACKAGE DESCRIPTION



LT1993-2

21Rev B


Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

REVISION HISTORYREV DATE DESCRIPTION PAGE NUMBER

B 09/18 Adding operating description for VOCM and output. 17, 18

(Revision history begins at Rev B)



LT1993-2

22Rev B

For more information www.analog.com ANALOG DEVICES, INC. 2005-2018

D17142-0-9/18(B)www.analog.com

PART NUMBER DESCRIPTION COMMENTS

LT1993-4 900MHz Differential Amplifier/ADC Driver AV = 4V/V, NF = 14.5dB, OIP3 = 40dBm at 70MHz

LT1993-10 700MHz Differential Amplifier/ADC Driver AV = 10V/V, NF = 12.7dB, OIP3 = 40dBm at 70MHz

LT5514 Ultralow Distortion IF Amplifier/ADC Driver Digitally Controlled Gain Output IP3 47dBm at 100MHz

LT6600-2.5 Very Low Noise Differential Amplifier and 2.5MHz Lowpass Filter

86dB S/N with 3V Supply, SO-8 Package

LT6600-5 Very Low Noise Differential Amplifier and 5MHz Lowpass Filter






•• C20, 0.1µF

••

VCC

C144.7µF

C151µF

• •

J6TEST IN

J7TEST OUT

J3VOCM

• •

3

1

241

5

VCC

VCCC10

0.01µFC9

1000pF

19932 TA02

13

14

15

16

11 10 912

VCC

VCCGND

SW1

2 3 41

8

7

6

5

R8[1]

R1024.9Ω

R60Ω

R180Ω

R50Ω

R7[1]

R924.9Ω

R1275Ω

R160Ω

R15[1] +6dB

R1175Ω

+6dB

C180.01µF

NOTES: UNLESS OTHERWISE SPECIFIED,[1] DO NOT STUFF.

C40.1µF

C30.1µF

C20.1µF

C10.1µF

T11:4 Z-RATIO

MINI-CIRCUITSTCM 4-19



T21:4 Z-RATIO

C171000pF

C130.01µF

C121000pF

R22[1]

R21[1]

C70.01µF

–INA

–INB

+INB

+INA

VEEC VCCB VEEB

VOCM VCCAVCCC VEEA

–OUTFILTERED

–OUT

+OUTFILTERED

+OUT

ENABLE

TP1ENABLE

R140Ω

J4–OUT

J5+OUT

R13[1]

5

4

2

2

1 3

3

R4[1]

R3[1]

R20Ω

J1–IN

J2+IN

R11Ω

0dB

R2011k

R1914k

R170Ω

VCCVCC

TP2VCC

C50.1µF

C60.1µF

T44:1

5

43

1

2

TP3GND

LT1993-2

1

2

1

2

1

2

1

21

21

C210.1µF

21

1T31:45

4

2

3

C19, 0.1µF

21 21

21

21

2

1

2

1

2

1

2

1

2

1

C8[1]

L1[1]

2

1

C11[1]

1

2

2

1

1

1

C220.1µF

2

1

C16[1]

1

2

21

21

+10.8dB

0dBMINI-

CIRCUITSTCM 4-19

Demo Circuit DC800A Schematic(AC Test Circuit)

RELATED PARTS

TYPICAL APPLICATION






http://www.analog.com/LT5514?doc=LT1993-2.pdf

http://www.analog.com/LT6600-2.5?doc=LT1993-2.pdf




Documents

LT1993-2 Noise Differential Amplifier/ ADC Driver (AV = 2V