LT1203/LT1205 - 150MHz Video Multiplexers

1

LT1203/LT1205

150MHz Video Multiplexers

–3dB Bandwidth: 150MHz 0.1dB Gain Flatness: 30MHz Channel-to-Channel Switching Time: 25ns Turn-On/Turn-Off Time: 25ns High Slew Rate: 300V/µs Disabled Output Impedance: 10MΩ 50mV Switching Transient Channel Separation at 10MHz: >90dB Differential Gain: 0.02% Differential Phase: 0.02° Wide Supply Range: ±5V to ±15V Output Short-Circuit Protected Push-Pull Output

SFEATURE D

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ESCRIPTIOThe LT1203 is a wideband 2-input video multiplexerdesigned for pixel switching and broadcast quality rout-ing. The LT1205 is a dual version that is configured as a4-input, 2-output multiplexer.

These multiplexers act as SPDT video switches with 10nstransition times at toggle rates up to 30MHz. The – 3dBbandwidth is 150MHz and 0.1dB gain flatness is 30MHz.Many parts can be tied together at their outputs by usingthe enable feature which reduces the power dissipationand raises the output impedance to 10MΩ. Output capaci-tance when disabled is only 3pF and the LT1203 peaks lessthan 3dB into a 50pF load. Channel crosstalk and disableisolation are greater than 90dB up to 10MHz. An on-chipbuffer interfaces to fast TTL or CMOS logic. Switchingtransients are only 50mV with a 25ns duration. TheLT1203 and LT1205 outputs are protected against shortsto ground.

The LT1203/LT1205 are manufactured using LinearTechnology’s proprietary complementary bipolar process.The LT1203 is available in both the 8-lead PDIP and SOpackage while the LT1205 is available in the 16-leadnarrow body SO package.

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PPLICATITYPICAL

+1

+1

+1

+1

LT1205

LOGIC

V+LOGIC

VOUT RED

VOUT GREEN

VOUT BLUE

LT1203 • TA01

EN

RED 1

CHANNEL SELECT

RED 2

GREEN 1

GREEN 2

BLUE 1

BLUE 2

V–

V–

V–

EN

V+

+1

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LT1203

LOGIC

EN

V+

High Speed RGB MUX Large-Signal Response

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PPLICATI Broadcast Quality Video Multiplexing Picture-in-Picture Switching HDTV Computer Graphics Title Generation Video Crosspoint Matrices Video Routers

2

LT1203/LT1205

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ARBSOLUTE XI TI SSupply Voltage ...................................................... ±18VSignal Input Current (Note 1) ............................ ±20mALogic Input Current (Note 2).............................. ±50mAOutput Short-Circuit Duration (Note 3) ........ ContinuousSpecified Temperature Range (Note 4) ....... 0°C to 70°C

Operating Temperature Range ............... – 40°C to 85°CStorage Temperature Range ................ –65°C to 150°CJunction Temperature (Note 5) ............................ 150°CLead Temperature (Soldering, 10 sec) ................. 300°C

ORDER PARTNUMBER

LT1203CN8*LT1203CS8*

S8 PART MARKING

1203

*See Note 4Consult factory for Industrial and Military grade parts.

ORDER PARTNUMBER

LT1205CS*

TJMAX = 150°C, θJA = 100°C/W

TOP VIEW

S PACKAGE 16-LEAD PLASTIC SOIC

1

2

3

4

5

6

7

8

16

15

14

13

12

11

10

9

VINO

GND

VIN1

V –

VIN2

GND

VIN3

V–

V+

VOUT1

EN1

LOGIC 1

V+

VOUT2

EN2

LOGIC 2

1

2

3

4

8

7

6

5

TOP VIEW

VIN0

GND

VIN1

V–

V+

VOUT

EN

LOGIC

N8 PACKAGE 8-LEAD PLASTIC DIP

S8 PACKAGE 8-LEAD PLASTIC SOIC

TJMAX = 150°C, θJA = 100°C/W (N)TJMAX = 150°C, θJA = 150°C/W (S)

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PACKAGE/ORDER I FOR ATIO

SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS

VOS Output Offset Voltage Any Input Selected 10 30 mV

Output Offset Matching Between Outputs 0.3 5 mV

∆VOS/∆T Output Offset Drift 40 µV/°C

IIN Input Current 0.6 5 µA

RIN Input Resistance VS = ±5V, VIN = ±2V 1 5 MΩVS = ±15V, VIN = ±2V 2 5 MΩ

CIN Input Capacitance Input Selected 2.6 pFInput Deselected 2.6 pF

COUT Disabled Output Capacitance EN Pin Voltage ≤ 0.8V 2.8 pF

VIN Input Voltage (Note 1) VS = ±5V ±2 ±2.8 VVS = ±15V ±2 ±3.0 V

PSRR Power Supply Rejection Ratio VS = ±4.5 to ±15V 60 70 dB

Gain Error VS = ±15V, VIN = ±2V, RL = 1k 2 4 %VS = ±15V, VIN = ±2V, RL = 400Ω 6 10 %VS = ±5V, VIN = ±2V, RL = 1k 3 6 %

ELECTRICAL C CHARA TERISTICS0°C ≤ TA ≤ 70°C, ±5V ≤ VS ≤ ±15V, RL = 1k, pulse tested, EN pin open or high, unless otherwise noted.

3

LT1203/LT1205


SR Slew Rate (Note 6) 180 300 V/µs

FPBW Full Power Bandwidth (Note 7) VOUT = 2VP-P 28.6 47.7 MHz

tSEL Channel-to-Channel Select Time (Note 8) RL = 10k 25 35 ns

Enable Time (Note 9) RL = 1k 25 35 ns

Disable Time (Note 9) RL = 1k 20 35 ns

tr, tf Small-Signal Rise and Fall Time VOUT = 250mVP-P, 10% to 90% 2.6 ns

Propagation Delay VOUT = 250mVP-P 2.9 ns

Overshoot VOUT = 250mVP-P 5 %

Crosstalk (Note 10) RS = 10Ω 90 dB

Chip Disabled Crosstalk (Note 10) RL = 10Ω, EN Pin Voltage ≤ 0.8V 110 dB

Channel Select Output Transient All VIN = 0V 50 mVP-P

tS Settling Time 1%, VOUT = 1V 30 ns

Differential Gain (Note 11) VS = ±15V, RL = 10k 0.02 %

Differential Phase (Note 11) VS = ±15V, RL = 10k 0.02 DEG

Insertion Loss RL = 100k, CL = 30pF, VOUT = 500mVP-P, f = 1MHz 0.02 dB

ELECTRICAL C CHARA TERISTICS0°C ≤ TA ≤ 70°C, ±5V ≤ VS ≤ ±15V, RL = 1k, pulse tested, EN pin open or high, unless otherwise noted.


VOUT Output Voltage VS = ±15V, VIN = ±2V, RL = 400Ω ±1.8 ±1.90 VVS = ±5V, VIN = ±2V, RL = 1k ±1.8 ±1.94 V

Overload Swing (Note 1) VS = ±15V, VIN = ±5V ±0.9 ±1.5 VVS = ±5V, VIN = ±5V ±0.9 ±1.5 V

IOUT Output Current VS = ±15V, VIN = ±2V, RL = 400Ω ±4.5 ±4.75 mAVS = ±5V, VIN = ±2V, RL = 1k ±1.8 ±2.00 mA

ROUT Enabled Output Resistance EN Pin Voltage = 2V, VOUT = ±2V, VS = ±15V 20 42 ΩDisabled Output Resistance EN Pin Voltage = 0.5V, VOUT = ±2V, VS = ±15V 1 10 MΩ

IS Supply Current (LT1203) EN Pin Voltage = 2V 10.0 14 mAEN Pin Voltage = 0.5V 5.8 8 mA

Supply Current (LT1205) EN Pin Voltage = 2V 20.0 28 mAEN Pin Voltage = 0.5V 11.6 16 mA

VIL Logic Low Logic Pin 0.8 V

VIH Logic High Logic Pin 2 V

Enable Low EN Pin 0.5 V

Enable High EN Pin 2 V

IIL Digital Input Current Low LT1203 Pin 5, LT1205 Pins 9, 13 = 0V 1.5 6.5 µA

IIH Digital Input Current High LT1203 Pin 5, LT1205 Pins 9, 13 = 5V 10 200 nA

IEN Enable Pin Current LT1203 Pin 6, LT1205 Pins 10, 14 20 80 µA

C CHARA TERISTICSAC TA = 25°C, VS = ±15V, RL = 1k, EN pin open or high, unless otherwise noted.

The denotes specifications which apply over the specifiedtemperature range.Note 1: The analog inputs (pins 1, 3 for the LT1203, pins 1, 3, 5, 7 for theLT1205) are protected against ESD and overvoltage with internal SCRs.

For inputs ≤±2.8V the SCR will not fire. Voltages above 2.8V will fire theSCR and the DC current should be limited to 20mA. To turn off the SCRthe pin voltage must be reduced to less than 1V or the current reduced toless than 600µA.

4

LT1203/LT1205

Note 2: The digital inputs (pins 5, 6 for the LT1203, pins 9, 10, 13, 14 forthe LT1205) are protected against ESD and overvoltage with internalSCRs. For inputs ≤±6V the SCR will not fire. Voltages above 6V will firethe SCR and the DC current should be limited to 50mA. To turn off theSCR the pin voltage must be reduced to less than 2V or the currentreduced to less than 10mA.Note 3: A heat sink may be required depending on the power supplyvoltage.Note 4: Commercial grade parts are designed to operate over thetemperature range of –40°C to 85°C but are neither tested nor guaranteedbeyond 0°C to 70°C. Industrial grade parts specified and tested over–40°C to 85°C are available on special request, consult factory.Note 5: TJ is calculated from the ambient temperature TA and the powerdissipation PD according to the following formulas:

LT1203CN8: TJ = TA + (PD × 100°C/W)LT1203CS8: TJ = TA + (PD × 150°C/W)LT1205CS: TJ = TA + (PD × 100°C/W)

Note 6: Slew rate is measured at ±2.0V on a ±2.5V output signal whileoperating on ±15V supplies, RL = 1k.Note 7: Full power bandwidth is calculated from the slew ratemeasurement:

FPBW = SR/2πVPEAK

Note 8: For the LT1203, apply 1VDC to pin 1 and measure the time for theappearance of 0.5V at pin 7 when pin 5 goes from 5V to 0V. Apply 1VDC

to pin 1 and measure the time for disappearance of 0.5V at pin 7 whenpin 5 goes from 0V to 5V. Apply 1VDC to pin 3 and measure the time forthe appearance of 0.5V at pin 7 when pin 5 goes from 0V to 5V. Apply1VDC to pin 3 and measure the time for disappearance of 0.5V at pin 7when pin 5 goes from 5V to 0V. For the LT1205 the same test isperformed on both MUXs.Note 9: For the LT1203, apply 1VDC to pin 1 and measure the time for theappearance of 0.5V at pin 7 when pin 6 goes from 0V to 5V. Pin 5 voltage= 0V. Apply 1VDC to pin 1 and measure the time for disappearance of 0.2Vat pin 7 when pin 6 goes from 5V to 0V. Pin 5 voltage = 0V. Apply 1VDCto pin 3 and measure the time for the appearance of 0.5V at pin 7 whenpin 6 goes from 0V to 5V. Pin 5 voltage = 5V. Apply 1VDC to pin 3 andmeasure the time for disappearance of 0.2V at pin 7 when pin 5 goes from5V to 0V. Pin 5 voltage = 5V. For the LT1205 the same test is performedon both MUXs.Note 10: VIN = 0dBm (0.223VRMS) at 10MHz on one input with the otherinput selected and RS = 10Ω. For disable crosstalk all inputs are drivensimultaneously. In disable the output impedance is very high and signalcouples across the package; the load impedance determines the crosstalk.Note 11: Differential gain and phase are measured using a TektronixTSG120 YC/NTSC signal generator and a Tektronix 1780R videomeasurement set. The resolution of this equipment is 0.1% and 0.1°.Ten identical MUXs were cascaded giving an effective resolution of0.01% and 0.01°.

TYPICAL PERFOR A CE CHARACTERISTICSW U

LOGIC EN VOUT

0 1 VIN0

1 1 VIN1

0 0* HIGH ZOUT

1 0 HIGH ZOUT

*Must be ≤0.5V

TRUTH TABLE

FREQUENCY (MHz)1

–1GAIN

(dB)

PHASE (DEG)

0

1

2

3

10 100 1000

LT1203/05 • TPC02

–2

–3

–4

–5

4

5

–120

–100

–80

–60

–40

–140

–160

–180

–200

–20

0VS = ±15V TA = 25°C RL = ∞

FREQUENCY (MHz)1

–1GAIN

(dB)

PHASE (DEG)

0

1

2

3

10 100 1000

LT1203/05 • TPC01

–2

–3

–4

–5

4

5

–120

–100

–80

–60

–40

–140

–160

–180

–200

–20

0VS = ±5V TA = 25°C RL = ∞

±5V Frequency Response ±15V Frequency Response

5

LT1203/LT1205


Frequency Responsewith Capacitive Loads

Disable Rejectionvs Frequency

Crosstalk Rejectionvs Frequency

Output Impedance (Enabled)vs Frequency

Crosstalk Rejectionvs Frequency

SUPPLY VOLTAGE (±V)0

FREQ

UENC

Y (M

Hz)

160

180

18

LT1203/05 • TPC03

140

1202 6 8 10 12 14 164

200TA = 25°C RL = 10k PEAKING ≤ 0.5dB

FREQUENCY (MHz)1

–5

GAIN

(dB)

–3

–1

1

3

10 100

LT1203/05 • TPC04

–4

–2

0

2

4

5VS = ±15V TA = 25°C RL = ∞

CL = 100pF

CL = 50pF

CL = 20pF

CL = 10pF

FREQUENCY (MHz)1

–110

CROS

STAL

K RE

JECT

ION

(dB)

–100

–90

–80

–70

–30

10 100

LT1203/05 • TPC05

–60

–50

–40VS = ±15V TA = 25°C RL = ∞

RS = 0Ω

RS = 10Ω

RS = 37.5Ω

RS = 75Ω

FREQUENCY (MHz)1

–110

CROS

STAL

K RE

JECT

ION

(dB)

–100

–90

–80

–70

–30

10 100

LT1203/05 • TPC06

–60

–50

–40TA = 25°C RS = 0Ω RL = ∞

VS = ±5V VS = ±15V

FREQUENCY (MHz)1

–70

–80

–90

–100

–110

–120

DISA

BLE

REJE

CTIO

N (d

B)

– 60

–50

–40

–30

10 100

LT1203/05 • TPC07

–20VS = ±15V TA = 25°C

RL = ∞

RL = 1k

RL = 100Ω

RL = 10Ω

FREQUENCY (MHz)

0

30

20

10

70

60

50

40

LT1203/05 • TPC08

POW

ER S

UPPL

Y RE

JECT

ION

RATI

O (d

B)

1 10010

VS = ±15V TA = 25°C RL = ∞ RS = 0Ω–PSRR

+PSRR

Supply Currentvs Supply Voltage (Enabled)

Supply Currentvs Supply Voltage (Disabled)

FREQUENCY (Hz)

20

OUTP

UT IM

PEDA

NCE

(Ω)

40

30

60

80

100

10k 1M 100M10M

LT1203/05 • TPC09

10100k

VS = ±15V TA = 25°C


7.6

SUPP

LY C

URRE

NT (m

A)

8.4

9.6

4 8 10 18

LT1203/05 • TPC10

8.0

9.2

8.8

2 6 12 14 16

LT1203 RL = ∞

125° 25°

–55°


4.4

SUPP

LY C

URRE

NT (m

A)

4.8

4 8 10 18

LT1203/05 • TPC11

4.6

5.2

5.0

2 6 12 14 16

125°

25°

LT1203 RL = ∞

–55°

– 3dB Bandwidthvs Supply Voltage

Power Supply Rejection Ratiovs Frequency

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LT1203/LT1205


TEMPERATURE (°C)–50

5

6

8

25 75

LT1203/05 • TPC12

4

3

–25 0 50 100 125

2

1

7

GAIN

ERR

OR (%

)

VS = ±15V VIN = –2V TO 2V

RL = 400Ω

RL = 1k

Gain Error vs Temperature

INPUT VOLTAGE (V)–4

INPU

T BI

AS C

URRE

NT (µ

A)

0.4

0.6

0.8

4

LT1203/05 • TPC13

0.2

0

–0.4–2 0 2

–0.2

1.2

1.0

–3 –1 1 3

125°C

25°C

–55°C

VS = ±15V RL = ∞

INPUT VOLTAGE (V)–5

OUTP

UT V

OLTA

GE (V

) 2

4

3

LT1203/05 • TPC14

0

–2

–4–3 –1 1 5

1

3

–1

–3

2–4 –2 0 4

VS = ±15V TA = 25°C RL = 1k

Output Voltage vs Input Voltage

Small-Signal Rise Time

RL = 1k

VIN0 to VIN1 Select TimeVIN1 to VIN0 Select Time

Settling Time to 1mV and 10mVvs Output Step

SETTLING TIME (ns)0

OUTP

UT S

TEP

(V)

1.0

2.0

400

LT1203/05 • TPC15

0

–1.0

–2.0100 200 300 500

0.5

1.5

–0.5

–1.5

10mV

10mV

1mV

1mV

VS = ±15V RL = 1k

LT1203/05 • TPC16

VS = ±15VRL = 10k

LT1203/05 • TPC17 LT1203/05 • TPC18VS = ±15VRL = 10k

LOGIC(PIN 5)

VOUT(PIN 7)

LOGIC(PIN 5)

VOUT(PIN 7)

Input Bias Current vs Input Voltage

VINO = 1VVIN1 = 0V

VINO = 1VVIN1 = 0V

7

LT1203/LT1205


Channel 1 Disable

VS = ±15VRL = 1k

LT1203/05 • TPC19 VS = ±15VRL = 1k

Channel 1 Enable

LT1203/05 • TPC20

Input Protection

The logic inputs have ESD protection (≥2kV) and short-ing them to 12V or 15V will cause excessive current toflow. Limit the current to less than 50mA when drivingthe logic above 6V. The analog inputs are protectedagainst ESD and overvoltage with internal SCRs. Forinputs ≥±2.8V the SCRs will fire and the DC currentshould be limited to 20mA.

Power Supplies

The LT1203/LT1205 will operate from ±5V (10V total) to±15V (30V total) and is specified over this range. Charac-teristics change very little over this voltage range. It is notnecessary to use equal value supplies however, the outputoffset voltage will change. The offset will change about300µV per volt of supply mismatch. The LT1203/LT1205have a very wide bandwidth yet are tolerant of powersupply bypassing. The power supplies should be by-passed with a 0.1µF or 0.01µF ceramic capacitor within 0.5inch of the part.

Circuit Layout

Use a ground plane to ensure a low impedance ground isavailable throughout the PCB layout. Separate the inputs

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LT1203 Channel-to-Channel Switching Transient

with ground plane to ensure high channel separation. Forminimum peaking, maximum bandwidth and maximumgain flatness sockets are not recommended because theycan add considerable stray inductance and capacitance. Ifa socket must be used, use a low profile, low capacitancesocket such as the SamTec ISO-308.

Switching Transients

The LT1203/LT1205 use input buffers to ensure switchingtransients do not couple to other video equipment sharingthe input line. Output switching transients are about50mVP-P with a 20ns duration and input transients are

OUTPUT50mV/DIV

INPUT20mV/DIV

LOGIC(PIN 5)

RS = 50Ω LT1203/05 • AI01

VINO = 1VVIN1 = 0V

VINO = 1VVIN1 = 0V

EN(PIN 6)

VOUT(PIN 7)

VOUT(PIN 7)

EN(PIN 6)

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LT1203/LT1205

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I FOR ATIOCMOS MUX Channel-to-Channel Switching Transient

OUTPUT1V/DIV

LT1203/05 • AI02RS = 50ΩNOTE: 50 TIMES LARGER THAN LT1203 TRANSIENT

LT1203/05 • AI03

OUTPUT(PIN 7)

CHANNEL 1 = 0VCHANNEL 2 = 2MHz SINEWAVE

LOGIC(PIN 5)

LT1203 Switching Inputs

only 10mVP-P. A photo of the switching transients from aCMOS MUX shows glitches to be 50 times larger than onthe LT1203. Also shown is the output of the LT1203switching on and off a 2MHz sinewave cleanly and withoutabnormalities.

Pixel Switching

The multiplexers are fabricated on LTC's ComplementaryBipolar Process to attain fast switching speed, high band-width, and a wide supply voltage range compatible withtraditional video systems. Channel-to-channel switchingtime and Enable time are both 25ns, therefore delay is thesame when switching between channels or between ICs.To demonstrate the switching speed of the LT1203/LT1205the RGB MUX of Figure 1 is used to switch RGB Worksta-tion inputs with a 22ns pixel width. Figure 2a is a photoshowing the Workstation output and RGB MUX output.The slight rise time degradation at the RGB MUX output isdue to the bandwidth of the LT1260 current feedbackamplifier used to drive the 75Ω cable. In Figure 2b, theLT1203 switches to an input at zero at the end of the firstpixel and removes the following pixels.

+11

2

3

4

5

6

7

8

16

15

14

13

1

2

3

4

8

7

6

5

12

116

15

14

13

12

11

10

9

2

3

4

5

6

7

8

LT1260

11

10

9

+1

+1

+1

LT1205

LT1203/05 • F01

+1

+1

LT1203

R4 75Ω

J4 GREEN 2

J7 LOGIC

R6 75Ω C1

0.1µF

C2 0.1µF

C3 4.7µF

C4 4.7µF

J6 BLUE 2

R8* 10k

R13 1.5k

R15 1.5k

R9* 10k

*OPTIONAL

R14 1.5k

R7* 10k

R5 75Ω

J5 BLUE 1

R3 75Ω

J3 GREEN 1

R2 75Ω

J2 RED 2

R1 75Ω

J1 RED 1

–

+

–

+

–

+

R12 1.5k

R10 1.5k

V+ V –

R11 1.5k

R

G

B

+ +

GND

J8 ENABLE

J9 RED

J10 GREEN

J11 BLUE

R16 75Ω

R17 75Ω

R18 75Ω

Figure 1. RGB MUX

INPUT1V/DIV

LOGICCONTROL

9

LT1203/LT1205

WORKSTATIONOUTPUT

LT1203/05 • F02a

Figure 2a. Workstation and RGB MUX Output

LT1203/05 • F02b

Figure 2b. RGB MUX Output Switched to GroundAfter One Pixel

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FREQUENCY (MHz)1

–2

GAIN

(dB)

–1

0

1

2

10 100 1000

LT1203/05 • F04

–3

–4

3

4

G

R, B

VS = ±15V RL = 150Ω RF = RG = 1.3k

Input Expansion

The output impedance of the LT1203/LT1205 is typically20Ω when enabled and 10MΩ when disabled or notselected. This high disabled output impedance allows theoutput of many LT1205s to be shorted together to formlarge crosspoint arrays. With their outputs shorted to-gether, shoot-through current is low because the “on”channel is disabled before the “off” channel is activated.

ENABLEIC #1

Timing and Supply Current Waveforms

ENABLEIC #2

VOUT1V/DIV

IS10mA/DIV

5V/DIV

5V/DIV

LT1203/05 • AI04

Four LT1205s are used in Figure 5 to form a 16-to-1multiplexer which is very space efficient and uses only sixSO packages. In this application 15 switches are turned offand only one is active. An attenuator is formed by the 15deselected switches and the active device which has an

Figure 4. RGB MUX Frequency Response ofDemonstration Board #041

RGB MUXOUTPUT

WORKSTATIONOUTPUT

RGB MUXOUTPUT

Demonstration Board

A Demonstration Board (#041) of the RGB MUX in Figure1 has been fabricated and its layout is shown in Figure 3.The small-signal bandwidth of the RGB MUX is set by thebandwidth of the LT1260. The stray capacitance of thesurface mount feedback resistors RF and RG restricts the–3dB bandwidth to about 95MHz. The bandwidth can beimproved by about 20% using the through-hole LT1260and components. A frequency response plot in Figure 4shows that the R, G, and B amplifiers have slightlydifferent frequency responses. The difference in the Gamplifier is due to different output trace routing tofeedback resistor R13.

10

LT1203/LT1205

( 4 0 8 ) 4 3 2 - 1 9 0 0 L T 1 2 0 3 / L T 1 2 0 5 F A S T S W I T C H I N G R G B M U L T I P L E X E R D E M O B O A R D

R9

R8C2C1

R15 C4

B

G

R

R1

R2

G1

G2

B1

B2

R14

R11U3

U1

U2

R10

041A

ENABLELOGIC

R16

R18

R17

C3

GNDV+V–

R13

R12

R7

R1

R2

R3

R4

R5

R6COPYWRITE '93 MADE IN USA

LT1205/03 • F03

Figure 3. Demo Board #041 Layout

11

LT1203/LT1205

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+1

+1

+1

+1U1

LT1205

16

9

10

11

12

13

14

15 C2 0.1µF

C7 0.1µF

1

R1 75Ω

C1 0.1µF

8

7

6

5

4

3

2

+1

+1

+1

+1U2

LT1205

16

9

10

11

12

13

14

15

1

8

7

6

5

4

3

2

1

5V

816

4

5

6

A

B

C

D

EN

3

2

15

7

2

3

7

4

6OUTPUT

OPTIONAL RX 10k

9

10

11

12

13

14A

G2A

G2B

G1

C

B

Y0

Y7

Y6

Y5

Y4

Y3

Y2

Y1

+1

+1

+1

+1U3

LT1205

16

9

10

11

12

13

14

15

1

8

7

6

5

4

3

2

+1

+1

+1

U4 LT1205

16

9

LT1203/05 • F05

10

11

12

13

14

15

1

8CH15

CH0

7

6

5

4

3

2

GND15V–15V

RF 1.6k

RG 1.6k

RS 75Ω

C5 4.7µF

+

C6 4.7µF+

–

+U6

LT1252

U5 74HCT238

R16 75Ω

C4 0.1µF

C3 0.1µF

+1

D X L L L L L L L L H H H H H H H H

C X L L L L H H H H L L L L H H H H

B X L L H H L L H H L L H H L L H H

A X L H L H L H L H L H L H L H L H

L H H H H H H H H H H H H H H H H

OFF CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 CH8 CH9 CH10 CH11 CH12 CH13 CH14 CH15

SELECTLOGIC

TRUTH TABLE

OUTPUTENABLE EN

Figure 5. 16-to-1 Multiplexer and Truth Table

12

LT1203/LT1205

output impedance of only 25Ω at 10MHz. This attenuatoris responsible for the outstanding All Hostile CrosstalkRejection of 90dB at 10MHz with 15 input signals.

Several suggestions to attain this high rejection include:

1. Mount the feedback resistors for the surface mountLT1252 on the back side of the PC board.

2. Keep the feedback trace (pin 3) of the LT1252 as shortas possible.

3. Route V + and V – for the LT1205s on the component(top) side and under the devices (between inputs andoutputs).

4. Use the backside of the PC board as a solid groundplane. Connect the LT1205 device grounds and by-pass capacitors grounds as vias to the backsideground plane.

U

SA

O

PPLICATI

WU U

I FOR ATIO

16-to-1 MUX, Switching LT1205 Enable Lines

1V

0V

0V

RF = RG = 1.6kRL = 100Ω

VIN4 = 0VVIN0 = 1V

LT1203/05 • AI05

16-to-1 Multiplexer All Hostile Crosstalk Rejection

16-to-1 MUX Response

FREQUENCY (MHz)1

GAIN

(dB)

–6

–4

–2

0

10 100

LT1203/05 • AI07

2VS = ±15V RL = 100Ω RF = RG = 1.6k

Each “off” switch has 2.8pF of output capacitance and 15“off” switches tied together represent a 48pF load to theone active switch. In this case the active device will peakabout 3dB at 50MHz. An attribute of current feedbackamplifiers is that the bandwidth can easily be adjusted bychanging the feedback resistors, and in this applicationthe LT1252’s bandwidth is reduced to about 60MHz using1.6k feedback resistors. This has the effect of reducing thepeaking in the MUX to 0.25dB and flattening the responseto 0.05dB at 30MHz.

4 × 4 Crosspoint

The compact high performance 4 × 4 crosspoint shown inFigure 6 uses four LT1205s to route any input to any or alloutputs. The complete crosspoint uses only six SO pack-ages and less than six square inches of PC board space.The LT1254 quad current feedback amplifier serves as acable driver with a gain of 2. A ±5V supply is used to ensurethat the maximum 150°C junction temperature of theLT1254 is not exceeded in the SO package. With thissupply voltage the crosspoint can operate at a 70°Cambient temperature and drive 2V (peak or DC) into adouble-terminated 75Ω video cable. The feedback resis-tors of these output amplifiers have been optimized forthis supply voltage. The –3dB bandwidth of the crosspointis over 100MHz with only 0.8dB of peaking. All HostileCrosstalk Rejection is 85dB at 10MHz when a shortedinput is routed to all outputs. To obtain this level ofperformance it is necessary to follow techniques similar to

SELECTLINE C

FREQUENCY (MHz)1

–120

HOST

ILE

CROS

STAL

K RE

JECT

ION

(dB)

–100

–80

–60

–40

10 100

LT1203/05 • AI06

–20VS = ±15V RS = 10Ω RL = 100Ω

5V

13

LT1203/LT1205

+1

+1

+1

+1U1

LT1205

16

9

10

11

12

13

14

15

C2 0.1µF1

R1 75Ω

C1 0.1µF

8

7

6

5

4

3

2

+1

+1

+1

+1U2

LT1205

16

9

10

11

12

13

14

15

1

8

7

6

5

4

3

2

10

9

8

4

11

OUTPUT 2 J7

+1

+1

+1

+1U3

LT1205

16 U5 74HC04

9

10

11

12

13

14

15

1

8

7

6

5

4

3

2

+1

+1

+1

U4 LT1205

16

9

A

LT1203/05 • F06

10

11

12

13

14

15

1

8

CH3 J4

CH0 J1

7

6

5

4

3

2

R2 75Ω

CH1 J2

R3 75Ω

CH2 J3

GND

B

5V–5V

R13 820Ω

R14 820Ω

C6 4.7µF

R19 75Ω

C5 4.7µF

R7 10k

–

+

R4 75Ω

C4 0.1µF

SELECT LOGIC OUTPUT 0

A BSELECT LOGIC

OUTPUT 1

A BSELECT LOGIC

OUTPUT 2

A BSELECT LOGIC

OUTPUT 3

C3 0.1µF

+1

A L L H H

B L H L H

CH0 CH1 CH2 CH3

SELECT LOGIC

TRUTH TABLE

INPUT CHANNEL

U6 C LT1254

12

13

14

OUTPUT 3 J8

R15 820Ω

R16 820Ω

R20 75Ω

R8 10k

–

+U6 D

LT1254

5

6

7

OUTPUT 1 J6

R11 820Ω

R12 820Ω

R18 75Ω

R6 10k

–

+U6 B

LT1254

3

2

1

OUTPUT 0 J5

R9 820Ω

R10 820Ω

R17 75Ω

–

+U6 A

LT1254

+

+

R5 10k

Figure 6. 4 × 4 Crosspoint and Truth Table

U

SA

O

PPLICATI

WU U

I FOR ATIO

14

LT1203/LT1205

U

SA

O

PPLICATI

WU U

I FOR ATIOthose used in the 16-to-1 crosspoint with one additionalsuggestion: Surround the LT1205 output traces by groundplane and route them away from the (–) inputs of theother three LT1254s.

Each pair of logic inputs labeled Select Logic Output isused to select a particular output. The truth table is usedto select the desired input and is applied to each pair oflogic inputs. For example, to route Channel 1 Input to

Output 3, the 4th pair of logic inputs labeled Select LogicOutput 3 is coded A = Low and B = High. To routeChannel 3 Input to all outputs, set all eight logic inputsHigh. Channel 3 is the default input with all logic inputsopen. To shut off all channels a pair of LT1259s can besubstituted for the LT1254. The LT1259 is a dual currentfeedback amplifier with a shutdown pin that reduces thesupply current to 0µA.

Response of All Four Inputs for the 4 × 4 Crosspoint

FREQUENCY (MHz)1

GAIN

(dB)

2

0

–2

–4

–6

–810 100

LT1203/05 • AI08

200

VS = ±5V RF = RG = 820Ω RL = 100Ω

LT1203/05 • AI10CHANNEL 0 = 1VCHANNEL 2 = 0V

4 × 4 Crosspoint, Switching Channel 0 to Channel 2

INPUT AOF SELECT

LOGICOUTPUT 0

5V

0V

4 × 4 Crosspoint, All Hostile Rejection

FREQUENCY (MHz)1

–120HOST

ILE

CROS

STAL

K RE

JECT

ION

(dB)

–100

–80

–60

–40

10 100

VS = ±5V RL = 100Ω RS = 0Ω

LT1203/05 • AI09

15

LT1203/LT1205

OFF IN 0

GND

LOGIC

ENABLE

V–

LT1203/05 • SS

V+

OUTIN 1

–2V

2V

V–

V–

V+

V+

LOGIC

SI PLIFIED SCHE ATICW W

Information furnished by Linear Technology Corporation is believed to be accurate and reliable.However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.

Dimensions in inches (millimeters) unless otherwise noted.PACKAGE DESCRIPTIOU

N8 Package8-Lead Plastic DIP

N8 0392

0.045 ± 0.015 (1.143 ± 0.381)

0.100 ± 0.010 (2.540 ± 0.254)

0.065 (1.651)

TYP

0.045 – 0.065 (1.143 – 1.651)

0.130 ± 0.005 (3.302 ± 0.127)

0.020 (0.508)

MIN

0.018 ± 0.003 (0.457 ± 0.076)

0.125 (3.175)

MIN

1 2 3 4

8 7 6 5

0.250 ± 0.010 (6.350 ± 0.254)

0.400 (10.160)

MAX

0.009 – 0.015 (0.229 – 0.381)

0.300 – 0.320 (7.620 – 8.128)

0.325+0.025 –0.015+0.635 –0.3818.255( )

16

LT1203/LT1205

PACKAGE DESCRIPTIOU

Dimensions in inches (millimeters) unless otherwise noted.

S8 Package8-Lead Plastic SOIC

1 2 3 4

0.150 – 0.157* (3.810 – 3.988)

8 7 6 5

0.189 – 0.197* (4.801 – 5.004)

0.228 – 0.244 (5.791 – 6.197)

0.016 – 0.050 0.406 – 1.270

0.010 – 0.020 (0.254 – 0.508)

× 45°

0°– 8° TYP0.008 – 0.010

(0.203 – 0.254)

SO8 0294

0.053 – 0.069 (1.346 – 1.752)

0.014 – 0.019 (0.355 – 0.483)

0.004 – 0.010 (0.101 – 0.254)

0.050 (1.270)

BSC

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm).

0.016 – 0.050 0.406 – 1.270

0.010 – 0.020 (0.254 – 0.508)

× 45°

0° – 8° TYP0.008 – 0.010

(0.203 – 0.254)

1 2 3 4 5 6 7 8

0.150 – 0.157* (3.810 – 3.988)

16 15 14 13

0.386 – 0.394* (9.804 – 10.008)

0.228 – 0.244 (5.791 – 6.197)

12 11 10 9

SO16 0893

0.053 – 0.069 (1.346 – 1.752)

0.014 – 0.019 (0.355 – 0.483)

0.004 – 0.010 (0.101 – 0.254)

0.050 (1.270)

TYP

*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS. MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006 INCH (0.15mm).

S Package16-Lead Plastic SOIC

LINEAR TECHNOLOGY CORPORATION 1994

LT/GP 0494 10K • PRINTED IN USALinear Technology Corporation1630 McCarthy Blvd., Milpitas, CA 95035-7487(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977

Documents

LT1203/LT1205 - 150MHz Video Multiplexers