Linear Ic Applications

7/30/2019 Linear Ic Applications

1/4

Code No: V3120/R07

III B.Tech I Semester Regular & Supplementary Examinations, November 2011

LINEAR IC APPLICATIONS(Electronics and Communications Engineering)

Time: 3 Hours Max Marks:80

Answer any FIVE Questions

All Questions carry equal marks*****

1. a) Draw the block schematic of an Op-amp and explain.b) Explain the operation of Level translator with relevant diagrams and expressions. [6+10]

2. a) What is input bias current and explain the bias current compensation in an inverting andnon inverting amplifier.

b) A square wave of peak to peak amplitude of 500mV has to be amplified to a peak to peak

amplitude of 3 V with a rise time of 4s or less. Can a typical 741 Op-amp be used?

Justify.

c) What is thermal drift and mention the techniques to minimize the effect of thermal drift.

[8+4+4]

3. a) What are the important features of an instrumentation amplifier and also Draw thediagram of an instrumentation amplifier and explain.

b) Explain the operation of a I V converter using relevant diagrams and expressions.

[10+6]

4. a) Explain the operation of Half wave rectifier using Op-amp with relevant diagrams andwaveforms.

b) Draw the diagram of anti-log amplifier and derive the expression for its output voltage.

[6+10]

5. a) Design a second order Butterworth low-pass filter with cut-off frequency 1kHz.b) Determine the order of a low-pass Butterworth filter that is to provide 40dB attenuation at/H =2.

c)On what does the damping factor of a filter depend. [8+4+4]

6. a) Draw the functional diagram of monostable multi vibrator using 555 timer. Explain theoperation using relevant waveforms.

b) Discuss the application of PLL as a frequency translator. [10+6]

7. a) Explain the operation of Flash ADC using relevant diagrams.b)A dual slope ADC uses a 18-bit counter with a 5mHz clock. The maximum input voltage

is+12 V and the maximum integrator output voltage at 2N

count is -10 V. If R= 100K,

find the size of the capacitor to be used for integrator. [10+6]

8. Write short notes ona) Four quadrant multiplier

b) Sample and Hold Amplifier. [8+8]

*****

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Set No: 1
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Code No: V3120/R07






1. a) Draw the small signal equivalent circuit of differential half circuit and obtain theexpressions for common mode gain and differential mode gain.

b) List the characteristics of an ideal Op-amp.

c) Draw the Ideal voltage transfer curve of an Op-amp and explain. [8+4+4]

2. a) Explain input offset current and present the solution for inverting amplifier withT- feedback network.

b) An Op-amp has a slew rate of 2 V/s .What is the maximum frequency of an output

sinusoid of peak value 5V at which distortion sets in due to slew rate limitation? Also if a

sinusoid of 10V peak is specified find the full power bandwidth.

c) Define output voltage swing of an Op-amp. Given the out voltage swing of an Op-ampis between13V and -13V , Open loop voltage gain = 10

6, the differential input voltage is

0.5V what is the output voltage? [6+6+4]

3. a) Explain the working of an Op-amp differentiator using relevant diagrams andexpressions.

Also draw the circuit diagram of a practical differentiator. Write expression for condition

of good differentiation

b) Explain the operation of a V-I converter using relevant diagrams and expressions. [10+6]

4. a) Explain the generation of triangular wave using relevant circuit diagram, waveforms andderive the expression for frequency of oscillation.

b) Draw the diagram of non-inverting comparator with positive Vrefand sketch sampleinput and output waveforms. [10+6]

5. a) Design a second order Butterworth high-pass filter with cut-off frequency 1kHz.b) Explain the functionality of VCO (566) using a block diagram. [8+8]

6. a) Draw the diagram of Schmitt trigger using 555 timer. Explain the operation usingrelevant waveforms.

b) Discuss the application of PLL as AM demodulator. [10+6]

7. a) Explain the operation of dual slope ADC using relevant diagrams.b) Find the conversion time of a 10 bit successive approximation ADC if its input clock is 5

MHz. [10+6]

8. Write short notes ona) Balanced Modulator using IC 1496

b) Sample and Hold Amplifier [8+8]

*****

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Set No: 2
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Code No: V3120/R07






1. a) Define CMRR. Explain why CMRR tends to infinity for an emitter coupled differentialamplifier when RE tends to infinity.

b) Present the AC analysis of Dual input - Balanced output Configuration. [6+10]

2. a) Explain input and output offset voltages with relevant diagramsb) A 741 C Op-amp is used as an inverting amplifier with a gain of 50 . The voltage gain vs

frequency curve of 741C is flat up to 20 KHz. What maximum peak to peak input signal

can be applied without distorting the output.

c) Define peak supply rejection ratio of an Op-amp. Is an Op-amp with smaller PSRR

better or larger PSRR better? Justify. [6+6+4]

3. a) Explain the working of an Op-amp integrator using relevant diagrams and expressions.

Also draw the circuit diagram of practical integrator and obtain the expression for output

Vo(s).

b) Design an op-amp differentiator that will differentiate an input with fmax = 100 Hz. [10+6]

4. a)Explain the operation of full wave rectifier using Op-amp with relevant diagrams andwaveforms.

b) Explain the application of comparator as zero crossing detector with relevant diagram

and wave forms. [8+8]

5. a) Design a wide band-pass filter with fL = 200Hz, fH =1kHz and a pass band gain = 4 andalso calculate the Q for the filter.

b) Draw the diagram of a second order high pass filter and obtain the expression for transfer

function, write the expression for cut-off frequency [8+8]

6. a) Draw the functional diagram of as table multivibratorusing 555 timer. Explain theoperation using relevant waveforms.

b) Explain the operation of Frequency multiplier using PLL . [10+6]

7. a )Explain the operation of Weighted resistor DAC with the help of relevant diagrams andsketches.(10M)

b) Compare and contrast Flash, dual slope, SAR type of ADCs. [10+6]

8. Write short notes ona) Applications of analog switches

b) Four quadrant multiplier [8+8]

*****

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Set No: 3
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Code No: V3120/R07



Time: 3 Hours Max Marks: 80



1. a) If the open loop gain of is very large , does the closed loop gain of the op-amp dependupon the external components or the op-amp?

b) Explain the properties of Dual Input Unbalanced Output Differential amplifier with

relevant diagrams.

c) Explain the necessity of a level translator in an Op-amp. [4+8+4]

2. a) Explain the different frequency compensation techniques for Op-amps.b) Define Slew rate of an Op-amp. Should the Slew rate of an Op-amp be high or low in

high frequency applications? Justify. [12+4]

3. a) Explain the operation of summing amplifier using relevant circuit diagram deriving theexpression for output.

Also Draw the circuit diagram of an amplifier which realizes the output Vo = V1 V2 +V3

- V4 where V1 ,V2 ,V3 and V4 are input voltages.

b) What are the differences between DC and AC amplifiers. Draw the circuit diagram of AC

voltage follower and explain. [10+6]

4. a) Design and draw the circuit diagram of a square wave oscillator for f= 1kHzusing 741 op-amp and supply voltages of +15v and -15V.

b) Design a Schmitt trigger for VUT= +0.5V and VLT = -0.5 V . [8+8]

5. a) Design a wide band-reject filter fL = 200Hz, fH =1kHzb) Draw the diagram of a second order low pass filter and obtain the expression for transfer

function, write the expression for cut-off frequency [8+8]

6. a) Explain operation of PLL using a block Schematic. Also explain the terms Lock-inrange, Capture range, pull-in time.

b) Draw and explain the functional diagram of a 555 timer. [8+8]

7. a )Explain the operation of R-2R ladder DAC with the help of relevant diagrams andsketches.

b) Find the conversion time of a 8 bit successive approximation ADC if its input clock is 5

MHz. [10+6]

8. Write short notes ona) Multiplexers.

b) Sample and Hold Amplifier. [8+8]

*****

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Set No: 4
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Linear Ic Applications