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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3781P 0.1
Cover PageB
1 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Intel Merom Processor with Calistoga + DDRII + ICH7M
Everest Schematics Document
REV: 1.0
Compal Confidential
2007-05-15
ZZZ4
PCBDAZ@
ZZZ
PCB
ZZZ1
PCBDAZ@
ZZZ2
PCBDAZ@
ZZZ3
PCB DAZ@
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3781P 0.1
Block DiagramsB
2 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
page 37 page 33
Fan Controlpage 4
Compal Confidential
IDE
Model Name : Everest
X4 mode
USB
S-ATA
File Name : LA-3781P
Touch Pad
page 42
CRT
LPC BUS
page 38
PCBGA 1466
3.3V 24.576MHz/48Mhz
H_A#(3..35) H_D#(0..63)
page 31
page 19
MDC 1.5Conn
page 39
Int.KBD
page 36
PCI-Express
BANK 0, 1, 2, 3
USB conn x2TO I/O/B
667/800MHz
ALC861VD
DMI
Intel Merom Processor
3.3V 48MHz
FSB
CDROM Conn.
RJ45
Clock GeneratorSLG8LP465VTR
page 34
page 18
uPGA-478 Package
200pin DDRII-SO-DIMM X2Intel Calistoga GMCH
3.3V ATA-100
Dual Channel
BIOS
page 4
1.8V DDRII 533/667
page 4,5,6
page 35
HDA Codec
page 16
Memory BUS(DDRII)
mBGA-652HD Audio
page 24
page 7,8,9,10,11,12,13
Intel ICH7-M
Thermal Sensor
page 14,15
page 20,21,22,23
page 36
ENE KB926
port 0
Audio AMP
LAN(10/100M)BCM5906
page 30
New CardSocket
MINI CardWLAN,3G/TV-Tuner Robson
PCI-Express
G781F
LCD Conn.
page 24
S-ATA HDDConn.
NB8M128MVGA/B
BluetoothConn
page 33
page 32
LVDS LVDS
page 33
USB conn x2TO M/B
CRT
SPI ROM
Power circuitpage X
SW BoardHDD/ODD NUM CAP Scroll PowerUserMute
K_SW
USBx2
USB BD
MB Power Battery W/L
Int SPK
Mic/ExtLine-out
Mic/Int
CRT
Card ReaderRTS 5158
page 28
3 in 1socketpage 29
Sub BD
NOVO
Audio BD
A
A
B
B
C
C
D
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1 1
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3781P 0.1
Notes ListB
3 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
ON
SLP_S3#SLP_S1#
S5 (Soft OFF)
S4 (Suspend to Disk)
S3 (Suspend to RAM)
LOW
ONON
ON
ON
ON
ON
ON
ON
HIGH
OFF
OFF
OFF
OFF
OFF
SLP_S4#
OFF
ON
ON
LOWLOWLOW
LOW
OFF
OFF
SLP_S5#
HIGH
HIGH HIGH HIGH
HIGHHIGHHIGHHIGH
LOW
LOW
LOW
LOW LOW LOW
+VALW
HIGH
+V +VS Clock
S1(Power On Suspend)
Full ON
STATE
OFFOFF
OFF
OFFON
ON
ON
OFF
OFF
OFFOFFON
ON*ON
ON
+CPU_CORE
1.5V switched power railOFF
OFF
ON
Voltage Rails
+5VS
+2.5VS1.8V switched power rail+1.8VS
+1.5VS
RTC power+RTCVCC
0.9V switched power rail for DDR terminator+0.9VS
OFFOFFON
3.3V switched power rail5V always on power rail
3.3V always on power rail
Adapter power supply (19V)
1.8V power rail for DDR
+3VALW
B+VIN
S5
2.5V switched power rail
+1.8V
+5VALW
S3S1
+3VS
ONON*ONVSB always on power rail+VSB
5V switched power rail
VCCP switched power rail
Core voltage for CPUAC or battery power rail for power circuit.
OFFONOFFON
ONON
ON
DescriptionPower Plane
N/A N/A N/AN/AN/AN/A
ON OFFON
ON
ON
OFFON*
OFF
BOARD ID Table
PANEL ID Table
SIGNAL
Address1001 100X b0001 011X b
EEPROM(24C16/02)
1010 010XbDDR DIMM1
1010 000XbDDR DIMM0
IDSEL #
1101 001Xb
ICH7M SM Bus address
DEVICE REQ/GNT #
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
Address
Address
Clock Generator(SLG8LP465VTR)
Device
PIRQ
GMT-781
1010 000X b
External PCI Devices
Device
EC SM Bus1 address
Smart Battery
Device
EC SM Bus2 address
NVIDIA NB8X
No PCI Device
R03 (PVT)
R01 (EVT)
7 R10A (MP)
R02 (DVT)
ID
6
R03 (PVT)
33K
R01 (EVT)
18K8.2K
0 0V
NC200K100K56K
1.65V1.19V0.82V0.50V0.25V
R10A (MP)
R02 (DVT)
3.30V2.20V
VabR54/42(Rb)BRD ID
4321
0
5
LHI
0LHI
TGI
2V
0
3
03
/
76
ID01234
5
IHL00/IGT30 UMA
IHL00/IGT30 VGA
IHLV3 UMA
IHLV2 VGA
UMA_DES
0V
0.25V
3.30V
2.20V
Vab
+VCCP
Wireless
NewCard
LAN
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
THERM_SCI#
EC_SMB_DA2
H_THERMDC
THERM#EC_SMB_CK2
H_PROCHOT# OCP#
H_THERMDA
H_D#45
H_D#47
H_D#44
H_D#46
H_D#49H_D#48
H_D#51H_D#50
H_D#55
H_D#52H_D#53H_D#54
H_D#56
H_D#59H_D#58H_D#57
H_A#31
H_FERR#
H_A#8
H_A#29H_A#28
H_ADSTB#0
H_A#17
H_BNR#
H_A#23
H_DSTBP#0
H_REQ#0
H_REQ#2
H_DEFER#
H_A#25
H_A#4
H_DSTBN#1
H_RS#0
H_ADS#
H_HITM#
H_DSTBP#1
H_A#3
H_RS#1
H_BPRI#
H_REQ#1
H_A#6
H_DRDY#
H_DSTBP#2
H_A#22
H_A#7
H_A20M#
ITP_DBRESET#
H_A#14
H_REQ#4
H_A#15
H_DSTBN#2
H_INTR
H_DSTBN#0
H_DSTBP#3
H_A#18
H_A#11
H_DSTBN#3
H_A#27
H_LOCK#
H_A#26
H_A#13
H_A#30
H_BR0#
H_A#21
H_NMI
H_A#10
H_A#20
H_ADSTB#1
H_A#24
H_DPSLP#
H_HIT#
H_A#19
H_RESET#
H_A#12
H_DBSY#
H_RS#2
H_A#9
H_A#16
H_A#5
H_PWRGOOD
ITP_TCK
H_REQ#3
ITP_TRST#
ITP_TDI
H_STPCLK#
ITP_TDO
H_SMI#
H_TRDY#
H_CPUSLP#
ITP_TMS
H_D#63
H_DPWR#
H_D#62
TEST2TEST1
H_D#61H_D#60
H_IGNNE#H_INIT#
CLK_CPU_BCLK
H_THERMDA
H_THERMTRIP#H_THERMDC
CLK_CPU_BCLK#
H_IERR#
H_DINV#0H_DINV#1
H_DINV#3H_DINV#2
H_D#0H_D#1H_D#2H_D#3
H_PROCHOT#
H_D#7H_D#6H_D#5H_D#4
H_D#11
H_D#9H_D#8
H_D#10
H_D#14H_D#13
H_D#15
H_D#12
H_D#17H_D#18H_D#19
H_D#16
H_D#23
H_D#21H_D#20
H_D#22
H_DPRSTP#
H_D#27H_D#26
H_D#24H_D#25
H_D#30H_D#31
H_D#28H_D#29
H_D#35
H_D#32
H_D#34H_D#33
H_D#37H_D#38
H_D#36
H_D#39
H_D#42H_D#43
H_D#41H_D#40
H_DPRSTP#
H_DPSLP#
ITP_DBRESET#
ITP_TDI
ITP_TMS
ITP_TRST#
ITP_TCK
ITP_TDO
+VCC_FAN1EN_FAN1
+VCC_FAN1
FAN_SPEED1<31>
EC_SMB_DA2<31>
EC_SMB_CK2<31>
EC_THERM# <21,31>
OCP# <21>
H_D#[0..63] <7>H_A#[3..31]<7>
H_REQ#[0..4]<7>
H_ADSTB#0<7>H_ADSTB#1<7>
CLK_CPU_BCLK#<15>CLK_CPU_BCLK<15>
H_ADS#<7>H_BNR#<7>
H_BR0#<7>
H_DRDY#<7>H_HIT#<7>
H_HITM#<7>
H_BPRI#<7>
H_DEFER#<7>
H_RESET#<7>
H_RS#[0..2]<7>
H_TRDY#<7>
H_DBSY#<7>H_DPSLP#<20>
H_DPRSTP#<20,44>H_DPWR#<7>
H_PWRGOOD<20>H_CPUSLP#<7,20>
H_DSTBN#[0..3] <7>
H_DSTBP#[0..3] <7>
ITP_DBRESET#<21>
H_FERR# <20>
H_THERMTRIP#<7,20>
H_DINV#2 <7>
H_LOCK#<7>
H_A20M# <20>
H_SMI# <20>
H_DINV#1 <7>
H_INTR <20>H_INIT# <20>
H_STPCLK# <20>
H_IGNNE# <20>
H_NMI <20>
H_DINV#3 <7>
H_DINV#0 <7>
H_PROCHOT#<44>
EN_FAN1<31>
+3VS
+5VS
+3VS
+3VS
+VCCP
+VCCP
+VCCP
+VCCP
+VCCP
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3781P 0.1
Merom (1/3)Custom
4 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
40mil
FAN1 Conn
Address:100_1100
Check : to sb
DIODEClosed toConnector
H_THERMDA, H_THERMDC routing together.Trace width / Spacing = 10 / 10 mil
This shall place near CPU
D8
1SS355_SOD323@
12
R512 56_0402_5%1 2
C942.2U_0603_16V6K
1 2
R509 56_0402_5%1 2
EB
C
Q4MMBT3904_SOT23
@
2
3 1
U19
G781F_SOP8
VDD1 1
ALERT# 6
THERM# 4
GND 5
D+2
D-3
SCLK8
SDATA7
R486
56_0402_5%@
1 2
C3581000P_0402_50V7K
1 2
R487
56_0402_5%@
1 2
R68
56_0402_5%@
12
D71N4148_SOT23@
1 2
ADDR GROUP
CONTROL
HOST CLK
MISC
DATA GROUP
THERMALDIODE
LEGACY CPU
YONAHJP15A
TYCO_1-1674770-2_Yonah~DME@
A3#J4A4#L4A5#M3A6#K5A7#M1A8#N2A9#J1A10#N3A11#P5A12#P2A13#L1A14#P4A15#P1A16#R1A17#Y2A18#U5A19#R3A20#W6A21#U4A22#Y5A23#U2A24#R4A25#T5A26#T3A27#W3A28#W5A29#Y4A30#W2A31#Y1
REQ0#K3REQ1#H2REQ2#K2REQ3#J3REQ4#L5
ADSTB0#L2ADSTB1#V4
BCLK0A22BCLK1A21
ADS#H1BNR#E2BPRI#G5BR0#F1DEFER#H5DRDY#F21HIT#G6HITM#E4IERR#D20LOCK#H4RESET#B1
RS0#F3RS1#F4RS2#G3TRDY#G2
BPM0#AD4BPM1#AD3BPM2#AD1BPM3#AC4
DBR#C20DBSY#E1DPSLP#B5
DPWR#D24PRDY#AC2PREQ#AC1PROCHOT#D21
PWRGOODD6SLP#D7TCKAC5TDIAA6TDOAB3TEST1C26TEST2D25TMSAB5TRST#AB6
THERMDAA24THERMDCA25THERMTRIP#C7
D0# E22D1# F24D2# E26D3# H22D4# F23D5# G25D6# E25D7# E23D8# K24D9# G24
D10# J24D11# J23D12# H26D13# F26D14# K22D15# H25D16# N22D17# K25D18# P26D19# R23D20# L25D21# L22D22# L23D23# M23D24# P25D25# P22D26# P23D27# T24D28# R24D29# L26D30# T25D31# N24D32# AA23D33# AB24D34# V24D35# V26D36# W25D37# U23D38# U25D39# U22D40# AB25D41# W22D42# Y23D43# AA26D44# Y26D45# Y22D46# AC26D47# AA24D48# AC22D49# AC23D50# AB22D51# AA21D52# AB21D53# AC25D54# AD20D55# AE22D56# AF23D57# AD24D58# AE21D59# AD21D60# AE25D61# AF25D62# AF22D63# AF26
DINV0# J26DINV1# M26DINV2# V23DINV3# AC20
DSTBN0# H23DSTBN1# M24DSTBN2# W24DSTBN3# AD23DSTBP0# G22DSTBP1# N25DSTBP2# Y25DSTBP3# AE24
A20M# A6FERR# A5
IGNNE# C4INIT# B3
LINT0 C6LINT1 B4
STPCLK# D5SMI# A3
DPRSTP#E5
JP17
ACES_85205-03001ME@
112233
GND4GND5
R26810K_0402_5%
@
12
R26910K_0402_5% @12
R514 56_0402_5%1 2
R515 56_0402_5% @
1 2
C341100P_0402_50V8J
1
2
C327
0.1U_0402_16V4Z
1 2
T48PAD
T35PAD
C328
2200P_0402_50V7K1 2
R267 0_0402_5%@12
R307 51_0402_5%
1 2
R7356_0402_5%
1 2
R499 1K_0402_5%@1 2
R2761K_0402_5%
12
U6
G993P1UF_SOP8
VEN1VIN2
GND 5GND 6
GND 8
VO3VSET4
GND 7
C100 2.2U_0603_16V6K
1 2
R511 200_0402_5%@1 2
R510 56_0402_1%1 2
R7068_0402_5% 1 2
R513 56_0402_5%1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VSSSENSE
CPU_VID1
H_PSI#
CPU_VID0
CPU_VID3CPU_VID4
CPU_VID2
CPU_VID5CPU_VID6
COMP3COMP2COMP1
CPU_BSEL1CPU_BSEL2
VCCSENSE
COMP0
VSSSENSE
VCCSENSE
CPU_BSEL0
H_PSI#<44>
CPU_VID0<44>CPU_VID1<44>CPU_VID2<44>CPU_VID3<44>CPU_VID4<44>CPU_VID5<44>CPU_VID6<44>
CPU_BSEL0<15>CPU_BSEL1<15>CPU_BSEL2<15>
VCCSENSE<44>VSSSENSE<44>
+VCCP
+CPU_CORE
+VCCP
+CPU_GTLREF
+CPU_GTLREF
+1.5VS
+CPU_CORE
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3781P 0.1
Merom (2/3)Custom
5 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Close to CPU pin AD26within 500mils.
Length match within 25 milsThe trace width 18 mils space7 mils
CPU_BSEL CPU_BSEL2 CPU_BSEL1
133
166
0 0
0 1
CPU_BSEL0
1
1
Resistor placed within0.5" of CPU pin.Traceshould be at least 25mils away from anyother toggling signal.
Close to CPU pinwithin 500mils.
POWER, GROUNG, RESERVED SIGNALS AND NC
YONAH
JP15B
TYCO_1-1674770-2_Yonah~DME@
PSI#AE6
GTLREFAD26
VCCSENSEAF7
VCCAB26
VCCAB20VCCAA20VCCAF20VCCAE20VCCAB18VCCAB17VCCAA18VCCAA17VCCAD18VCCAD17VCCAC18VCCAC17VCCAF18VCCAF17
RSVDT22
RSVDV3RSVDB2RSVDC3
VSS AB26VSS AA25VSS AD25VSS AE26VSS AB23VSS AC24VSS AF24VSS AE23VSS AA22VSS AD22VSS AC21VSS AF21VSS AB19VSS AA19VSS AD19VSS AC19VSS AF19VSS AE19VSS AB16VSS AA16VSS AD16VSS AC16VSS AF16VSS AE16VSS AB13VSS AA14VSS AD13VSS AC14VSS AF13VSS AE14VSS AB11VSS AA11VSS AD11VSS AC11VSS AF11VSS AE11VSS AB8VSS AA8VSS AD8VSS AC8VSS AF8VSS AE8VSS AA5VSS AD5VSS AC6VSS AF6VSS AB4VSS AC3VSS AF3VSS AE4VSS AB1VSS AA2VSS AD2VSS AE1VSS B6VSS C5VSS F5VSS E6VSS H6VSS J5VSS M5VSS L6VSS P6VSS R5VSS V5VSS U6VSS Y6VSS A4VSS D4VSS E3VSS H3VSS G4VSS K4VSS L3VSS P3VSS N4VSS T4VSS U3VSS Y3VSS W4VSS D1VSS C2VSS F2VSS G1RSVDB25
VSSSENSEAE7
VCCPK6VCCPJ6VCCPM6VCCPN6VCCPT6VCCPR6VCCPK21VCCPJ21VCCPM21VCCPN21VCCPT21VCCPR21VCCPV21VCCPW21VCCPV6VCCPG21
VID0AD6VID1AF5VID2AE5VID3AF4VID4AE3VID5AF2VID6AE2
BSEL0B22BSEL1B23BSEL2C21
COMP0R26COMP1U26COMP2U1COMP3V1
RSVDC23RSVDC24RSVDAA1RSVDAA4RSVDAB2RSVDAA3RSVDM4RSVDN5RSVDT2
RSVDD2RSVDF6RSVDD3RSVDC1RSVDAF1RSVDD22
VCCE7
C28
30.
01U
_040
2_16
V7K
1
2
R516100_0402_1%
1 2
R672K_0402_1%
12
R76
54.9
_040
2_1%
12
C28
410
U_0
805_
10V4
Z
1
2
R2631K_0402_1%
12
POWER, GROUND
YONAH
JP15C
TYCO_1-1674770-2_Yonah~DME@
VCCAE18VCCAE17VCCAB15VCCAA15VCCAD15VCCAC15VCCAF15VCCAE15VCCAB14VCCAA13VCCAD14VCCAC13VCCAF14VCCAE13VCCAB12VCCAA12VCCAD12VCCAC12VCCAF12VCCAE12VCCAB10VCCAB9VCCAA10VCCAA9VCCAD10VCCAD9VCCAC10VCCAC9VCCAF10VCCAF9VCCAE10VCCAE9VCCAB7VCCAA7VCCAD7VCCAC7VCCB20VCCA20VCCF20VCCE20VCCB18VCCB17VCCA18VCCA17VCCD18VCCD17VCCC18VCCC17VCCF18VCCF17VCCE18VCCE17VCCB15VCCA15VCCD15VCCC15VCCF15VCCE15
VSS K1VSS J2VSS M2VSS N1VSS T1VSS R2VSS V2VSS W1VSS A26VSS D26VSS C25VSS F25VSS B24VSS A23VSS D23VSS E24VSS B21VSS C22VSS F22VSS E21VSS B19VSS A19VSS D19VSS C19VSS F19VSS E19VSS B16VSS A16VSS D16VSS C16VSS F16VSS E16VSS B13VSS A14VSS D13VSS C14VSS F13VSS E14VSS B11VSS A11VSS D11VSS C11VSS F11VSS E11VSS B8VSS A8VSS D8VSS C8VSS F8VSS E8VSS G26VSS K26VSS J25VSS M25VSS N26VSS T26VSS R25VSS V25VSS W26VSS H24VSS G23VSS K23VSS L24VSS P24VSS N23VSS T23VSS U24VSS Y24VSS W23VSS H21VSS J22VSS M22VSS L21VSS P21VSS R22VSS V22VSS U21VSS Y21
VCCB14VCCA13VCCD14VCCC13VCCF14VCCE13VCCB12VCCA12VCCD12VCCC12VCCF12VCCE12VCCB10VCCB9VCCA10VCCA9VCCD10VCCD9VCCC10VCCC9VCCF10VCCF9VCCE10VCCE9VCCB7
VCCF7 VCCA7
R26
427
.4_0
402_
1%
12
R266100_0402_1%
1 2
R51
754
.9_0
402_
1%
12
R26
127
.4_0
402_
1%
12
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCP
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
+CPU_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
Merom (3/3)B
6 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
6X330uF 9m ohm/6 1.8nH/6
+CPU-COREDecoupling
32X22uF 3m ohm/32 0.6nH/32
C,uF ESR, mohm ESL,nH
SPCAP,Polymer
MLCC 0805 X5R
3 x 330uF(9mOhm/2)
South Side Secondary North Side Secondary
(Place these capacitors on South side,Secondary Layer)
(Place these capacitors on South side,Primary Layer)
(Place these capacitors on North side,Primary Layer)
(Place these capacitors on North side,Secondary Layer)
32X10uF 3m ohm/32 0.6nH/32
9/25 10U checked. OK for use!
3 x 330uF(9mOhm/2)
C32
10U_0805_6.3V6M
1
2
C315
10U_0805_6.3V6M
@
1
2
C45
0.1U_0402_16V4Z
1
2
C313
10U_0805_6.3V6M
1
2
C323
10U_0805_6.3V6M
1
2
C309
10U_0805_6.3V6M
1
2
C316
10U_0805_6.3V6M
1
2
C53
10U_0805_6.3V6M
1
2
C320
10U_0805_6.3V6M
1
2
C50
10U_0805_6.3V6M
1
2
C26
10U_0805_6.3V6M
@
1
2
C310
10U_0805_6.3V6M
1
2
C306
10U_0805_6.3V6M
1
2
C49
10U_0805_6.3V6M
1
2
C27
10U_0805_6.3V6M
1
2
C308
10U_0805_6.3V6M
1
2
+ C298
330U_D2E_2.5VM_R9
1
2
C43
0.1U_0402_16V4Z
1
2
C33
10U_0805_6.3V6M
1
2
C52
10U_0805_6.3V6M
1
2
C51
10U_0805_6.3V6M
1
2
C39
0.1U_0402_16V4Z
1
2
C305
10U_0805_6.3V6M
1
2
C307
10U_0805_6.3V6M
1
2
+ C332
330U_D2E_2.5VM_R9
1
2
+ C297
330U_D2E_2.5VM_R9
1
2
+C324220U_B2_2.5VM_R35
1
2
C322
10U_0805_6.3V6M
1
2
C29
10U_0805_6.3V6M
1
2
C56
10U_0805_6.3V6M
1
2
C318
10U_0805_6.3V6M
1
2
C24
0.1U_0402_16V4Z
1
2
C54
10U_0805_6.3V6M
1
2
C31
10U_0805_6.3V6M
@ 1
2
C58
0.1U_0402_16V4Z
1
2
+ C331
330U_D2E_2.5VM_R9
1
2
C30
10U_0805_6.3V6M
1
2
C38
0.1U_0402_16V4Z
1
2
C314
10U_0805_6.3V6M @
1
2
C321
10U_0805_6.3V6M
1
2
C28
10U_0805_6.3V6M
1
2
C55
10U_0805_6.3V6M
1
2
C319
10U_0805_6.3V6M
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+DDR_MCH_REF
H_BPRI#
H_DPWR#
H_D#22
H_D#11
H_ADSTB#1
MCH_CLKSEL0
CFG8
H_TRDY#
H_RS#0
H_REQ#4
H_A#28
H_A#9
H_D#16
H_D#5
H_D#0
CLK_MCH_BCLK
H_THERMTRIP#
DMI_TXP1
+H_VREF+H_SWNG0
H_DSTBP#0
H_A#29
H_A#27
H_A#20
H_A#15H_A#14
H_A#4H_A#3
H_D#56
H_D#31
H_D#12
MCH_CLKSEL2
H_A#13
+H_SWNG1
H_D#54
H_D#50
H_D#38
H_D#6
H_DINV#0
CLK_MCH_SSCDREFCLK#
CLK_MCH_DREFCLK
DMI_RXN2
DMI_RXN0
H_D#49
H_A#26
H_A#18
H_A#7
H_XRCOMP
H_D#35
H_D#27
PM_BMBUSY#
CLK_MCH_3GPLL#
CFG20
CFG18
SMRCOMPN
DMI_RXP2
DMI_TXN0
H_A#30
H_A#17
H_A#5
H_YRCOMP
H_D#18
H_RESET#
DMI_RXP3
DMI_TXN2H_D#2
H_HIT#
H_A#25
H_D#60
H_D#45
H_D#7
H_DINV#1
MCH_CLKREQ#
CFG15
CFG4
DMI_RXN1
H_D#3
+DDR_MCH_REF
H_HITM#
H_DSTBP#1
H_D#61
H_D#53
H_D#51
H_D#39
H_D#17
M_OCDOCMP0
CLK_MCH_3GPLL
CFG13
H_D#29
+H_SWNG1
H_A#31
+H_SWNG0
H_D#57
H_D#10
H_DINV#2
H_ADSTB#0
CFG11
CFG9DMI_TXP2
H_DEFER#H_DRDY#
H_DSTBN#1
H_REQ#0
H_A#23
H_D#58
H_D#15
H_D#1
H_ADS#PM_EXTTS#0
MCH_CLKSEL1
CFG16
DMI_RXP1
DMI_TXP0
H_A#16
H_A#19
H_D#40
H_D#37
H_D#21
H_D#9
H_D#4
ICH_POK
CLK_MCH_DREFCLK#
CFG19
CFG12
CFG14
H_LOCK#
H_RS#2
H_XSCOMP
H_D#63
H_D#59
H_D#52
H_D#44
H_D#42
H_D#23
CLK_MCH_BCLK#
PLTRST_R#
CFG7
DMI_TXN3
DMI_TXN1
H_D#48
H_D#25
H_DSTBP#3
H_DSTBN#3
H_REQ#2H_REQ#1
H_A#21
H_D#55
H_D#43
H_D#26
H_D#13
CFG5
M_OCDOCMP0
DMI_RXP0
H_D#30
H_D#24
H_CPUSLP#H_DBSY#
H_BNR#
H_A#12H_A#11H_A#10
H_A#6
H_D#62
H_D#20
H_D#8
DMI_TXP3
SMRCOMPP
PM_EXTTS#1
H_DSTBN#0
H_RS#1
H_A#22
H_D#46
H_D#41
H_D#14
CFG10
DMI_RXN3
PM_EXTTS#0
H_A#24
H_D#47
H_D#33H_D#32
H_D#28
H_D#19CFG17
CFG3
H_BR0#
H_DSTBP#2
H_DSTBN#2
H_REQ#3
H_A#8
H_YSCOMP
H_D#36
H_D#34
H_DINV#3
CLK_MCH_SSCDREFCLK
M_OCDOCMP1
M_OCDOCMP1
CFG6
PM_EXTTS#1
+H_VREF
DMI_RXP0<21>
PM_DPRSLPVR<21,44>
H_HITM# <4>
MCH_CLKSEL0 <15>
DMI_RXN3<21>
DMI_TXN3<21>
H_HIT# <4>
MCH_CLKREQ# <15>
DMI_TXP1<21>
DMI_TXN2<21>
CFG20 <11>
CLK_MCH_BCLK# <15>
DMI_RXN2<21>
H_DINV#3 <4>
H_DINV#0 <4>H_DINV#1 <4>
H_ADSTB#0 <4>
CLK_MCH_SSCDREFCLK <15>
H_CPUSLP# <4,20>
CLK_MCH_3GPLL# <15>
H_RESET# <4> PM_EXTTS#0<13,14>
DMI_TXP3<21>
DMI_TXP0<21>
DMI_TXN0<21>
CFG19 <11>
H_DPWR# <4>
PM_BMBUSY#<21>
DMI_RXP3<21>
DMI_RXN1<21>
CFG7 <11>
H_TRDY# <4>
CFG12 <11>
H_A#[3..31] <4>
H_ADSTB#1 <4>
DMI_RXN0<21>
DMI_TXN1<21>
H_LOCK# <4>
CLK_MCH_DREFCLK# <15>
CFG5 <11>
PLT_RST_BUF#<16,19,21,23,24,27,29>
DMI_TXP2<21>
CFG11 <11>
DMI_RXP1<21>DMI_RXP2<21>
CLK_MCH_DREFCLK <15>
H_DBSY# <4>
CLK_MCH_3GPLL <15>
H_DEFER# <4>
CFG13 <11>
ICH_POK<21,31>
CFG16 <11>
H_REQ#[0..4] <4>
H_D#[0..63]<4>
H_RS#[0..2] <4>
MCH_CLKSEL2 <15>
H_DINV#2 <4>
H_BNR# <4>
H_DRDY# <4>
MCH_CLKSEL1 <15>
H_DSTBN#[0..3] <4>
MCH_ICH_SYNC#<19>
H_BR0# <4>
H_BPRI# <4>
CFG18 <11>
H_ADS# <4>
CLK_MCH_SSCDREFCLK# <15>
H_DSTBP#[0..3] <4>
CFG9 <11>
CLK_MCH_BCLK <15>
H_THERMTRIP#<4,20>
DDRA_CLK0<13>DDRA_CLK1<13>DDRB_CLK0<14>DDRB_CLK1<14>
DDRA_CLK0#<13>DDRA_CLK1#<13>DDRB_CLK0#<14>DDRB_CLK1#<14>
DDRA_CKE0<13>DDRA_CKE1<13>DDRB_CKE0<14>DDRB_CKE1<14>
DDRA_SCS0#<13>DDRA_SCS1#<13>DDRB_SCS0#<14>DDRB_SCS1#<14>
DDRA_ODT0<13>DDRA_ODT1<13>DDRB_ODT0<14>DDRB_ODT1<14>
+VCCP
+VCCP
+VCCP
+VCCP
+1.8V
+1.8V
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
Crestline (1/7)-GTLCustom
7 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Layout Note: +DDR_MCH_REFtrace width andspacing is 20/20.
Layout Note:H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 /H_SWNG1 trace width and spacing is 10/20.
Description at page15.
R52
0
221_
0603
_1%
12
R28
100_
0402
_1%
12
R3240.2_0402_1%@
12
DM
ID
DR
MU
CFG
PM
CLK
NC
RES
ERVE
D
U20B
CALISTOGA_FCBGA1466~DGM@
DMIRXN0AE35DMIRXN1AF39DMIRXN2AG35DMIRXN3AH39
DMIRXP0AC35DMIRXP1AE39DMIRXP2AF35DMIRXP3AG39
DMITXN0AE37DMITXN1AF41DMITXN2AG37DMITXN3AH41
DMITXP0AC37DMITXP1AE41DMITXP2AF37DMITXP3AG41
SM_CK0AY35SM_CK1AR1SM_CK2AW7SM_CK3AW40
SM_CK0#AW35SM_CK1#AT1SM_CK2#AY7SM_CK3#AY40
SM_OCDCOMP0AL20SM_OCDCOMP1AF10
SM_ODT0BA13SM_ODT1BA12SM_ODT2AY20SM_ODT3AU21
SM_RCOMPNAV9SM_RCOMPPAT9
SM_VREF0AK1SM_VREF1AK41
SM_CKE0AU20SM_CKE1AT20SM_CKE2BA29SM_CKE3AY29
SM_CS0#AW13SM_CS1#AW12SM_CS2#AY21SM_CS3#AW21
CFG16 G18
CFG1 K18CFG2 J18CFG3 F18CFG4 E15CFG5 F15CFG6 E18CFG7 D19CFG8 D16CFG9 G16
CFG10 E16CFG11 D15CFG12 G15CFG13 K15CFG14 C15CFG15 H16
CFG0 K16
CFG17 H15CFG18 J25CFG19 K27CFG20 J26
G_CLKP AG33G_CLKN AF33
D_REF_CLKN A27D_REF_CLKP A26
D_REF_SSCLKN C40D_REF_SSCLKP D41
NC0 A3NC1 A39NC2 A4NC3 A40NC4 AW1NC5 AW41NC6 AY1NC7 BA1NC8 BA2NC9 BA3
NC10 BA39NC11 BA40NC12 BA41NC13 C1NC14 AY41NC15 B2NC16 B41NC17 C41NC18 D1
PM_BMBUSY#G28PM_EXTTS0#F25PM_EXTTS1#H26PM_THERMTRIP#G6PWROKAH33RSTIN#AH34
RESERVED1 T32RESERVED2 R32RESERVED3 F3RESERVED4 F7RESERVED5 AG11RESERVED6 AF11RESERVED7 H7RESERVED8 J19RESERVED9 A41
RESERVED10 A34RESERVED11 D28RESERVED12 D27RESERVED13 A35
ICH_SYNC#K28
CLK_REQ# H32
C30
30.
1U_0
402_
16V4
Z
1
2
R518 80.6_0402_1%
1 2
T1PAD
R282
100_0402_1%
12
R16
8
100_
0402
_1%
12
U20
965GMPM@
R31
100_
0402
_1%
12
R27
100_0402_1%
12
T10PAD
HOST
U20A
CALISTOGA_FCBGA1466~DGM@
HD0#F1HD1#J1HD2#H1HD3#J6HD4#H3HD5#K2HD6#G1HD7#G2HD8#K9HD9#K1HD10#K7HD11#J8HD12#H4HD13#J3HD14#K11HD15#G4HD16#T10HD17#W11HD18#T3HD19#U7HD20#U9HD21#U11HD22#T11HD23#W9HD24#T1HD25#T8HD26#T4HD27#W7HD28#U5HD29#T9HD30#W6HD31#T5HD32#AB7HD33#AA9HD34#W4HD35#W3HD36#Y3HD37#Y7HD38#W5HD39#Y10HD40#AB8HD41#W2HD42#AA4HD43#AA7HD44#AA2HD45#AA6HD46#AA10HD47#Y8HD48#AA1HD49#AB4HD50#AC9HD51#AB11HD52#AC11HD53#AB3HD54#AC2HD55#AD1HD56#AD9HD57#AC1HD58#AD7HD59#AC6HD60#AB5HD61#AD10HD62#AD4HD63#AC8
HVREF1K13HXRCOMPE1HXSCOMPE2HYRCOMPY1HYSCOMPU1HXSWINGE4HYSWINGW1
HA3# H9HA4# C9HA5# E11HA6# G11HA7# F11HA8# G12HA9# F9
HA10# H11HA11# J12HA12# G14HA13# D9HA14# J14HA15# H13HA16# J15HA17# F14HA18# D12HA19# A11HA20# C11HA21# A12HA22# A13HA23# E13HA24# G13HA25# F12HA26# B12HA27# B14HA28# C12HA29# A14HA30# C14HA31# D14
HREQ#0 D8HREQ#1 G8HREQ#2 B8HREQ#3 F8HREQ#4 A8
HADSTB#0 B9HADSTB#1 C13
HRS0# B4HRS1# E6HRS2# D6
HCLKN AG1HCLKP AG2
HDINV#0 J7HDINV#1 W8HDINV#2 U3HDINV#3 AB10
HDSTBN#0 K4HDSTBN#1 T7HDSTBN#2 Y5HDSTBN#3 AC4HDSTBP#0 K3HDSTBP#1 T6HDSTBP#2 AA5HDSTBP#3 AC5
HCPURST# B7HADS# E8
HTRDY# E7HDPWR# J9HDRDY# H8
HDEFER# C3HHITM# D4
HHIT# D3HLOCK# B3
HBREQ0# C7HBNR# C6HBPRI# F6
HDBSY# A7HCPUSLP# E3
HVREF0J13
R51910K_0402_5%
12
R24
24.9
_040
2_1%
12
R33 80.6_0402_1%
1 2
C28
60.
1U_0
402_
16V4
Z
1
2
R39
24.9
_040
2_1%
12
T5PAD
R35
54.9
_040
2_1%
12
C91
0.1U
_040
2_16
V4Z
1
2
T8PAD
T7PAD
R52
1
221_
0603
_1%
12
R117 100_0402_1%
12
R37
200_
0402
_1%
12
T3PAD
R28
354
.9_0
402_
1%
12
R164
0_0402_5%
12
T2PAD
C28
70.
1U_0
402_
16V4
Z
1
2
R27910K_0402_5%@
12
R11240.2_0402_1%@
12
T9PAD
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SA_RCVENIN# SB_RCVENIN#SB_RCVENOUT#SA_RCVENOUT#
DDRA_SDQ2DDRA_SDQ3
DDRA_SDQ0DDRA_SDQ1
DDRA_SDQ7DDRA_SDQ6DDRA_SDQ5DDRA_SDQ4
DDRA_SDQ40DDRA_SDQ41DDRA_SDQ42DDRA_SDQ43DDRA_SDQ44DDRA_SDQ45DDRA_SDQ46DDRA_SDQ47
DDRA_SDQ12
DDRA_SDQ14DDRA_SDQ15
DDRA_SDQ13
DDRA_SDQ8DDRA_SDQ9
DDRA_SDQ10DDRA_SDQ11
DDRA_SDQ48DDRA_SDQ49DDRA_SDQ50DDRA_SDQ51DDRA_SDQ52DDRA_SDQ53DDRA_SDQ54DDRA_SDQ55
DDRA_SDQ22DDRA_SDQ21
DDRA_SDQ17DDRA_SDQ18
DDRA_SDQ23
DDRA_SDQ16
DDRA_SDQ19DDRA_SDQ20
DDRA_SDQ56DDRA_SDQ57DDRA_SDQ58DDRA_SDQ59DDRA_SDQ60DDRA_SDQ61DDRA_SDQ62DDRA_SDQ63
DDRA_SDQ27DDRA_SDQ26
DDRA_SDQ29
DDRA_SDQ31DDRA_SDQ30
DDRA_SDQ24DDRA_SDQ25
DDRA_SDQ28
DDRA_SDQ32DDRA_SDQ33DDRA_SDQ34DDRA_SDQ35DDRA_SDQ36DDRA_SDQ37DDRA_SDQ38DDRA_SDQ39
DDRA_SDM6DDRA_SDM5
DDRA_SDM0
DDRA_SDM4
DDRA_SDM1
DDRA_SDM7
DDRA_SDM2DDRA_SDM3
DDRA_SMA3
DDRA_SMA7
DDRA_SMA0
DDRA_SMA2
DDRA_SMA10
DDRA_SMA1
DDRA_SMA6DDRA_SMA5
DDRA_SMA12DDRA_SMA11
DDRA_SMA4
DDRA_SMA8DDRA_SMA9
DDRA_SMA13
DDRA_SDQS5
DDRA_SDQS0
DDRA_SDQS4DDRA_SDQS3
DDRA_SDQS7
DDRA_SDQS2
DDRA_SDQS6
DDRA_SDQS1
DDRA_SDQS5#
DDRA_SDQS0#
DDRA_SDQS4#DDRA_SDQS3#
DDRA_SDQS7#
DDRA_SDQS2#
DDRA_SDQS6#
DDRA_SDQS1#
DDRA_SDQ[0..63]
DDRA_SMA[0..13]
DDRA_SDM[0..7]
DDRB_SDQ2DDRB_SDQ3
DDRB_SDQ0DDRB_SDQ1
DDRB_SDQ7DDRB_SDQ6DDRB_SDQ5DDRB_SDQ4
DDRB_SDQ40DDRB_SDQ41DDRB_SDQ42DDRB_SDQ43DDRB_SDQ44DDRB_SDQ45DDRB_SDQ46DDRB_SDQ47
DDRB_SDQ12
DDRB_SDQ14DDRB_SDQ15
DDRB_SDQ13
DDRB_SDQ8DDRB_SDQ9
DDRB_SDQ10DDRB_SDQ11
DDRB_SDQ48DDRB_SDQ49DDRB_SDQ50DDRB_SDQ51DDRB_SDQ52DDRB_SDQ53DDRB_SDQ54DDRB_SDQ55
DDRB_SDQ22DDRB_SDQ21
DDRB_SDQ17DDRB_SDQ18
DDRB_SDQ23
DDRB_SDQ16
DDRB_SDQ19DDRB_SDQ20
DDRB_SDQ56DDRB_SDQ57DDRB_SDQ58DDRB_SDQ59DDRB_SDQ60DDRB_SDQ61DDRB_SDQ62DDRB_SDQ63
DDRB_SDQ27DDRB_SDQ26
DDRB_SDQ29
DDRB_SDQ31DDRB_SDQ30
DDRB_SDQ24DDRB_SDQ25
DDRB_SDQ28
DDRB_SDQ32DDRB_SDQ33DDRB_SDQ34DDRB_SDQ35DDRB_SDQ36DDRB_SDQ37DDRB_SDQ38DDRB_SDQ39
DDRB_SDM6
DDRB_SDM1
DDRB_SDM5
DDRB_SDM0
DDRB_SDM4DDRB_SDM3
DDRB_SDM7
DDRB_SDM2
DDRB_SDQS0
DDRB_SDQS5DDRB_SDQS4DDRB_SDQS3
DDRB_SDQS7
DDRB_SDQS2
DDRB_SDQS6
DDRB_SDQS1
DDRB_SDQS5#
DDRB_SDQS0#
DDRB_SDQS4#DDRB_SDQS3#
DDRB_SDQS7#
DDRB_SDQS2#
DDRB_SDQS6#
DDRB_SDQS1#
DDRB_SMA3
DDRB_SMA7
DDRB_SMA0
DDRB_SMA2
DDRB_SMA10
DDRB_SMA1
DDRB_SMA6DDRB_SMA5
DDRB_SMA12DDRB_SMA11
DDRB_SMA4
DDRB_SMA8DDRB_SMA9
DDRB_SMA13
DDRB_SDQ[0..63]
DDRB_SMA[0..13]
DDRB_SDM[0..7]
DDRA_SBS2<13>
DDRA_SBS0<13>DDRA_SBS1<13>
DDRA_SCAS#<13>
DDRA_SDQS6<13>
DDRA_SDQS3<13>
DDRA_SDQS6#<13>
DDRA_SDQS3#<13>
DDRA_SDQS7#<13>
DDRA_SDQS5#<13>
DDRA_SDQS0#<13>
DDRA_SDQS4#<13>
DDRA_SDQS1#<13>DDRA_SDQS2#<13>
DDRA_SDQS7<13>
DDRA_SDQS5<13>
DDRA_SDQS0<13>
DDRA_SDQS4<13>
DDRA_SDQS1<13>DDRA_SDQS2<13>
DDRA_SWE#<13>DDRA_SRAS#<13>
DDRA_SDQ[0..63]<13>
DDRA_SMA[0..13]<13>
DDRA_SDM[0..7]<13>
DDRB_SBS2<14>
DDRB_SBS0<14>DDRB_SBS1<14>
DDRB_SCAS#<14>
DDRB_SDQS6<14>
DDRB_SDQS3<14>
DDRB_SDQS6#<14>
DDRB_SDQS3#<14>
DDRB_SDQS7#<14>
DDRB_SDQS5#<14>
DDRB_SDQS0#<14>
DDRB_SDQS4#<14>
DDRB_SDQS1#<14>DDRB_SDQS2#<14>
DDRB_SDQS7<14>
DDRB_SDQS5<14>
DDRB_SDQS0<14>
DDRB_SDQS4<14>
DDRB_SDQS1<14>DDRB_SDQS2<14>
DDRB_SWE#<14>DDRB_SRAS#<14>
DDRB_SDQ[0..63]<14>
DDRB_SMA[0..13]<14>
DDRB_SDM[0..7]<14>
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
Crestline (2/7)-DMI/DDRCustom
8 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
DDR SYS MEMORY A
U20D
CALISTOGA_FCBGA1466~DGM@
SA_DQ0 AJ35SA_DQ1 AJ34SA_DQ2 AM31SA_DQ3 AM33SA_DQ4 AJ36SA_DQ5 AK35SA_DQ6 AJ32SA_DQ7 AH31SA_DQ8 AN35SA_DQ9 AP33
SA_DQ10 AR31SA_DQ11 AP31SA_DQ12 AN38SA_DQ13 AM36SA_DQ14 AM34SA_DQ15 AN33SA_DQ16 AK26SA_DQ17 AL27SA_DQ18 AM26SA_DQ19 AN24SA_DQ20 AK28SA_DQ21 AL28SA_DQ22 AM24SA_DQ23 AP26SA_DQ24 AP23SA_DQ25 AL22SA_DQ26 AP21SA_DQ27 AN20SA_DQ28 AL23SA_DQ29 AP24SA_DQ30 AP20SA_DQ31 AT21SA_DQ32 AR12SA_DQ33 AR14SA_DQ34 AP13SA_DQ35 AP12SA_DQ36 AT13SA_DQ37 AT12SA_DQ38 AL14SA_DQ39 AL12SA_DQ40 AK9SA_DQ41 AN7SA_DQ42 AK8SA_DQ43 AK7SA_DQ44 AP9SA_DQ45 AN9SA_DQ46 AT5SA_DQ47 AL5SA_DQ48 AY2SA_DQ49 AW2SA_DQ50 AP1SA_DQ51 AN2SA_DQ52 AV2SA_DQ53 AT3SA_DQ54 AN1SA_DQ55 AL2SA_DQ56 AG7SA_DQ57 AF9SA_DQ58 AG4SA_DQ59 AF6SA_DQ60 AG9SA_DQ61 AH6SA_DQ62 AF4SA_DQ63 AF8
SA_BS0AU12SA_BS1AV14SA_BS2BA20
SA_CAS#AY13SA_RAS#AW14SA_WE#AY14SA_RCVENIN#AK23SA_RCVENOUT#AK24
SA_DM0AJ33SA_DM1AM35SA_DM2AL26SA_DM3AN22SA_DM4AM14SA_DM5AL9SA_DM6AR3SA_DM7AH4
SA_DQS0AK33SA_DQS1AT33SA_DQS2AN28SA_DQS3AM22SA_DQS4AN12SA_DQS5AN8SA_DQS6AP3SA_DQS7AG5
SA_DQS0#AK32SA_DQS1#AU33SA_DQS2#AN27SA_DQS3#AM21SA_DQS4#AM12SA_DQS5#AL8SA_DQS6#AN3SA_DQS7#AH5
SA_MA0AY16SA_MA1AU14SA_MA2AW16SA_MA3BA16SA_MA4BA17SA_MA5AU16SA_MA6AV17SA_MA7AU17SA_MA8AW17SA_MA9AT16SA_MA10AU13SA_MA11AT17SA_MA12AV20SA_MA13AV12
T12 PADT4 PADT6 PADT11 PAD
DDR SYS MEMORY B
U20E
CALISTOGA_FCBGA1466~DGM@
SB_DQ0 AK39SB_DQ1 AJ37SB_DQ2 AP39SB_DQ3 AR41SB_DQ4 AJ38SB_DQ5 AK38SB_DQ6 AN41SB_DQ7 AP41SB_DQ8 AT40SB_DQ9 AV41
SB_DQ10 AU38SB_DQ11 AV38SB_DQ12 AP38SB_DQ13 AR40SB_DQ14 AW38SB_DQ15 AY38SB_DQ16 BA38SB_DQ17 AV36SB_DQ18 AR36SB_DQ19 AP36SB_DQ20 BA36SB_DQ21 AU36SB_DQ22 AP35SB_DQ23 AP34SB_DQ24 AY33SB_DQ25 BA33SB_DQ26 AT31SB_DQ27 AU29SB_DQ28 AU31SB_DQ29 AW31SB_DQ30 AV29SB_DQ31 AW29SB_DQ32 AM19SB_DQ33 AL19SB_DQ34 AP14SB_DQ35 AN14SB_DQ36 AN17SB_DQ37 AM16SB_DQ38 AP15SB_DQ39 AL15SB_DQ40 AJ11SB_DQ41 AH10SB_DQ42 AJ9SB_DQ43 AN10SB_DQ44 AK13SB_DQ45 AH11SB_DQ46 AK10SB_DQ47 AJ8SB_DQ48 BA10SB_DQ49 AW10SB_DQ50 BA4SB_DQ51 AW4SB_DQ52 AY10SB_DQ53 AY9SB_DQ54 AW5SB_DQ55 AY5SB_DQ56 AV4SB_DQ57 AR5SB_DQ58 AK4SB_DQ59 AK3SB_DQ60 AT4SB_DQ61 AK5SB_DQ62 AJ5SB_DQ63 AJ3
SB_BS0AT24SB_BS1AV23SB_BS2AY28
SB_CAS#AR24SB_RAS#AU23SB_WE#AR27SB_RCVENIN#AK16SB_RCVENOUT#AK18
SB_DM0AK36SB_DM1AR38SB_DM2AT36SB_DM3BA31SB_DM4AL17SB_DM5AH8SB_DM6BA5SB_DM7AN4
SB_DQS0AM39SB_DQS1AT39SB_DQS2AU35SB_DQS3AR29SB_DQS4AR16SB_DQS5AR10SB_DQS6AR7SB_DQS7AN5
SB_DQS0#AM40SB_DQS1#AU39SB_DQS2#AT35SB_DQS3#AP29SB_DQS4#AP16SB_DQS5#AT10SB_DQS6#AT7SB_DQS7#AP5
SB_MA0AY23SB_MA1AW24SB_MA2AY24SB_MA3AR28SB_MA4AT27SB_MA5AT28SB_MA6AU27SB_MA7AV28SB_MA8AV27SB_MA9AW27SB_MA10AV24SB_MA11BA27SB_MA12AY27SB_MA13AR23
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
GMCH_CRT_G
GMCH_CRT_B
GMCH_CRT_R
GMCH_ENBKL
PEGCOMP
LVDS_A0
LVDS_A1#
LVDS_B1#
LVDS_A2#
LVDS_B2#
LVDS_A1
LVDS_B0
LVDS_A2
LVDS_B2
LVDS_B0#
LVDS_B1
LVDS_A0#
LVDS_BCLK#LVDS_BCLK
LVDS_ACLKLVDS_ACLK#
PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N10PCIE_GTX_C_MRX_N9
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N14
PCIE_GTX_C_MRX_N12PCIE_GTX_C_MRX_N13
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N7
PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_P9PCIE_GTX_C_MRX_P8
PCIE_GTX_C_MRX_P3
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_P2
PCIE_MTX_GRX_N2PCIE_MTX_GRX_N1PCIE_MTX_GRX_N0
PCIE_MTX_GRX_N4
PCIE_MTX_GRX_N7
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_N5
PCIE_MTX_GRX_N8PCIE_MTX_GRX_N9PCIE_MTX_GRX_N10
PCIE_MTX_GRX_N6
PCIE_MTX_GRX_N11PCIE_MTX_GRX_N12
PCIE_MTX_GRX_N15PCIE_MTX_GRX_N14PCIE_MTX_GRX_N13
PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N1PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N9
PCIE_MTX_C_GRX_N5
PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N12
PCIE_MTX_C_GRX_N14
PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N15
PCIE_MTX_C_GRX_N13
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_P7
PCIE_MTX_GRX_P2PCIE_MTX_GRX_P3
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_P4PCIE_MTX_GRX_P5
PCIE_MTX_GRX_P8
PCIE_MTX_GRX_P11PCIE_MTX_GRX_P10PCIE_MTX_GRX_P9
PCIE_MTX_GRX_P6
PCIE_MTX_GRX_P15PCIE_MTX_GRX_P14PCIE_MTX_GRX_P13PCIE_MTX_GRX_P12
PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_P1PCIE_MTX_C_GRX_P2
PCIE_MTX_C_GRX_P5PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_P3
PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P6
PCIE_MTX_C_GRX_P10PCIE_MTX_C_GRX_P11
PCIE_MTX_C_GRX_P8
PCIE_MTX_C_GRX_P12PCIE_MTX_C_GRX_P13PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
GMCH_ENBKL<17>
GMCH_ENVDD<17>
LVDS_B0#<17>LVDS_B1#<17>LVDS_B2#<17>
LVDS_B0<17>LVDS_B1<17>LVDS_B2<17>
LVDS_A0#<17>LVDS_A1#<17>LVDS_A2#<17>
LVDS_A0<17>LVDS_A1<17>LVDS_A2<17>
LVDS_BCLK#<17>LVDS_BCLK<17>LVDS_ACLK#<17>LVDS_ACLK<17>
LVDS_SCL<17>
GMCH_CRT_G<18>
GMCH_CRT_B<18>
GMCH_CRT_R<18>
GMCH_CRT_VSYNC<18>GMCH_CRT_HSYNC<18>
GMCH_CRT_CLK<18>GMCH_CRT_DATA<18>
PCIE_MTX_C_GRX_N[0..15] <16>
PCIE_GTX_C_MRX_P[0..15] <16>
PCIE_GTX_C_MRX_N[0..15] <16>
PCIE_MTX_C_GRX_P[0..15] <16>
LVDS_SDA<17>
+1.5VS_PCIE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
Crestline (3/7)-DDRIIB
9 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
C144 0.1U_0402_10V7KPM@1 2
R11324.9_0402_1%
1 2
C173 0.1U_0402_10V7KPM@1 2
C464 0.1U_0402_10V7KPM@1 2
C155 0.1U_0402_10V7KPM@1 2C426 0.1U_0402_10V7KPM@1 2
C465 0.1U_0402_10V7KPM@1 2
C177 0.1U_0402_10V7KPM@1 2
C162 0.1U_0402_10V7KPM@1 2
R104 1.5K_0402_1% 12
C178 0.1U_0402_10V7KPM@1 2
C142 0.1U_0402_10V7KPM@1 2
R122255_0402_1%
12
LVD
ST
VC
RT
PCI-EXPRESS GRAPHICS
U20C
CALISTOGA_FCBGA1466~DGM@
SDVOCTRL_CLKH28 SDVOCTRL_DATAH27
LA_DATA0B37LA_DATA1B34LA_DATA2A36
LVREFHC33LVREFLC32
TVDAC_AA16TVDAC_BC18TVDAC_CA19
TV_IREFJ20
TV_IRTNAB16TV_IRTNBB18TV_IRTNCB19
DDCCLKC26DDCDATAC25
LA_DATA#0C37LA_DATA#1B35LA_DATA#2A37
LB_DATA0F30LB_DATA1D29LB_DATA2F28
LB_DATA#0G30LB_DATA#1D30LB_DATA#2F29
LA_CLKA32LA_CLK#A33LB_CLKE26LB_CLK#E27
LBKLT_CTLD32LBKLT_ENJ30LCTLA_CLKH30LCTLB_DATAH29LDDC_CLKG26LDDC_DATAG25LVDD_ENF32LIBGB38LVBGC35
VSYNCH23HSYNCG23BLUEE23BLUE#D23GREENC22GREEN#B22REDA21RED#B21
CRT_IREFJ22
EXP_COMPI D40EXP_COMPO D38
EXP_RXN0 F34EXP_RXN1 G38EXP_RXN2 H34EXP_RXN3 J38EXP_RXN4 L34EXP_RXN5 M38EXP_RXN6 N34EXP_RXN7 P38EXP_RXN8 R34EXP_RXN9 T38
EXP_RXN10 V34EXP_RXN11 W38EXP_RXN12 Y34EXP_RXN13 AA38EXP_RXN14 AB34EXP_RXN15 AC38
EXP_RXP0 D34EXP_RXP1 F38EXP_RXP2 G34EXP_RXP3 H38EXP_RXP4 J34EXP_RXP5 L38EXP_RXP6 M34EXP_RXP7 N38EXP_RXP8 P34EXP_RXP9 R38
EXP_RXP10 T34EXP_RXP11 V38EXP_RXP12 W34EXP_RXP13 Y38EXP_RXP14 AA34EXP_RXP15 AB38
EXP_TXN0 F36EXP_TXN1 G40EXP_TXN2 H36EXP_TXN3 J40EXP_TXN4 L36EXP_TXN5 M40EXP_TXN6 N36EXP_TXN7 P40EXP_TXN8 R36EXP_TXN9 T40
EXP_TXN10 V36EXP_TXN11 W40EXP_TXN12 Y36EXP_TXN13 AA40EXP_TXN14 AB36EXP_TXN15 AC40
EXP_TXP0 D36EXP_TXP1 F40EXP_TXP2 G36EXP_TXP3 H40EXP_TXP4 J36EXP_TXP5 L40EXP_TXP6 M36EXP_TXP7 N40EXP_TXP8 P36EXP_TXP9 R40
EXP_TXP10 T36EXP_TXP11 V40EXP_TXP12 W36EXP_TXP13 Y40EXP_TXP14 AA36EXP_TXP15 AB40
TV_DCONSEL1J29TV_DCONSEL0K30
C437 0.1U_0402_10V7KPM@1 2
R397 150_0402_1%GM@ 12
C441 0.1U_0402_10V7KPM@1 2
C149 0.1U_0402_10V7KPM@1 2
C129 0.1U_0402_10V7KPM@1 2
C175 0.1U_0402_10V7KPM@1 2
C408 0.1U_0402_10V7KPM@1 2
C423 0.1U_0402_10V7KPM@1 2
C166 0.1U_0402_10V7KPM@1 2
C419 0.1U_0402_10V7KPM@1 2
C429 0.1U_0402_10V7KPM@1 2
C406 0.1U_0402_10V7KPM@1 2
C448 0.1U_0402_10V7KPM@1 2
C404 0.1U_0402_10V7KPM@1 2
C133 0.1U_0402_10V7KPM@1 2
C440 0.1U_0402_10V7KPM@1 2
C405 0.1U_0402_10V7KPM@1 2
C411 0.1U_0402_10V7KPM@1 2
C172 0.1U_0402_10V7KPM@1 2
C161 0.1U_0402_10V7KPM@1 2
R1144.99K_0402_1%
12
R524 150_0402_1%GM@ 12
C167 0.1U_0402_10V7KPM@1 2
C170 0.1U_0402_10V7KPM@1 2
C407 0.1U_0402_10V7KPM@1 2
R526 150_0402_1%GM@ 12
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCH_D2
MCH_A6
MC
H_A
B1
+2.5VS_CRTDAC
+1.5VS
+2.5VS+1.5VS_PCIE
+1.5VS
+1.5VS+1.5VS_3GPLL
+1.5VS_DPLLB+1.5VS_DPLLA
+1.5VS_HPLL
+3VS
+2.5VS
+3VS_TVBG
+1.5VS_MPLL
+1.5VS
+3VS_TVDACA
+1.5VS_3GPLL
+1.5VS
+VCCP
+1.5VS_MPLL +1.5VS_HPLL
+1.5VS+1.5VS
+2.5VS
+2.5VS
+1.5VS_TVDAC
+1.5VS_TVDAC +1.5VS
+2.5VS
+3VS+3VS_TVDACA+3VS_TVDACA+3VS_TVDACA
+3VS_TVDACA
+3VS_TVDACA
+3VS+3VS_TVBG
+2.5VS
+1.5VS_DPLLA +1.5VS_DPLLB
+1.5VS+1.5VS
+2.5VS
+VCCP
+2.5VS
+3VS
+1.5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
Crestline (4/7)-VGA/LVDS/TVCustom
10 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
W=40 mils
CRTDAC: Route caps within250mil of Alviso. Route FBwithin 3" of Calistoga
PCI-E/MEM/PSB PLL decoupling
45mA Max. 45mA Max.
close pin A38
close pin G41
R850_0603_5%
12
C16
30.
22U
_060
3_10
V7K
1
2
C44
20.
022U
_040
2_16
V7K
1
2
+
C60
422
0U_B
2_2.
5VM
_R35
1
2
+
C145
330U_D
2E_2.5VM
GM
@
1
2
C431
0.1U_0402_16V4Z
1
2
C14
00.
1U_0
402_
16V4
Z
1
2
C39
70.
01U
_040
2_16
V7K
1
2
C40
20.
1U_0
402_
16V4
Z
@
1
2
R530
10_0402_5%@
12
P O W E R
U20H
CALISTOGA_FCBGA1466~DGM@
VCC_SYNC H22
VCCTX_LVDS0 B30VCCTX_LVDS1 C30
VCC3G0 AB41VCC3G1 AJ41VCC3G2 L41VCC3G3 N41VCC3G4 R41VCC3G5 V41VCC3G6 Y41
VCCA_3GBG G41VSSA_3GBG H41
VCCA_3GPLL AC33
VCCTX_LVDS2 A30
VCCA_LVDS A38VSSA_LVDS B39
VCCA_MPLL AF2
VCCA_TVBG H20VSSA_TVBG G20
VCCA_TVDACA0 E19VCCA_TVDACA1 F19VCCA_TVDACB0 C20VCCA_TVDACB1 D20VCCA_TVDACC0 E20VCCA_TVDACC1 F20
VCCAUX1 AF31VCCAUX2 AE31VCCAUX3 AC31VCCAUX4 AL30VCCAUX5 AK30VCCAUX6 AJ30VCCAUX7 AH30VCCAUX8 AG30VCCAUX9 AF30
VCCAUX10 AE30VCCAUX11 AD30VCCAUX12 AC30VCCAUX13 AG29VCCAUX14 AF29VCCAUX15 AE29VCCAUX16 AD29VCCAUX17 AC29VCCAUX18 AG28VCCAUX19 AF28VCCAUX20 AE28
VTT0AC14VTT1AB14VTT2W14VTT3V14VTT4T14VTT5R14VTT6P14VTT7N14VTT8M14VTT9L14VTT10AD13VTT11AC13VTT12AB13VTT13AA13VTT14Y13VTT15W13VTT16V13VTT17U13VTT18T13VTT19R13VTT20N13VTT21M13VTT22L13VTT23AB12VTT24AA12VTT25Y12VTT26W12VTT27V12VTT28U12VTT29T12VTT30R12VTT31P12VTT32N12VTT33M12VTT34L12VTT35R11VTT36P11VTT37N11VTT38M11VTT39R10VTT40P10VTT41N10VTT42M10VTT43P9VTT44N9VTT45M9VTT46R8VTT47P8VTT48N8VTT49M8VTT50P7VTT51N7VTT52M7VTT53R6VTT54P6VTT55M6VTT56A6VTT57R5
VTT59N5VTT60M5VTT61P4VTT62N4VTT63M4VTT64R3VTT65P3VTT66N3VTT67M3VTT68R2VTT69P2VTT70M2VTT71D2VTT72AB1VTT73R1VTT74P1VTT75N1VTT76M1
VCCA_CRTDAC0 E21VCCA_CRTDAC1 F21VSSA_CRTDAC2 G21
VCCA_DPLLA B26VCCA_DPLLB C39
VCCA_HPLL AF1
VCCD_HMPLL0 AH1VCCD_HMPLL1 AH2
VCCD_LVDS0 A28VCCD_LVDS1 B28VCCD_LVDS2 C28
VCCD_TVDAC D21VCCDQ_TVDAC H19
VCCHV0 A23VCCHV1 B23 VCCHV2 B25
VCCAUX21 AH22VCCAUX22 AJ21VCCAUX23 AH21VCCAUX24 AJ20VCCAUX25 AH20VCCAUX26 AH19VCCAUX27 P19VCCAUX28 P16VCCAUX29 AH15VCCAUX30 P15VCCAUX31 AH14
VCCAUX32AG14VCCAUX33AF14VCCAUX34AE14VCCAUX35Y14VCCAUX36AF13VCCAUX37AE13VCCAUX38AF12VCCAUX39AE12VCCAUX40AD12
VCCAUX0 AK31
VTT58P5
C41
00.
1U_0
402_
16V4
Z
@
1
2
C12
60.
1U_0
402_
16V4
Z
1
2
R528
0_0603_5%
12
C14
30.
1U_0
402_
16V4
Z
1
2
R529
10_0805_1%
12
R531
10_0402_5%@
12
D19
RB751V-40TE17_SOD323-2
@
12
C60
60.
022U
_040
2_16
V7K
1
2
C15
4
0.1U
_040
2_16
V4Z
1
2 C15
7
10U
_120
6_6.
3V6M
1
2
C60
20.
47U
_060
3_10
V7K
1
2
C124
0.1U_0402_16V4Z
1
2
R878
10_0603_5%
12
C42
20.
1U_0
402_
16V4
Z 1
2
L43
FBM-L10-160808-301-T_06031 2
C39
40.
1U_0
402_
16V4
Z
1
2
D21
RB751V-40TE17_SOD323-2
@
12
C42
7
10U
_120
6_6.
3V6M
1
2
C43
20.
1U_0
402_
16V4
Z
1
2
C13
4
10U
_120
6_6.
3V6M
1
2
C61
9 10U
_080
5_6.
3V6M
1
2
R170_0603_5%
12
C16
50.
22U
_060
3_10
V7K
1
2
C60
5
10U
_120
6_6.
3V6M
1
2
C16
84.
7U_0
805_
10V4
Z
1
2
C60
80.
1U_0
402_
16V4
Z
1
2
C13
00.
1U_0
402_
16V4
Z
1
2
C3960.1U_0402_16V4Z
1 2
C15
30.
1U_0
402_
16V4
Z
1
2
C60
70.
022U
_040
2_16
V7K
1
2
C42
50.
1U_0
402_
16V4
Z
1
2
R870_0603_5%
12
R860_0805_5%
12
C60
310
U_1
206_
6.3V
6M
1
2
C60
00.
47U
_060
3_10
V7K
1
2
R5270_0603_5%
12
+C438
220U
_B2_
2.5V
M_R
35
1
2
+
C417
330U_D
2E_2.5VM
GM
@
1
2
C14
80.
022U
_040
2_16
V7K
1
2
C42
410
U_1
206_
6.3V
6M
1
2
C12
12.
2U_0
805_
16V4
Z
1
2
C40
00.
022U
_040
2_16
V7K
1
2
C60
1
0.1U
_040
2_16
V4Z
1
2
C43
00.
1U_0
402_
16V4
Z
1
2L42
FBM-L10-160808-301-T_06031 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCH_AM41MCH_AT41
CFG18<7>
CFG13<7>
CFG19<7>
CFG16<7>
CFG9<7>
CFG20<7>
CFG11<7>
CFG12<7>
CFG5<7>
CFG7<7>
+VCCP+1.5VS+VCCP
+1.8V+VCCP
+1.8V
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
Crestline (5/7)-VCCCustom
11 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
CFG6
PSB 4X CLK Enable 1 = Calistoga
0 = Reserved
*
CFG[13:12]
1 = PCIE/SDVO are operatingsimu.
CFG7
CFG19
(Default)
CFG20
0 = DMI x 2
CFG10 CFG18
CFG[19:18] have internal pull down
*
Strap Pin Table
*
10 = All Z Mode Enabled
0 = Reserved
(Default)
1 = Normal Operation
CFG5
SDVO_CTRLDATA
*
1 = DMI Lane Reversal Enable
(Default)
*
1 = Dynamic ODT Enabled (Default)
*
(Default)
00 = Reserved
01 = 1.5V
*
*
1 = DMI x 4
CFG[3:17] have internal pull up
0 = No SDVO Device Present
(Default)
*
*
(Default)
(Default)
0 = Normal Operation
(Default)
0 = Only PCIE or SDVO isoperational.
0 = Dynamic ODT Disabled
(PCIE/SDVO select)
01 = XOR Mode Enabled
001 = 533MT/s FSB
CFG16
10 = 1.05V
011 = 667MT/s FSB
0 = Lane Reversal Enable CFG9
1 = SDVO Device Present
CFG[2:0]
1 = Mobile Yonah CPU
11 = Normal Operation
Place near pin BA15
Place near pin BA23
Place near pin AT41 & AM41
Place near pin AV1 & AJ1
R110 2.2K_0402_5%@1 2
R88 2.2K_0402_5%@1 2
C13
8
0.1U
_040
2_16
V4Z
1
2
+
C15
0
220U
_B2_
2.5V
M_R
35
1
2R124 2.2K_0402_5%@1 2
C11
2
0.1U
_040
2_16
V4Z
1
2
C11
50.
22U
_060
3_10
V7K
1
2
C13
610
U_1
206_
6.3V
6M
1
2
C12
210
U_1
206_
6.3V
6M
1
2
C14
70.
47U
_060
3_10
V7K
1
2
C11
410
U_1
206_
6.3V
6M
1
2
R125 2.2K_0402_5%@1 2
C15
80.
47U
_060
3_10
V7K
1
2
C15
90.
22U
_060
3_10
V7K
1
2
R109 2.2K_0402_5%@ 1 2
C16
40.
47U
_060
3_10
V7K
1
2
C12
80.
47U
_060
3_10
V7K
1
2
P O W E R
U20G
CALISTOGA_FCBGA1466~DGM@
VCC0AA33VCC1W33VCC2P33VCC3N33VCC4L33VCC5J33VCC6AA32VCC7Y32VCC8W32VCC9V32VCC10P32VCC11N32VCC12M32VCC13L32VCC14J32VCC15AA31VCC16W31VCC17V31VCC18T31VCC19R31VCC20P31VCC21N31VCC22M31VCC23AA30VCC24Y30VCC25W30VCC26V30VCC27U30VCC28T30VCC29R30VCC30P30VCC31N30VCC32M30VCC33L30VCC34AA29VCC35Y29VCC36W29VCC37V29VCC38U29VCC39R29VCC40P29VCC41M29VCC42L29VCC43AB28VCC44AA28VCC45Y28
VCC_SM5 AY34VCC_SM6 AW34VCC_SM7 AV34VCC_SM8 AU34VCC_SM9 AT34
VCC_SM10 AR34VCC_SM11 BA30VCC_SM12 AY30VCC_SM13 AW30VCC_SM14 AV30VCC_SM15 AU30VCC_SM16 AT30VCC_SM17 AR30VCC_SM18 AP30VCC_SM19 AN30VCC_SM20 AM30VCC_SM21 AM29VCC_SM22 AL29VCC_SM23 AK29VCC_SM24 AJ29VCC_SM25 AH29VCC_SM26 AJ28VCC_SM27 AH28VCC_SM28 AJ27VCC_SM29 AH27VCC_SM30 BA26VCC_SM31 AY26VCC_SM32 AW26VCC_SM33 AV26VCC_SM34 AU26VCC_SM35 AT26VCC_SM36 AR26VCC_SM37 AJ26VCC_SM38 AH26VCC_SM39 AJ25VCC_SM40 AH25VCC_SM41 AJ24VCC_SM42 AH24VCC_SM43 BA23VCC_SM44 AJ23VCC_SM45 BA22VCC_SM46 AY22VCC_SM47 AW22VCC_SM48 AV22VCC_SM49 AU22VCC_SM50 AT22VCC_SM51 AR22VCC_SM52 AP22VCC_SM53 AK22VCC_SM54 AJ22VCC_SM55 AK21VCC_SM56 AK20VCC_SM57 BA19VCC_SM58 AY19VCC_SM59 AW19VCC_SM60 AV19VCC_SM61 AU19VCC_SM62 AT19VCC_SM63 AR19VCC_SM64 AP19VCC_SM65 AK19VCC_SM66 AJ19VCC_SM67 AJ18VCC_SM68 AJ17VCC_SM69 AH17VCC_SM70 AJ16VCC_SM71 AH16VCC_SM72 BA15
VCC_SM3 AU40VCC_SM4 BA34
VCC_SM73 AY15VCC_SM74 AW15VCC_SM75 AV15VCC_SM76 AU15VCC_SM77 AT15VCC_SM78 AR15VCC_SM79 AJ15VCC_SM80 AJ14VCC_SM81 AJ13VCC_SM82 AH13VCC_SM83 AK12VCC_SM84 AJ12VCC_SM85 AH12VCC_SM86 AG12VCC_SM87 AK11VCC_SM88 BA8VCC_SM89 AY8VCC_SM90 AW8VCC_SM91 AV8VCC_SM92 AT8VCC_SM93 AR8VCC_SM94 AP8VCC_SM95 BA6VCC_SM96 AY6VCC_SM97 AW6VCC_SM98 AV6VCC_SM99 AT6
VCC_SM1 AT41VCC_SM0 AU41
VCC_SM2 AM41
VCC46V28VCC47U28VCC48T28VCC49R28VCC50P28VCC51N28VCC52M28VCC53L28VCC54P27VCC55N27VCC56M27VCC57L27VCC58P26VCC59N26VCC60L26VCC61N25VCC62M25VCC63L25VCC64P24VCC65N24VCC66M24VCC67AB23VCC68AA23VCC69Y23VCC70P23VCC71N23VCC72M23VCC73L23VCC74AC22VCC75AB22VCC76Y22VCC77W22VCC78P22VCC79N22VCC80M22VCC81L22VCC82AC21VCC83AA21VCC84W21VCC85N21VCC86M21VCC87L21VCC88AC20VCC89AB20VCC90Y20VCC91W20VCC92P20VCC93N20VCC94M20VCC95L20VCC96AB19VCC97AA19VCC98Y19VCC99N19
R126 1K_0402_5%@1 2
R123 2.2K_0402_5%@1 2
C11
91U
_060
3_10
V4Z
1
2
C14
10.
47U
_060
3_10
V7K
1
2
R108 2.2K_0402_5%@1 2
C14
6
0.1U
_040
2_16
V4Z
1
2
R130 1K_0402_5%@1 2
C13
90.
47U
_060
3_10
V7K
1
2
C13
710
U_1
206_
6.3V
6M
1
2
R131 1K_0402_5%@ 1 2
C11
8
0.1U
_040
2_16
V4Z
1
2
C12
70.
22U
_060
3_10
V7K
1
2
P O
W E
R
U20F
CALISTOGA_FCBGA1466~DGM@
VCC_NCTF1AC27VCC_NCTF2AB27VCC_NCTF3AA27VCC_NCTF4Y27VCC_NCTF5W27VCC_NCTF6V27VCC_NCTF7U27
VCCAUX_NCTF52 Y15
VCC_NCTF9R27VCC_NCTF10AD26VCC_NCTF11AC26VCC_NCTF12AB26VCC_NCTF13AA26VCC_NCTF14Y26VCC_NCTF15W26VCC_NCTF16V26VCC_NCTF17U26VCC_NCTF18T26VCC_NCTF19R26VCC_NCTF20AD25VCC_NCTF21AC25VCC_NCTF22AB25VCC_NCTF23AA25VCC_NCTF24Y25VCC_NCTF25W25
VCCAUX_NCTF53 W15
VCC_NCTF27U25VCC_NCTF28T25VCC_NCTF29R25VCC_NCTF30AD24VCC_NCTF31AC24VCC_NCTF32AB24VCC_NCTF33AA24VCC_NCTF34Y24VCC_NCTF35W24VCC_NCTF36V24
VCCAUX_NCTF54 V15
VCC_NCTF38T24VCC_NCTF39R24VCC_NCTF40AD23VCC_NCTF41V23VCC_NCTF42U23VCC_NCTF43T23VCC_NCTF44R23VCC_NCTF45AD22VCC_NCTF46V22VCC_NCTF47U22VCC_NCTF48T22VCC_NCTF49R22VCC_NCTF50AD21VCC_NCTF51V21VCC_NCTF52U21VCC_NCTF53T21VCC_NCTF54R21VCC_NCTF55AD20VCC_NCTF56V20VCC_NCTF57U20VCC_NCTF58T20
VCCAUX_NCTF55 U15
VCC_NCTF60AD19VCC_NCTF61V19VCC_NCTF62U19VCC_NCTF63T19VCC_NCTF64AD18VCC_NCTF65AC18VCC_NCTF66AB18VCC_NCTF67AA18VCC_NCTF68Y18VCC_NCTF69W18VCC_NCTF70V18VCC_NCTF71U18VCC_NCTF72T18
VCC_NCTF0AD27 VCCAUX_NCTF0 AG27VCCAUX_NCTF1 AF27VCCAUX_NCTF2 AG26VCCAUX_NCTF3 AF26VCCAUX_NCTF4 AG25VCCAUX_NCTF5 AF25VCCAUX_NCTF6 AG24VCCAUX_NCTF7 AF24VCCAUX_NCTF8 AG23VCCAUX_NCTF9 AF23
VCCAUX_NCTF10 AG22VCCAUX_NCTF11 AF22VCCAUX_NCTF12 AG21VCCAUX_NCTF13 AF21VCCAUX_NCTF14 AG20VCCAUX_NCTF15 AF20VCCAUX_NCTF16 AG19VCCAUX_NCTF17 AF19VCCAUX_NCTF18 R19VCCAUX_NCTF19 AG18VCCAUX_NCTF20 AF18VCCAUX_NCTF21 R18VCCAUX_NCTF22 AG17VCCAUX_NCTF23 AF17VCCAUX_NCTF24 AE17VCCAUX_NCTF25 AD17VCCAUX_NCTF26 AB17VCCAUX_NCTF27 AA17VCCAUX_NCTF28 W17VCCAUX_NCTF29 V17VCCAUX_NCTF30 T17VCCAUX_NCTF31 R17VCCAUX_NCTF32 AG16VCCAUX_NCTF33 AF16VCCAUX_NCTF34 AE16VCCAUX_NCTF35 AD16VCCAUX_NCTF36 AC16VCCAUX_NCTF37 AB16VCCAUX_NCTF38 AA16VCCAUX_NCTF39 Y16VCCAUX_NCTF40 W16VCCAUX_NCTF41 V16VCCAUX_NCTF42 U16VCCAUX_NCTF43 T16VCCAUX_NCTF44 R16VCCAUX_NCTF45 AG15VCCAUX_NCTF46 AF15VCCAUX_NCTF47 AE15VCCAUX_NCTF48 AD15VCCAUX_NCTF49 AC15VCCAUX_NCTF50 AB15
VSS_NCTF0 AE27
VCCAUX_NCTF51 AA15
VSS_NCTF1 AE26
VCC_NCTF59R20
VCCAUX_NCTF56 T15
VSS_NCTF2 AE25VSS_NCTF3 AE24VSS_NCTF4 AE23VSS_NCTF5 AE22VSS_NCTF6 AE21VSS_NCTF7 AE20VSS_NCTF8 AE19VSS_NCTF9 AE18
VSS_NCTF10 AC17VSS_NCTF11 Y17VSS_NCTF12 U17
VCC_NCTF26V25
VCCAUX_NCTF57 R15
VCC_NCTF37U24
VCC_NCTF8T27
VCC100M19VCC101L19VCC102N18VCC103M18VCC104L18VCC105P17VCC106N17VCC107M17VCC108N16VCC109M16VCC110L16
VCC_SM100 AR6VCC_SM101 AP6VCC_SM102 AN6VCC_SM103 AL6VCC_SM104 AK6VCC_SM105 AJ6VCC_SM106 AV1VCC_SM107 AJ1
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
Crestline (6/7)-VCCB
12 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
P O W E R
U20I
CALISTOGA_FCBGA1466~DGM@
VSS0AC41VSS1AA41VSS2W41VSS3T41VSS4P41VSS5M41VSS6J41VSS7F41VSS8AV40VSS9AP40VSS10AN40VSS11AK40
VSS13AH40VSS14AG40VSS15AF40VSS16AE40VSS17B40VSS18AY39VSS19AW39
VSS21AR39VSS22AN39
VSS24AC39VSS25AB39VSS26AA39VSS27Y39VSS28W39VSS29V39VSS30T39VSS31R39VSS32P39VSS33N39VSS34M39VSS35L39VSS36J39VSS37H39
VSS20AV39
VSS23AJ39
VSS12AJ40
VSS38G39
VSS40D39VSS41AT38VSS42AM38VSS43AH38VSS44AG38VSS45AF38VSS46AE38VSS47C38VSS48AK37VSS49AH37VSS50AB37VSS51AA37VSS52Y37VSS53W37VSS54V37VSS55T37VSS56R37VSS57P37VSS58N37VSS59M37VSS60L37VSS61J37VSS62H37VSS63G37VSS64F37VSS65D37VSS66AY36VSS67AW36VSS68AN36VSS69AH36VSS70AG36VSS71AF36VSS72AE36VSS73AC36VSS74C36VSS75B36VSS76BA35VSS77AV35VSS78AR35VSS79AH35VSS80AB35VSS81AA35VSS82Y35VSS83W35VSS84V35VSS85T35VSS86R35VSS87P35VSS88N35VSS89M35VSS90L35VSS91J35VSS92H35VSS93G35VSS94F35VSS95D35VSS96AN34VSS97AK34VSS98AG34VSS99AF34
VSS39F39
VSS100 AE34VSS101 AC34VSS102 C34VSS103 AW33VSS104 AV33VSS105 AR33VSS106 AE33VSS107 AB33VSS108 Y33VSS109 V33VSS110 T33VSS111 R33VSS112 M33VSS113 H33VSS114 G33VSS115 F33VSS116 D33VSS117 B33VSS118 AH32VSS119 AG32VSS120 AF32VSS121 AE32VSS122 AC32VSS123 AB32VSS124 G32VSS125 B32VSS126 AY31VSS127 AV31VSS128 AN31VSS129 AJ31VSS130 AG31VSS131 AB31VSS132 Y31VSS133 AB30VSS134 E30VSS135 AT29VSS136 AN29VSS137 AB29VSS138 T29VSS139 N29VSS140 K29VSS141 G29VSS142 E29VSS143 C29VSS144 B29VSS145 A29VSS146 BA28VSS147 AW28VSS148 AU28VSS149 AP28VSS150 AM28VSS151 AD28VSS152 AC28VSS153 W28VSS154 J28VSS155 E28VSS156 AP27VSS157 AM27VSS158 AK27VSS159 J27VSS160 G27VSS161 F27VSS162 C27VSS163 B27VSS164 AN26VSS165 M26VSS166 K26VSS167 F26VSS168 D26VSS169 AK25VSS170 P25VSS171 K25VSS172 H25VSS173 E25VSS174 D25VSS175 A25VSS176 BA24VSS177 AU24VSS178 AL24VSS179 AW23VSS180 AT23VSS181 AN23VSS182 AM23VSS183 AH23VSS184 AC23VSS185 W23VSS186 K23VSS187 J23VSS188 F23VSS189 C23VSS190 AA22VSS191 K22VSS192 G22VSS193 F22VSS194 E22VSS195 D22VSS196 A22VSS197 BA21VSS198 AV21VSS199 AR21
P O W E R
U20J
CALISTOGA_FCBGA1466~DGM@
VSS200AN21VSS201AL21VSS202AB21VSS203Y21VSS204P21VSS205K21VSS206J21VSS207H21VSS208C21VSS209AW20VSS210AR20VSS211AM20VSS212AA20VSS213K20VSS214B20VSS215A20VSS216AN19VSS217AC19VSS218W19VSS219K19VSS220G19VSS221C19VSS222AH18VSS223P18VSS224H18VSS225D18VSS226A18VSS227AY17VSS228AR17VSS229AP17VSS230AM17VSS231AK17VSS232AV16VSS233AN16VSS234AL16VSS235J16VSS236F16VSS237C16VSS238AN15VSS239AM15VSS240AK15VSS241N15VSS242M15VSS243L15VSS244B15VSS245A15VSS246BA14VSS247AT14VSS248AK14VSS249AD14VSS250AA14VSS251U14VSS252K14VSS253H14VSS254E14VSS255AV13VSS256AR13VSS257AN13VSS258AM13VSS259AL13VSS260AG13VSS261P13VSS262F13
VSS266AC12VSS267K12VSS268H12VSS269E12VSS270AD11VSS271AA11VSS272Y11VSS273J11VSS274D11VSS275B11VSS276AV10VSS277AP10VSS278AL10VSS279AJ10
VSS265D13VSS264B13VSS263AY12
VSS285 AW9VSS286 AR9VSS287 AH9VSS288 AB9VSS289 Y9VSS290 R9VSS292 G9VSS291 E9VSS293 A9VSS294 AG8VSS295 AD8VSS296 AA8VSS297 U8VSS298 K8VSS299 C8VSS300 BA7VSS301 AV7VSS302 AP7VSS303 AL7VSS304 AJ7VSS305 AH7VSS306 AF7VSS307 AC7VSS308 R7VSS309 G7VSS310 D7VSS311 AG6VSS312 AD6VSS313 AB6VSS314 Y6
VSS317 K6VSS318 H6VSS319 B6VSS320 AV5VSS321 AF5VSS322 AD5VSS323 AY4VSS324 AR4VSS325 AP4VSS326 AL4VSS327 AJ4VSS328 Y4VSS329 U4VSS330 R4VSS331 J4VSS332 F4VSS333 C4VSS334 AY3VSS335 AW3VSS336 AV3VSS337 AL3
VSS341 AD3
VSS345 AT2VSS346 AR2VSS347 AP2VSS348 AK2
VSS351 AB2VSS352 Y2VSS353 U2VSS354 T2VSS355 N2VSS356 J2VSS357 H2
VSS359 C2VSS360 AL1
VSS358 F2
VSS349 AJ2VSS350 AD2
VSS344 G3VSS343 AA3VSS342 AC3
VSS340 AF3
VSS338 AH3
VSS280 AG10VSS281 AC10VSS282 W10VSS283 U10VSS284 BA9
VSS315 U6VSS316 N6
VSS339 AG3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDRA_SMA[0..13]
DDRA_SDM[0..7]
DDRA_SDQ[0..63]
DDRA_SMA3
DDRA_SMA2
DDRA_SMA6
DDRA_SMA10
DDRA_SMA12
DDRA_SMA8
DDRA_SMA11
DDRA_SBS1
DDRA_SWE#
DDRA_SMA13DDRA_ODT0
DDRA_CKE0
DDRA_SCS1#
DDRA_SCS0#
EC_RX_P80_CLK
DDRA_SDM5
DDRA_SMA10
DDRA_SDQ8
DDRA_SDQ55
DDRA_SDM6
DDRA_SDQ29
DDRA_SDQ12
DDRA_SDQ4
DDRA_SDM7
DDRA_SDQ48
DDRA_SDQS4
DDRA_SBS0
DDRA_SMA3
DDRA_SDQ0
DDRA_SDQ39
DDRA_SDQ32
DDRA_SMA12
DDRA_SDQS2#
DDRA_SDQS0#
DDRA_SDQ58
DDRA_SDQ56
DDRA_SDQ33
DDRA_SCS1#
DDRA_SMA5
DDRA_SDQ19
DDRA_SDQ62
DDRA_SDQ54
DDRA_SDM4
DDRA_SDQ21
DDRA_SDQ15
DDRA_SDQ57
EC_RX_P80_CLK_R
DDRA_SMA1
DDRA_SDQ53
DDRA_SDQ14
DDRA_SDM0
DDRA_SDQ5
DDRA_SDQ59
DDRA_SDQS4#
DDRA_SMA8
DDRA_SDQ25
DDRA_SDQ38
DDRA_SDQ31
DDRA_SDQ28
DDRA_SDM2
DDRA_SDQ7
DDRA_SDQ49
DDRA_SDQS0
DDRA_SDQ1
DDRA_SDQS7
DDRA_SCS0#
D_CK_SDATADDRA_SDQ63
DDRA_SDQ61
DDRA_SMA6
DDRA_SDQ6
D_CK_SCLK
DDRA_SDQS6#
DDRA_SDQ43
EC_RX_P80_CLK
DDRA_SDQ27
DDRA_SDQS1
DDRA_SDQ9
DDRA_SDQ60
DDRA_SDQ52
DDRA_ODT0
DDRA_SDQ23
DDRA_SDQ3
DDRA_SDQ37
DDRA_SMA13
DDRA_SDQ30
DDRA_SDQS3#
DDRA_SDQ40
DDRA_SDQ16
DDRA_SDQ2
DDRA_SDQS5
DDRA_SMA11
DDRA_SWE#
DDRA_SMA9
DDRA_SDQ17
DDRA_SDQ10
DDRA_SDQ46
DDRA_SDQ45
DDRA_SRAS#
DDRA_SMA0
DDRA_SDQS3
DDRA_SDQ20
DDRA_SDQ13
DDRA_SDQ42
DDRA_SDQ35
DDRA_SBS2
DDRA_SDQS1#
DDRA_SDQ22
DDRA_ODT1
DDRA_SDQS5#
DDRA_SDQ36
DDRA_SBS1
DDRA_SMA7
DDRA_SDQ24
DDRA_SDQ18
DDRA_SDQS7#
DDRA_SMA4
DDRA_SDM1
DDRA_SDQS6
DDRA_SDQ41
DDRA_CKE0
DDRA_SDQ26
EC_TX_P80_DATADDRA_SDM3
DDRA_SDQS2
DDRA_SDQ47
DDRA_SDQ44
DDRA_SMA2
DDRA_CKE1
DDRA_SDQ51DDRA_SDQ50
DDRA_SDQ34
DDRA_SCAS#
DDRA_SDQ11
DDRA_SBS2
DDRA_SMA9
DDRA_SMA5
DDRA_SMA1
DDRA_SBS0
DDRA_SCAS#
DDRA_ODT1
DDRA_SMA7
DDRA_SMA4
DDRA_SMA0
DDRA_SRAS#
DDRA_CKE1
DDRA_SCAS#<8>
DDRA_SWE#<8>
DDRA_SCS1#<7>
DDRA_CKE0<7>
DDRA_SBS0<8>
DDRA_CLK0# <7>DDRA_CLK0 <7>
DDRA_CLK1# <7>DDRA_CLK1 <7>
DDRA_SCS0# <7>DDRA_SRAS# <8>DDRA_SBS1 <8>
DDRA_SDQS1<8>
DDRA_SDQS2<8>
DDRA_SDQS3 <8>
DDRA_SDQS4<8>
DDRA_SDQS5# <8>
DDRA_SDQS6<8>
DDRA_SDQS0<8>
DDRA_SDQS1#<8>
DDRA_SDQS2#<8>
DDRA_SDQS4#<8>
DDRA_SDQS6#<8>
DDRA_SDQS0#<8>
DDRA_SDQS3# <8>
DDRA_SDQS5 <8>
DDRA_SDQS7# <8>DDRA_SDQS7 <8>
DDRA_ODT1<7>
DDRA_ODT0 <7>
DDRA_CKE1 <7>
DDRA_SDQ[0..63]<8>
DDRA_SDM[0..7]<8>
DDRA_SMA[0..13]<8>
D_CK_SDATA<14,15,23>D_CK_SCLK<14,15,23>
DDRA_SBS2<8>
PM_EXTTS#0 <7,14>
EC_RX_P80_CLK<14,31,33>
EC_TX_P80_DATA<14,31,33>
EC_RX_P80_CLK_R<14>
+1.8V +1.8V
+3VS
+DIMM_VREF
+0.9VS
+1.8V
+1.8V
+1.8V
+0.9VS
+0.9VS
+0.9VS
+3VS
+DIMM_VREF
+DIMM_VREF
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
DDRII-SODIMM0B
13 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
DIMM0 STD H:5.2mm (BOT)Change PCB Footprint
20mils
9/25 Change DIMM0 to SP070004Z00 (HBL50)
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9VS
Layout Note:Place near JP35
Layout Note:Place these resistorclosely JP35,alltrace length Max=1.5"
C221
220P_0402_50V7K@
1
2
C250
0.1U_0402_16V4Z
1
2
R205 10K_0402_5% 1 2
C239
0.1U_0402_16V4Z
1
2
C255
0.1U_0402_16V4Z
1
2
JP25
TYCO_292526-4ME@
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144DQS5# 146
DQS5 148VSS 150
DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SA0 198SA1 200
+
C61
422
0U_B
2_2.
5VM
_R35
@
1
2
C245
2.2U_0805_10V6K
1
2
C240
0.1U_0402_16V4Z
1
2
R207 0_0402_5%
1 2
RP18 56_0404_4P2R_5%
1 42 3
C251
0.1U_0402_16V4Z
1
2
C253
0.1U_0402_16V4Z
1
2
C228
0.1U_0402_16V4Z
1
2
RP17 56_0404_4P2R_5%
1 42 3
RP23 56_0404_4P2R_5%
1 42 3
R195
1K_0402_1%
12
C230
0.1U_0402_16V4Z
1
2
R201 0_0402_5%
1 2
RP19 56_0404_4P2R_5%
1 42 3
C241
0.1U_0402_16V4Z
1
2
RP16 56_0404_4P2R_5%
1 42 3
RP20 56_0404_4P2R_5%
1 42 3
RP24 56_0404_4P2R_5%
1 42 3
RP25 56_0404_4P2R_5%
1 42 3
RP14 56_0404_4P2R_5%
1 42 3
C254
0.1U_0402_16V4Z
1
2
C237
0.1U_0402_16V4Z
1
2
C232
2.2U_0805_10V6K
1
2
C242
2.2U_0805_10V6K
1
2
RP22 56_0404_4P2R_5%
1 42 3
RP21 56_0404_4P2R_5%
1 42 3
C225
2.2U_0805_10V6K
1
2
R204 10K_0402_5% 1 2
C243
0.1U_0402_16V4Z
1
2
C234
2.2U_0805_10V6K
@1
2
C224
0.1U_0402_16V4Z
1
2
RP15 56_0404_4P2R_5%
1 42 3
C233
2.2U_0805_10V6K
1
2
C235
0.1U_0402_16V4Z
1
2
C246
2.2U_0805_10V6K
1
2
RP26 56_0404_4P2R_5%
1 42 3
C244
0.1U_0402_16V4Z
1
2
C236
0.1U_0402_16V4Z
1
2
C231
0.1U_0402_16V4Z
1
2
C252
0.1U_0402_16V4Z
1
2
C238
0.1U_0402_16V4Z
1
2
R198
1K_0402_1%
12
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDRB_SDQ[0..63]
DDRB_SMA[0..13]
DDRB_SDM[0..7]
DDRB_SCS0#
DDRB_SBS1
DDRB_SMA2
DDRB_SMA6
DDRB_SMA11
DDRB_SMA13
DDRB_CKE0
DDRB_SWE#
DDRB_SCS1#
DDRB_SMA3
DDRB_SMA10
DDRB_SMA12
DDRB_SMA8DDRB_SMA5
DDRB_SBS2
DDRB_SMA9
DDRB_SMA1
DDRB_SBS0
DDRB_SCAS#
DDRB_ODT1
DDRB_CKE1
DDRB_SMA7
DDRB_SMA4
DDRB_SMA0
DDRB_SRAS#
DDRB_ODT0
DDRB_SDQS7#
DDRB_SDQ36
DDRB_SMA13
DDRB_SDQ20
DDRB_SDQ14
DDRB_SDQ25
DDRB_SDQ11
DDRB_SDQ55
DDRB_SDQ43
DDRB_SCS0#
DDRB_SMA5
DDRB_SBS2
DDRB_SDQ60
DDRB_SDQ50
DDRB_SDQS6
DDRB_SDM2
DDRB_SDQ24
DDRB_SDQ19
DDRB_SDQS0
DDRB_SMA2
DDRB_SDQ21
DDRB_SDQ6
DDRB_SDQ41
DDRB_SCAS#
DDRB_CKE0
DDRB_SDQ9
DDRB_SDQ1
DDRB_SDQ47
DDRB_SDQ56
DDRB_SDQS6#
DDRB_SBS1
DDRB_SMA7
DDRB_SBS0
DDRB_SMA9
DDRB_SDQ42
DDRB_SMA11
DDRB_SDQ7
DDRB_SDQ8
DDRB_SDQ63
DDRB_SDM7
DDRB_SDQ51
DDRB_SDQ45
DDRB_ODT0
DDRB_SMA3
DDRB_SMA8
EC_TX_P80_DATA
DDRB_SDQS2
DDRB_SDQS0#
DDRB_SDM4
DDRB_SDQ22
DDRB_SDQ13
DDRB_SDQ40
DDRB_SMA1
DDRB_SDQS2#
DDRB_SDQ16
DDRB_SDQS7
DDRB_SDQ46
DDRB_SDQ59
DDRB_SDQ49DDRB_SDQ48
DDRB_SDQ30
DDRB_SDQ32
DDRB_SDQ18
DDRB_SDQ10
DDRB_SDM6
DDRB_SDQ39
DDRB_SMA4
DDRB_SDQ31
DDRB_SDQ0
DDRB_SDQS5#
DDRB_SDQ38
DDRB_SDQ28
DDRB_SDQ34
DDRB_SCS1#
DDRB_SDQ3
DDRB_SDQ53
DDRB_SDQS5
DDRB_SDQ57
DDRB_SDM5
DDRB_SDQ23
DDRB_SDM1
DDRB_SDQ12
DDRB_SDQ4
DDRB_SMA10
EC_RX_P80_CLK
DDRB_SDQS1#
DDRB_SDQ58
DDRB_SRAS#
DDRB_SMA6
DDRB_SDQS3#
DDRB_SDM0
DDRB_SDQ62
DDRB_SDQ54
DDRB_SDQ29
DDRB_SDQ33
DDRB_SWE#
D_CK_SDATA
DDRB_SDQ44
DDRB_CKE1
DDRB_SDQ35
DDRB_SDQS4
DDRB_SDM3
DDRB_SDQS1
DDRB_SDQ61
DDRB_SDQ52
EC_RX_P80_CLK_R
DDRB_SDQ5
DDRB_SDQS4#
DDRB_SMA12
DDRB_SDQ27
DDRB_SDQ2
D_CK_SCLK
DDRB_SDQ37
DDRB_SMA0
DDRB_SDQS3
DDRB_SDQ15
DDRB_ODT1
DDRB_SDQ26
DDRB_SDQ17
DDRB_SCS0# <7>
DDRB_SCS1#<7>DDRB_SCAS#<8>
DDRB_SWE#<8>
DDRB_CKE0<7>
DDRB_SBS0<8>
DDRB_SDQS1<8>
DDRB_SDQS2<8>
DDRB_SDQS0<8>
DDRB_SDQS1#<8>
DDRB_SDQS2#<8>
DDRB_SDQS0#<8>
DDRB_SDQS4<8>
DDRB_SDQS6<8>
DDRB_SDQS4#<8>
DDRB_ODT1<7>
DDRB_SDQS6#<8>
DDRB_SDQS5# <8>DDRB_SDQS5 <8>
DDRB_ODT0 <7>
DDRB_SDQS7# <8>DDRB_SDQS7 <8>
DDRB_SRAS# <8>DDRB_SBS1 <8>
DDRB_SDQS3 <8>DDRB_SDQS3# <8>
DDRB_CKE1 <7>
DDRB_SMA[0..13]<8>
DDRB_SDM[0..7]<8>
DDRB_SDQ[0..63]<8>
D_CK_SDATA<13,15,23>D_CK_SCLK<13,15,23>
DDRB_SBS2<8>
PM_EXTTS#0 <7,13>
EC_TX_P80_DATA<13,31,33>
EC_RX_P80_CLK<13,31,33>
EC_RX_P80_CLK_R<13>
DDRB_CLK1# <7>DDRB_CLK1 <7>
DDRB_CLK0# <7>DDRB_CLK0 <7>
+1.8V+1.8V
+3VS
+DIMM_VREF
+0.9VS
+DIMM_VREF
+1.8V
+1.8V
+0.9VS
+0.9VS
+0.9VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
DDRII-SODIMM1B
14 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
DIMM1 STD H:9.2mm (BOT)
9/25 Change DIMM1 to SP070006F00
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9VS
Layout Note:Place near JP34
Layout Note:Place these resistorclosely JP35,alltrace length Max=1.5"
RP5 56_0404_4P2R_5%
1 42 3
C219
2.2U_0805_10V6K
1
2
R1990_0402_5%
1 2
C218
0.1U_0402_16V4Z
1
2
C206
0.1U_0402_16V4Z
1
2
RP11 56_0404_4P2R_5%
1 42 3
C196
0.1U_0402_16V4Z
1
2
RP9 56_0404_4P2R_5%
1 42 3
C479
0.1U_0402_16V4Z
1
2
R196 10K_0402_5%
1 2
C217
0.1U_0402_16V4Z
1
2
C483
2.2U_0805_10V6K
1
2
RP8 56_0404_4P2R_5%
1 42 3
C193
0.1U_0402_16V4Z
1
2
C216
2.2U_0805_10V6K
1
2
C205
0.1U_0402_16V4Z
1
2
RP1 56_0404_4P2R_5%
1 42 3
RP12 56_0404_4P2R_5%
1 42 3
C482
0.1U_0402_16V4Z
1
2
C200
0.1U_0402_16V4Z
1
2
RP13 56_0404_4P2R_5%
1 42 3
C192
0.1U_0402_16V4Z
1
2
C487
2.2U_0805_10V6K
1
2
RP7 56_0404_4P2R_5%
1 42 3
C199
2.2U_0805_10V6K
1
2
RP4 56_0404_4P2R_5%
1 42 3
C194
0.1U_0402_16V4Z
1
2
JP23
TYCO_292530-4ME@
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
RP2 56_0404_4P2R_5%
1 42 3
C203
0.1U_0402_16V4Z
1
2RP10 56_0404_4P2R_5%
1 42 3
C197
0.1U_0402_16V4Z
1
2
R197 10K_0402_5%
1 2
C195
0.1U_0402_16V4Z
1
2
C208
0.1U_0402_16V4Z
1
2
C207
0.1U_0402_16V4Z
1
2
RP6 56_0404_4P2R_5%
1 42 3
C198
0.1U_0402_16V4Z
1
2
RP3 56_0404_4P2R_5%
1 42 3
C204
0.1U_0402_16V4Z
1
2
C220
2.2U_0805_10V6K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_STP_CPU#
CLK_PCI_ICH PCI_ICH
H_STP_PCI#
CLKREF1
CLK_XTAL_IN
PCI_MINI
FSB
FSA
PCI_ICH
SATA_CLKREQ#
CLK_XTAL_OUT
WLAN_CLKREQ#
SATA_CLKREQ#
CLK_ENABLE#
WLAN_CLKREQ#
CLK_ICH_14M
PCI5
CLK_XTAL_IN
CLK_XTAL_OUT
CLK_CPU_BCLK
CLK_CPU_BCLK#
CLK_MCH_BCLK
CLK_MCH_BCLK#
PCI5
CLKREF1
D_CK_SDATA
D_CK_SCLK
+CK_VDD_MAIN2
+CK_VDD_MAIN2
D_CK_SDATA
D_CK_SCLK
FSB
CLKIREF
CLK_PCIE_SATA
CLK_PCIE_SATA#
CLK_PCIE_VGA#
CLK_PCIE_VGA
CLK_PCIE_WLAN#
CLK_PCIE_WLAN
CLK_MCH_SSCDREFCLK
CLK_MCH_SSCDREFCLK#
CLK_MCH_DREFCLK#
CLK_MCH_DREFCLK
CLK_ENABLE#
CLK_ICH_48M FSA
PCI_EC
MCH_DREFCLK
MCH_DREFCLK#
CLK_PCIE_LAN#
CLK_PCIE_LAN
CLKREQ_LAN#
CLKREQ_LAN#
CLK_PCIE_EXP
CLK_PCIE_EXP#
EXP_CLKREQ#
CLK_PCIE_ICH#
CLK_PCIE_ICH
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
MCH_CLKREQ#
EXP_CLKREQ#
PCI_MINI
MCH_CLKREQ#
CLK_ENABLE#
PCI6
PCI6
CPU_BSEL2<5>
CPU_BSEL1<5>
MCH_CLKSEL2 <7>
CPU_BSEL0<5>
MCH_CLKSEL1 <7>
MCH_CLKSEL0 <7>
ICH_SMBDATA<21,24,29>
D_CK_SCLK<13,14,23>
CLK_ENABLE#<44>
CLK_PCI_ICH<19>
SATA_CLKREQ# <21>
CLK_ICH_14M<21>
D_CK_SDATA<13,14,23>
H_STP_PCI# <21>
ICH_SMBCLK<21,24,29>
WLAN_CLKREQ# <23>
CLK_ICH_48M<21>
CLK_PCI_LPC<31>
CLK_MCH_BCLK <7>
H_STP_CPU# <21>
CLK_MCH_BCLK# <7>
CLK_CPU_BCLK <4>
CLK_CPU_BCLK# <4>
CLK_PCIE_SATA# <20>
CLK_PCIE_VGA# <16>
CLK_PCIE_SATA <20>
CLK_MCH_3GPLL <7>
CLK_PCIE_VGA <16>
CLK_MCH_3GPLL# <7>
CLK_PCIE_ICH# <21>
CLK_PCIE_ICH <21>
CLK_MCH_DREFCLK<7>
CLK_MCH_DREFCLK#<7>
CLK_PCIE_WLAN <23>
CLK_PCIE_WLAN# <23>
CLK_MCH_SSCDREFCLK# <7>
CLK_MCH_SSCDREFCLK <7>
MCH_CLKREQ# <7>
CLK_27M_VGA<16>
CLK_27M_VGA#<16>
CLK_PCIE_LAN <29>
CLK_PCIE_LAN# <29>
CLKREQ_LAN# <29>
CLK_PCIE_EXP <24>
CLK_PCIE_EXP# <24>
EXP_CLKREQ# <24>
VGATE <21,44>
+VCCP
+VCCP
+VCCP
+3VS
+CK_VDD_MAIN2
+CK_VDD_MAIN1
+3VS
+3VS
+3VS+3VS
+CK_VDD_MAIN1
+3VS
+3VS
+3VS
+3VS+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
Clock generator
15 46Friday, May 18, 2007
2006/08/04 2006/10/06Compal Electronics, Inc.
PCI5PCI6ITP
CLK_Ra
CLK_Rc
CLK_Rb
CLK_Rf
CLK_Re
CLK_Rd
CLK_Re
CLK_Ra
CLK_Rf
Stuff
CLK_Rc
CLK_Ra
Stuff
CLK_Re
533MHz
No Stuff
CLK_Rb
No Stuff
FSB Frequency Selet:
CLK_Rd
CLK_Re
CLK_Rc
CLK_Rf
No Stuff
CPU DrivenCLK_Rc
CLK_Rd
CLK_Ra
CLK_Rf
667MHz
CLK_Rb
CLK_Rd
Stuff
CLK_Rb
(Default)*
Place near U4
Place crystal within500 mils of CK410
FCTSEL1(PIN34) PIN43 PIN44 PIN47
0
1
PCI_MINI = FCTSEL1
DOT96T DOT96C 96/100M_T
27Mout
PIN48
27MSSout SRCT0 SRCC0
96/100M_C
PCI_PME=SEL_PCI6
PIN27PCI6
PCICLK61
0 CLKREQ5
100
1
0
100
CLKSEL1
0
PCIMHz
33.3
SRCMHz
Table : ICS954306
0
133 33.3
CLKSEL2CPUMHz
FSLA
1
CLKSEL0FSLB
1
FSLC
166
G
D S
Q342N7002_SOT23
2
1 3
C336
0.1U_0402_16V4Z
1
2
R549
10K_0402_5%
12
C343
10U_0805_10V4Z
1
2
U23
SLG8LP465VTR_QFN72
VDDSRC1VDDSRC49
VDDSRC65
VDDPCI30VDDPCI36
VDD4840
VDDCPU12
VDDREF18
USB_48MHz/FSLA41
FSLB/TEST_MODE/24Mhz45
X219
X120
GNDPCI31
SEL_24M/PCICLK232
REF0/FSLC/TEST_SEL23
ITP_EN/PCICLK_F037
CPU_STOP# 24
CPUCLKT1LP 11
CPUCLKC1LP 10
CPUCLKT2_ITP/SRCCLKT10LP 6
SEL_48M/PCICLK333
PCICLK4/FCTSEL134
CPUCLKC0LP 13
CPUCLKT0LP 14
PCI_SRC_STOP# 25
GNDA 8
VDDA 7
GNDPCI35
CPUCLKC2_ITP/SRCCLKC10LP 5
GNDREF21
GNDCPU15
GNDSRC4
GND4842
GNDSRC68
DOTT_96MHz/27MHz_Nonspread43
DOTC_96MHz/27MHz_spread44
VTT_PWRGD#/PD39
SEL_PCI5/REF122 SRCCLKT7LP 66
SRCCLKC7LP 67
SRCCLKT8LP 70
SRCCLKC8LP 69
SRCCLKT9LP 3
SRCCLKC9LP 2
SRCCLKC1LP 51
LCD100/96/SRC0_TLP 47
SRCCLKT2LP 52
SRCCLKT4LP 58
SRCCLKT1LP 50
CLKREQ4# 57
SRCCLKC2LP 53
SRCCLKC5LP 61
SRCCLKC4LP 59
SRCCLKT5LP 60
LCD100/96/SRC0_CLP 48
SRCCLKC3LP 56
SRCCLKT3LP 55
SRCCLKT6LP 63
SRCCLKC6LP 64
CLKREQ6# 62
CLKREQ8# 71
CLKREQ9# 72
CLKREQ1# 46
CLKREQ5#/PCICLK6 29
CLKREQ3#/PCICLK5 28
CLKREQ2# 26
CLKREQ7#/48Mhz_1 38
VDDSRC54
SEL_PCI6/PCICLK127
SMBCLK16
SMBDAT17
GND9
GND73
R448
10K_0402_5%
12
R129
1K_0402_5%@
12
R39233_0402_5%
12
R1320_0402_5%
1 2
R3990_0402_5%
1 2
R537
10K_0402_5%@
12
R1271K_0402_5%
1 2
R45656_0402_5%@
12
R4510_0402_5%
1 2
R401
10K_0402_5%
12
R552
2.2K_0402_5%
C480 27P_0402_50V8J
12
C338
0.1U_0402_16V4Z
1
2
R5511K_0402_5%
1 2
R120
0_0402_5%
@
12
R400 0_0805_5%
1 2
R142 10K_0402_5%12
C418
10U_0805_10V4Z
1
2
R3968.2K_0402_5%
12
C463
0.1U_0402_16V4Z
@1
2
R140 10K_0402_5%WLAN@12
R141 10K_0402_5%@12
R553
1K_0402_5%@
12
C485
10U_0805_10V4Z
1
2R865 0_0402_5%
1 2
R3271K_0402_5%
1 2
R450 0_0402_5%@1 2
R870 10K_0402_5%
1 2
Y314.31818MHZ_20P_6X1430004201
12
C434
0.1U_0402_16V4Z
1
2
R418 33_0402_5%
12
G
D S
Q402N7002_SOT23
2
1 3
R542
1K_0402_5%@
12
R557
10K_0402_5%@
12
R534 0_0402_5%@1 2
R434
2.2K_0402_5%
C471 27P_0402_50V8J
12
R430 0_0805_5%
1 2
C335
0.1U_0402_16V4Z
1
2
R407 10K_0402_5%12
R444
10K_0402_5%
12
C474
0.1U_0402_16V4Z
@1
2
C337
0.1U_0402_16V4Z
1
2
R390
0_0402_5%
@
12
L19
FBM-L10-160808-301-T_06031 2
R440 0_0402_5%GM@1 2
C472
0.1U_0402_16V4Z
1
2
G
D S
Q322N7002_SOT23
2
1 3
R415
10K_0402_5%
@
12
R408
33_0402_5% 12
R54533_0402_5% 12
R5478.2K_0402_5%
12
C466
0.1U_0402_16V4Z
1
2
C433 0.1U_0402_16V4Z
1 2C477 0.1U_0402_16V4Z
1 2
R555
10K_0402_5%@
12
R445
10K_0402_5%@
12
R540 0_0402_5%GM@1 2
R532
10K_0402_5%@
12
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_MTX_C_GRX_N12PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_N14PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N4PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_P6PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_P2PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_P8PCIE_MTX_C_GRX_N8
PCIE_MTX_C_GRX_P10PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P11PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_N13PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N15PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N1PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P3PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N5PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_N7PCIE_MTX_C_GRX_P7
PCIE_MTX_C_GRX_N9PCIE_MTX_C_GRX_P9
PCIE_GTX_C_MRX_N2PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_P0PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_N4PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N6PCIE_GTX_C_MRX_P6
PCIE_GTX_C_MRX_P8PCIE_GTX_C_MRX_N8
PCIE_GTX_C_MRX_N10PCIE_GTX_C_MRX_P10
PCIE_GTX_C_MRX_N12
SUSP#
PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_N14PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N1PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P3PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N5PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N7PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_N9PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_N11PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N13PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P15PCIE_GTX_C_MRX_N15
VGA_THER_ALERT#
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
CLK_PCIE_VGA#<15>SUSP# <24,31,36,40,42,43>
VGA_CRT_B<18>
VGA_CRT_G<18>
VGA_CRT_R<18>
VGA_HSYNC<18>
VGA_VSYNC<18>
VGA_DDCCLK<18>
PLT_RST_BUF# <7,19,21,23,24,27,29>VGA_ENBKL <17>
CLK_27M_VGA <15>CLK_27M_VGA# <15>
CLK_PCIE_VGA<15>
VGA_DDCDATA<18>
PCIE_MTX_C_GRX_N[0..15]<9>
PCIE_GTX_C_MRX_P[0..15]<9>
PCIE_GTX_C_MRX_N[0..15]<9>
PCIE_MTX_C_GRX_P[0..15]<9>
VGA_THER_ALERT# <21>
+2.5VS+5VS
+3VS
B+
+1.8VS+3VS +5VS+1.5VS
+2.5VS
Title
Size Document Number Rev
Date: Sheet o f
IEL10 LA-3451P 0.2
VGA/B connector
16 46Friday, May 18, 2007
Compal Electronics, Inc.
CustomTHIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
MAX. 655mA @ 3.3V
MAX. 130mA @ 2.5V
MAX. 4.06A @ 1.8V
C44
50.
047U
_040
2_16
V4Z
PM@
1
2
C17
60.
1U_0
402_
16V4
Z
PM@
1
2
C17
40.
1U_0
402_
16V4
Z
PM@
1
2
C45
40.
1U_0
402_
16V4
Z
@
1
2
JP19
HRS_FX8-80P-SV1(92)ME@
1122334455667788991010111112121313141415151616171718181919202021212222232324242525262627272828292930303131323233333434353536363737383839394040
41 4142 4243 4344 4445 4546 4647 4748 4849 4950 5051 5152 5253 5354 5455 5556 5657 5758 5859 5960 6061 6162 6263 6364 6465 6566 6667 6768 6869 6970 7071 7172 7273 7374 7475 7576 7677 7778 7879 7980 80
C44
40.
047U
_040
2_16
V4Z
PM@
1
2
C45
80.
1U_0
402_
16V4
Z
@
1
2
JP20
HRS_FX8-80P-SV1(92)ME@
1122334455667788991010111112121313141415151616171718181919202021212222232324242525262627272828292930303131323233333434353536363737383839394040
41 4142 4243 4344 4445 4546 4647 4748 4849 4950 5051 5152 5253 5354 5455 5556 5657 5758 5859 5960 6061 6162 6263 6364 6465 6566 6667 6768 6869 6970 7071 7172 7273 7374 7475 7576 7677 7778 7879 7980 80
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BKOFF#
LVDS_SCL+LCDVDD_L
ENBKL
BKOFF#
+INVPWR_B+
LVDS_B1#LVDS_B1
LVDS_B2#LVDS_B2
LVDS_BCLKLVDS_BCLK#
LVDS_B0LVDS_B0#
LVDS_ACLK
LVDS_A0
LVDS_ACLK#
LVDS_A2
LVDS_A0#
LVDS_A2#
LVDS_A1LVDS_A1#
LVDS_SCL
LVDS_SDA
LVDS_SDA
BKOFF#<31>
GMCH_ENVDD<9>
ENBKL <31>
VGA_ENBKL<16>
GMCH_ENBKL<9>
DAC_BRIG<31>
INVT_PWM<31>
LVDS_SDA<9>
LVDS_SCL<9>
LVDS_B0# <9>
LVDS_B1# <9>
LVDS_B2# <9>
LVDS_B0 <9>
LVDS_B1 <9>
LVDS_B2 <9>
LVDS_BCLK# <9>LVDS_BCLK <9>
LVDS_A0#<9>
LVDS_A2#<9>
LVDS_A0<9>
LVDS_A1<9>
LVDS_A2<9>
LVDS_ACLK#<9>LVDS_ACLK<9>
LVDS_A1#<9>
+3VS
+LCDVDD
+LCDVDD+3VALW
+LCDVDD
+3VS
B+
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
LVDS & DVI ConnectorB
17 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
LCD POWER CIRCUIT
LCD/PANEL BD. Conn.
W=60mils
W=60mils
Follow HEL80's pin definition
(60 MIL)
INVERTER Conn.
Except pin 29
R270 1K_0402_5% GM@12
R72 0_0402_5%PM@12
R6
100K_0402_5%
12
R22
02.
2K_0
402_
5%
GM
@
12
R69 0_0402_5%GM@12
C330
0.047U_0402_16V7KGM@ 1
2
L1FBMA-L11-201209-221LMA30T_0805
12
C334
4.7U_0805_10V4ZGM@
1
2
R28
52.
2K_0
402_
5%
GM
@1
2
R271100K_0402_5%GM@
12
JP3
MOLEX_53780-0790ME@
1234567
JP16
ACES_87216-3006ME@
GND31 GND 32
11 22 33 44 55 66 77 88 99 1010 1111 1212 1313 1414 1515
16 1617 1718 1819 1920 2021 2122 2223 2324 2425 2526 2627 2728 2829 2930 30
C14
0.1U_0603_50V4Z Q39
DTC124EK_SC59GM@
2
13
R90470_0603_5%
GM@
12
G
D
S
Q62N7002_SOT23
GM@ 2
13
C329
4.7U_0805_10V4ZGM@
1
2
G
D
S
Q29SI2301BDS_SOT23GM@
2
13
R66
100K_0402_5%
12
C333
0.1U_0402_16V4ZGM@
1
2
L18FBMA-L11-201209-221LMA30T_0805
GM@
12
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
GREEN
JVGA_VS
BLUE
RED
CRT_B_1
CRT_G_1
CRT_R_1
JVGA_HS
CRT_VSYNC_1
CRT_HSYNC_1
BLUE
JVGA_VS
GREEN
RED
VGA_DDC_DAT
VGA_DDC_CLK
VGA_DDC_DATVGA_DDC_CLK
JVGA_HS
PIN4
VGA_HSYNC<16>
VGA_VSYNC<16>
GMCH_CRT_HSYNC<9>
GMCH_CRT_VSYNC<9>
GMCH_CRT_DATA<9>
GMCH_CRT_CLK<9>
VGA_DDCCLK<16>
VGA_DDCDATA<16>
GMCH_CRT_B<9>
GMCH_CRT_G<9>VGA_CRT_G<16>
GMCH_CRT_R<9>VGA_CRT_R<16>
VGA_CRT_B<16>
+CRT_VCC+5VS
+CRT_VCC
+CRT_VCC
+CRT_VCC
+3VS
+3VS
+CRT_VCC
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
CRT & TV-OUT ConnectorB
18 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
W=40mils
CRT Connector
Place closed to chipset
Update Footprint
Place closed to chipset
PIN ASSIGMENTD-SUBPIN
12345678
FUNCTION
9
+CRT_VCCREDGND
GREENGNDBLUE
VSYNC
HSYNC
1
2
3
6
7
8
9
1512
13
14
SM_CLKSM_DATSENSE
1110
12
GND
11
10 GND
2.2K2.2K
5 GND4
G
DS
Q22N7002_SOT23
2
13
L4BK1608LL121-T 0603
1 2R93 0_0402_5%GM@
1 2
R78 0_0402_5%PM@1 2
R640_0402_5% PM@ 12
C868P_0402_50V8K@
1
2
R580_0402_5% PM@ 12
R30 1K_0402_5%
12
C1210P_0402_50V8J @
1
2
C610P_0402_50V8J
@
1
2
C1310P_0402_50V8J@
1
2
R80 0_0402_5%PM@1 2
C9
100P_0402_50V8J
@ 1
2
L5 FCM1608C-121T_0603
1 2
R91 0_0402_5%GM@1 2
C50.1U_0402_16V4Z
1
2
R550_0402_5% GM@1 2
R62
2.2K_0402_5%
12
R92 0_0402_5%GM@1 2
R12
150_0402_1%
12
R610_0402_5% GM@1 2
C1010P_0402_50V8J
@
1
2
R8
150_0402_1%
12
C34 0.1U_0402_16V4Z
1 2
JP1
ACES_87213-1200GME@
112233445566778899101011111212
GND113GND214C7
0.1U_0402_16V4Z@
1
2
D1
RB411DT146_SOT23-3
2 1
R9
150_0402_1%
12
R84 39_0402_5% GM@1 2
R83 0_0402_5%PM@1 2
R81 39_0402_5% GM@1 2
U3
SN74AHCT1G125DCKR_SC70-5
A2 Y 4OE#
1
G3
P5
R60
2.2K_0402_5%
12 R56
2.2K_0402_5%
12
R53
2.2K_0402_5%
12
C42 0.1U_0402_16V4Z
1 2
C15
22P_0402_50V8J
@
1
2
C17
22P_0402_50V8J
@
1
2
L6 FCM1608C-121T_0603
1 2
L3BK1608LL121-T 0603
1 2
C11
10P_0402_50V8J
@
1
2
C16
22P_0402_50V8J @
1
2
R79 0_0402_5%PM@1 2
U2
SN74AHCT1G125DCKR_SC70-5
A2 Y 4OE#
1
G3
P5
R82 0_0402_5%PM@1 2
G
DS
Q32N7002_SOT23
2
13
L2BK1608LL121-T 0603
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_FRAME#
PCI_IRDY#
PCI_PLOCK#
PCI_SERR#
PCI_PERR#
PCI_PIRQC#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQD#
PCI_PIRQH#
PCI_PIRQG#
PCI_PIRQF#
PCI_PIRQE#
PCI_REQ#0
PCI_REQ#2
PCI_REQ#1
PCI_REQ#3
PCI_PLTRST#
CLK_PCI_ICH
PCI_REQ#3
PCI_SERR#
PCI_REQ#5
PCI_PIRQG#PCI_PIRQB# PCI_PIRQF#PCI_PIRQC#
PCI_PIRQE#
PCI_PIRQD#
PCI_PIRQA#
PCI_PIRQH#
PCI_PLTRST#
PCI_PME#
PCI_REQ#1
PCI_REQ#4
PCI_REQ#2
CLK_PCI_ICH
PCI_DEVSEL#
PCI_FRAME#PCI_TRDY#
PCI_PERR#
PCI_STOP#
PCI_IRDY#
PCI_RST#
PCI_PLOCK#
PCI_REQ#0
PCI_REQ#4
PCI_REQ#5
PLT_RST_BUF# <7,16,21,23,24,27,29>
MCH_ICH_SYNC# <7>
PCI_PME# <31>CLK_PCI_ICH <15>
PCI_RST# <31>
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
ICH8M(1/4)-PCI
19 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Place closely pin A9
R102 8.2K_0402_5%
1 2
R101 8.2K_0402_5%
1 2
R121 8.2K_0402_5%
1 2 C371
8.2P_0402_50V@
1
2
R99 8.2K_0402_5%
1 2
R96 8.2K_0402_5%
1 2
R111 8.2K_0402_5%
1 2
R340 0_0402_5%@1 2
R281 8.2K_0402_5%
1 2
R139 8.2K_0402_5%
1 2
R300 8.2K_0402_5%
1 2
R297 8.2K_0402_5%
1 2
R301 8.2K_0402_5%
1 2
R278 8.2K_0402_5%
1 2
R116 8.2K_0402_5%
1 2
R103 8.2K_0402_5%
1 2
C611
0.1U_0402_16V4Z
1 2
R107 8.2K_0402_5%
1 2
R296 8.2K_0402_5%
1 2
R100 8.2K_0402_5%
1 2
R128 8.2K_0402_5%
1 2
U21NC7SZ08P5X_NL_SC70-5
B2
A1 Y 4
P5
G3
R302
10_0402_5%@
12
R97 8.2K_0402_5%
1 2
R298 8.2K_0402_5%
1 2
R119 8.2K_0402_5%
1 2
R133 8.2K_0402_5%
1 2
Interrupt I/F
PCI
MISC
U29B
ICH7_BGA652~D
FRAME# F16
GPIO17 / GNT5# D8
TRDY# F14STOP# F15
GPIO2 / PIRQE# G8GPIO3 / PIRQF# F7GPIO4 / PIRQG# F8GPIO5 / PIRQH# G7
C/BE0# B15C/BE1# C12C/BE2# D12C/BE3# C15
IRDY# A7PAR E10
PCIRST# B18DEVSEL# A12
PERR# C9PLOCK# E11
SERR# B10
PIRQC#C5
RSVD[4]AH4
PIRQA#A3
RSVD[5]AD9
RSVD[2]AD5RSVD[3]AG4
PIRQB#B4
PIRQD#B5
RSVD[1]AE5
REQ0# D7GNT0# E7REQ1# C16GNT1# D16REQ2# C17GNT2# D17REQ3# E13GNT3# F13
REQ4# / GPIO22 A13GNT4# / GPIO48 A14GPIO1 / REQ5# C8
AD0E18AD1C18AD2A16AD3F18AD4E16AD5A18AD6E17AD7A17AD8A15AD9C14AD10E14AD11D14AD12B12AD13C13AD14G15AD15G13AD16E12AD17C11AD18D11AD19A11AD20A10AD21F11AD22F10AD23E9AD24D9AD25B9AD26A8AD27A6AD28C7AD29B6AD30E6AD31D6
RSVD[6] AE9RSVD[7] AG8RSVD[8] AH8RSVD[9] F21
MCH_SYNC# AH20
PLTRST# C26PCICLK A9
PME# B19
R370
100K_0402_5%
12
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_FERR#
GATEA20
KB_RST#
IDE_DIORDYIDE_IRQ
SATA_LED#
SATA_LED#
ICH_INTVRMEN
ICH_INTVRMEN
CLK_PCIE_SATA#CLK_PCIE_SATA
ICH_RTCRST#
H_A20M#
H_INIT#
H_IGNNE#
H_INTR
H_SMI#H_NMI
H_STPCLK#
LPC_AD0
LPC_FRAME#
LPC_AD3
H_DPSLP#
LPC_AD2LPC_AD1
H_PWRGOOD
THRMTRIP_ICH#
SM_INTRUDER#
SM_INTRUDER#
DPRSLP#
ICH_RTCX1
H_CPUSLP_R#
IDE_DIOW#IDE_DIOR#
IDE_IRQIDE_DIORDY
IDE_DDACK#
IDE_DCS1#
IDE_DDREQ
IDE_DCS3#
IDE_DA1IDE_DA2
IDE_DA0
IDE_DD13
IDE_DD15IDE_DD14
IDE_DD6
IDE_DD9
IDE_DD11IDE_DD12
IDE_DD10
IDE_DD3
IDE_DD5IDE_DD4
IDE_DD7IDE_DD8
IDE_DD1IDE_DD0
IDE_DD2
SATA_DTX_C_IRX_N0SATA_DTX_C_IRX_P0SATA_ITX_DRX_N0SATA_ITX_DRX_P0SATA_ITX_DRX_N0
SATA_ITX_DRX_P0SATA_ITX_C_DRX_P0
SATA_ITX_C_DRX_N0
HDA_SYNC_ICH
HDA_RST_ICH#
HDA_SDOUT_ICH
HDA_BITCLK_ICH
HDA_BITCLK_ICH
HDA_SYNC_ICH
HDA_RST_ICH#
HDA_SDOUT_ICH
ICH_RTCX2
LPC_AD[0..3] <31>
H_A20M# <4>
H_DPSLP# <4>
H_FERR# <4>
H_PWRGOOD <4>
H_IGNNE# <4>
H_INIT# <4>H_INTR <4>
H_SMI# <4>H_NMI <4>
H_STPCLK# <4>
GATEA20 <31>
KB_RST# <31>
H_THERMTRIP# <4,7>
LPC_FRAME# <31>
H_DPRSTP# <4,44>
CLK_PCIE_SATA#<15>CLK_PCIE_SATA<15>
SATA_LED#<27>
H_CPUSLP# <4,7>
IDE_DCS1# <27>
IDE_DDREQ <27>
IDE_DCS3# <27>
IDE_DDACK#<27>IDE_DIOW#<27>IDE_DIOR#<27>
IDE_IRQ<27>IDE_DIORDY<27>
IDE_DA[0..2] <27>
IDE_DD[0..15] <27>SATA_ITX_C_DRX_N0<27>
SATA_ITX_C_DRX_P0<27> SATA_DTX_C_IRX_N0<27>SATA_DTX_C_IRX_P0<27>
HDA_SDIN0<25>HDA_SDIN1<24>
HDA_SYNC_MDC<24>
HDA_SYNC_AUDIO<25>
HDA_RST_AUDIO#<25>
HDA_RST_MDC#<24>
HDA_SDOUT_AUDIO<25>
HDA_SDOUT_MDC<24>
HDA_BITCLK_MDC<24>
HDA_BITCLK_AUDIO<25>
+RTCVCC
+RTCVCC
+VCCP
+RTCVCC
+3VS
+3VS
+VCCP
+CHGRTC
+RTCVCC
BATT1.1
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
ICH8M(2/4)-LAN,IDELPC,RTCCustom
20 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
+ -W=20mils
close ICH7
SATA RX n/p need tie to GND when no used
R118
100_0603_1%
1 2
R292 0_0402_5% 12
R365 33_0402_5%
1 2
R364 33_0402_5% MDC@1 2
C435 1000P_0402_50V7K
12
J2
3MM
@21
R293
56_0402_5%
12
R361 0_0402_5% @ 12
R35656_0402_5%
12
R367 33_0402_5%
1 2
R349 33_0402_5% MDC@ 1 2
R702 1K_0402_5%
1 2
R363 33_0402_5%
1 2
R11
510
M_0
402_
5%
12
R3468.2K_0402_5% 12
R291
1M_0402_5%
12
RTC
LAN
SATA
AC-97/AZALIA
LPC
CPU
IDE
U29A
ICH7_BGA652~D
RTXC1AB1RTCX2AB2
RTCRST#AA3
INTVRMENW4INTRUDER#Y5
EE_CSW1EE_SHCLKY1EE_DOUTY2EE_DINW3
LAN_CLKV3
LAN_RSTSYNCU3
LAN_RXD0U5LAN_RXD1V4LAN_RXD2T5
LAN_TXD0U7LAN_TXD1V6LAN_TXD2V7
ACZ_BCLKU1ACZ_SYNCR6
ACZ_RST#R5
ACZ_SDIN0T2ACZ_SDIN1T3ACZ_SDIN2T1
ACZ_SDOUTT4
SATALED#AF18
SATA0RXNAF3SATA0RXPAE3SATA0TXNAG2SATA0TXPAH2
SATA2RXNAF7SATA2RXPAE7SATA2TXNAG6SATA2TXPAH6
SATA_CLKNAF1SATA_CLKPAE1
SATARBIASNAH10SATARBIASPAG10
IORDYAG16IDEIRQAH16DDACK#AF16DIOW#AH15DIOR#AF15
LAD0 AA6LAD1 AB5LAD2 AC4LAD3 Y6
LDRQ0# AC3LDRQ1# / GPIO23 AA5
LFRAME# AB3
A20GATE AE22A20M# AH28
CPUSLP# AG27
TP1 / DPRSTP# AF24TP2 / DPSLP# AH25
FERR# AG26
GPIO49 / CPUPWRGD AG24
IGNNE# AG22INIT3_3V# AG21
INIT# AF22INTR AF25
RCIN# AG23
SMI# AF23NMI AH24
STPCLK# AH22
THERMTRIP# AF26
DA0 AH17DA1 AE17DA2 AF17
DCS1# AE16DCS3# AD16
DD0 AB15DD1 AE14DD2 AG13DD3 AF13DD4 AD14DD5 AC13DD6 AD12DD7 AC12DD8 AE12DD9 AF12
DD10 AB13DD11 AC14DD12 AF14DD13 AH13DD14 AH14DD15 AC15
DDREQ AE15
R36224.9_0402_1% 1 2
Y432.768K_1TJS125BJ4A421P
OUT 4
IN 1
NC3
NC2
C345
0.1U_0402_16V4Z1
2
D9RB751V-40TE17_SOD323-2
1 2
R3474.7K_0402_5% 12
R703 1K_0402_5%
1 2
R33910K_0402_5% 12
R30820K_0402_5%
1 2
C34615P_0402_50V8J
12
R368 33_0402_5% MDC@ 1 2
R304
332K_0402_1%
12
R366 33_0402_5% MDC@ 1 2
R280
24.9_0402_1%
1 2
R274 10K_0402_5% 12
R348 33_0402_5%
1 2
C436 1000P_0402_50V7K
12
C34415P_0402_50V8J
12
C3921U_0603_10V4Z 1 2
BATT1
ML1220T13RE45@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PM_BMBUSY#
SB_SPKR
PM_DPRSLPVR
LINKALERT#
CLK_ICH_48M
ITP_DBRESET#SUS_STAT#
SPI_MOSI
ICH_PCIE_WAKE#
SPI_MOSIEC_LID_OUT#
EC_SMI#
IDERST_CD#SB_SPI_CS#
PM_SLP_S4#
USB20_P1USB20_N1
ICH_PCIE_WAKE#
USB_OC#7
USB_OC#4
VGA_THER_ALERT#
OCP#
ICH_LOW_BAT#
ICH_LOW_BAT#
USB20_N2
USB20_N0USB20_P0
USB20_N3USB20_P3USB20_N4USB20_P4USB20_N5
USB20_P2
USB20_P5
USB_OC#5
SB_SPI_CS#
EC_RSMRST#
SPI_MISO
USB_OC#6
ICH_SMBCLK
ICH_SMLINK1ICH_SMLINK0
LINKALERT#
OCP# PM_SLP_S5#
PM_SLP_S3#
VGA_THER_ALERT#
PM_DPRSLPVR
USB20_N6USB20_P6
DMI_IRCOMP
DMI_TXN2
DMI_TXN3
DMI_TXP2
DMI_RXN2
USB_OC#0USB_OC#1
DMI_TXN0
DMI_TXP1DMI_TXN1
DMI_RXN0
DMI_TXP0
DMI_RXN1DMI_RXP1
DMI_RXP0
DMI_TXP3
DMI_RXN3DMI_RXP3
DMI_RXP2
USBRBIAS
PLT_RST_BUF#
EC_THERM#
SERIRQ
CLK_PCIE_ICHCLK_PCIE_ICH#
ICH_SMBDATA
SPI_MISO
USB_OC#2
CLK_ICH_14M
CLK_ICH_48MCLK_ICH_14M
PBTN_OUT#
EC_SCI#
SATA_CLKREQ#
USB_OC#3USB20_N7
ICH_POK
USB20_P7
CPUSB#
ICH_SUSCLK
PM_CLKRUN#
H_STP_CPU#
VGATE
ITP_DBRESET#
ICH_RI#
PM_CLKRUN#
H_STP_PCI#
SERIRQ
PCIE_ITX_PRX_P2
PCIE_PTX_C_IRX_P1PCIE_ITX_PRX_N1
PCIE_PTX_C_IRX_N3
PCIE_ITX_PRX_P1
PCIE_PTX_C_IRX_P2PCIE_PTX_C_IRX_N2
PCIE_ITX_PRX_N3
PCIE_PTX_C_IRX_N1
PCIE_ITX_PRX_N2
PCIE_ITX_PRX_P3
PCIE_PTX_C_IRX_P3
WL_ON
WL_ON
USB_OC#2USB_OC#7
USB_OC#0USB_OC#6
USB_OC#3USB_OC#1USB_OC#5
USB_OC#4
H_STP_PCI#<15>H_STP_CPU#<15>
SB_SPKR<25>
PM_BMBUSY#<7>
SERIRQ<31>EC_THERM#<4,31>
VGATE<15,44>
PM_SLP_S3# <31>
PM_DPRSLPVR <7,44>
DMI_RXN0 <7>DMI_RXP0 <7>DMI_TXN0 <7>DMI_TXP0 <7>
DMI_RXN1 <7>DMI_RXP1 <7>DMI_TXN1 <7>DMI_TXP1 <7>
DMI_RXN2 <7>DMI_RXP2 <7>DMI_TXN2 <7>DMI_TXP2 <7>
DMI_RXN3 <7>DMI_RXP3 <7>DMI_TXN3 <7>DMI_TXP3 <7>
CLK_PCIE_ICH# <15>CLK_PCIE_ICH <15>
EC_RSMRST# <31>
PBTN_OUT# <31>
ICH_POK <7,31>
CLK_ICH_48M <15>CLK_ICH_14M <15>
USB20_N3 <23>USB20_P3 <23>USB20_N4 <35>USB20_P4 <35>USB20_N5 <28>USB20_P5 <28>
USB20_N0 <35>USB20_P0 <35>
ITP_DBRESET#<4>
OCP#<4>
USB_OC#0<35>
EC_SCI# <31>
EC_LID_OUT# <31>
ICH_SMBDATA<15,24,29>ICH_SMBCLK<15,24,29>
ICH_PCIE_WAKE#<23,24,29>
EC_SMI#<31>
IDERST_CD#<27>
USB20_N2 <24>USB20_P2 <24>
USB_OC#2<24>
SATA_CLKREQ# <15>
USB20_N6 <35>USB20_P6 <35>
PLT_RST_BUF# <7,16,19,23,24,27,29>
USB20_P1 <23>USB20_N1 <23>
USB_OC#4<35>
USB_OC#6<35>
VGA_THER_ALERT#<16>
PM_SLP_S5# <31>
ACIN <31,38>
USB20_N7 <35>USB20_P7 <35>
CPUSB# <24>
PM_SLP_S4# <31>
PCIE_PTX_C_IRX_N3<29>PCIE_PTX_C_IRX_P3<29>
PCIE_ITX_C_PRX_P3<29>
PCIE_PTX_C_IRX_P2<23>
PCIE_PTX_C_IRX_P1<24>PCIE_PTX_C_IRX_N1<24>
PCIE_ITX_C_PRX_P2<23>
PCIE_PTX_C_IRX_N2<23>
PCIE_ITX_C_PRX_N2<23>
PCIE_ITX_C_PRX_N3<29>
PCIE_ITX_C_PRX_N1<24>PCIE_ITX_C_PRX_P1<24>
USB_OC#7<35>
+3V_STB
+3V_STB
+3VS
+3V_STB+3V_STB
+1.5VS
+3V_STB
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
ICH8M(3/4)-USB,GPIO,PCIECustom
21 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Place closely pin B2 Place closely pin AC1
Need update symbol
Within 500 mils
Within 500 mils
Card Reader
New Card
USB
USB
USB
USB
WLAN
BT
WLAN
NEW Card
LAN
R106100K_0402_5%
@12
R310
10K_0402_5%
12
R32810K_0402_5%
GM@ 1 2
R31710K_0402_5% 1 2
R313
10_0402_5%@
12
R330
2.2K_0402_5%
12
R333
2.2K_0402_5%
1
2
R2728.2K_0402_5%
12
R105 100_0402_5%
1 2
PCI-EXPRESS
DIRECT MEDIA INTERFACE
USB
SPI
U29D
ICH7_BGA652~D
SPI_CLKR2SPI_CS#P6SPI_ARBP1
SPI_MOSIP5SPI_MISOP2
DMI0RXN V26DMI0RXP V25DMI0TXN U28DMI0TXP U27
DMI1RXN Y26DMI1RXP Y25DMI1TXN W28DMI1TXP W27
DMI2RXN AB26DMI2RXP AB25DMI2TXN AA28DMI2TXP AA27
DMI3RXN AD25DMI3RXP AD24DMI3TXN AC28DMI3TXP AC27
DMI_CLKN AE28DMI_CLKP AE27
DMI_ZCOMP C25DMI_IRCOMP D25
PERn1F26PERp1F25PETn1E28PETp1E27
PERn2H26PERp2H25PETn2G28PETp2G27
PERn3K26PERp3K25PETn3J28PETp3J27
PERn4M26PERp4M25PETn4L28PETp4L27
PERn5P26PERp5P25PETn5N28PETp5N27
PERn6T25PERp6T24PETn6R28PETp6R27
OC0#D3OC1#C4OC2#D5OC3#D4OC4#E5OC5# / GPIO29C3OC6# / GPIO30A2OC7# / GPIO31B3
USBP0N F1USBP0P F2USBP1N G4USBP1P G3USBP2N H1USBP2P H2USBP3N J4USBP3P J3USBP4N K1USBP4P K2USBP5N L4USBP5P L5USBP6N M1USBP6P M2USBP7N N4USBP7P N3
USBRBIAS# D2USBRBIAS D1
R31110K_0402_5% 1 2
R32110K_0402_5% 1 2
C107 0.1U_0402_10V7K12C104 0.1U_0402_10V7K12
T44 PAD
C99 0.1U_0402_10V7KWLAN@
12
C385
4.7P_0402_50V8C@
1
2
RP27
10K_1206_8P4R_5%
1 82 73 64 5
R289100_0402_5%
1 2
T41PAD
R32010K_0402_5% 1 2
R27510K_0402_5% 1 2
R334
10_0402_5%@
12
SATA
POWER MGT
SYS
SMB
GPIO
Clocks
GPIO
GPIO
U29C
ICH7_BGA652~D
RI#A28
SPKRA19
SYS_RST#A22 SUS_STAT#A27
GPIO0 / BM_BUSY#AB18
GPIO26A21
GPIO27B21GPIO28E23
GPIO32 / CLKRUN#AG18
GPIO33 / AZ_DOCK_EN#AC19GPIO34 / AZ_DOCK_RST#U2
VRMPWRGDAD22
GPIO11 / SMBALERT#B23
SUSCLK C20
SLP_S3# B24SLP_S4# D23SLP_S5# F22
PWROK AA4
GPIO16 / DPRSLPVR AC22
TP0 / BATLOW# C21
PWRBTN# C23
LAN_RST# C19
RSMRST# Y4
GPIO21 / SATA0GP AF19GPIO19 / SATA1GP AH18GPIO36 / SATA2GP AH19GPIO37 / SATA3GP AE19
CLK14 AC1CLK48 B2
GPIO9 E20GPIO10 A20GPIO12 F19GPIO13 E19GPIO14 R4GPIO15 E22GPIO24 R3GPIO25 D20
GPIO35 / SATAREQ# AD21GPIO38 AD20GPIO39 AE20
SMBCLKC22SMBDATAB22LINKALERT#A26SMLINK0B25SMLINK1A25
GPIO18 / STPPCI#AC20GPIO20 / STPCPU#AF21
WAKE#F20SERIRQAH21THRM#AF20
GPIO6AC21GPIO7AC18GPIO8E21
R3298.2K_0402_5%
1 2
C395
4.7P_0402_50V8C@
1
2
R318 10K_0402_5%
1 2
R31910K_0402_5%
@1 2
C92 0.1U_0402_10V7K12
R322 22_0402_1% 1 2
R312
8.2K_0402_5%
1 2
R325
10K_0402_5%
12
C97 0.1U_0402_10V7K12
R32610K_0402_5% 1 2
R332 24.9_0402_1%
1 2
C101 0.1U_0402_10V7K WLAN@
12
R2901K_0402_5%
1 2
R29410K_0402_5% 1 2
R30910K_0402_5%
@ 1 2
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICH_V5REF_RUN
ICH_V5REF_SUS
ICH_AA2ICH_Y7
ICH_K7
ICH_C28ICH_G20
+1.5VS_DMIPLL
ICH_V5REF_RUN
ICH_V5REF_SUS
+1.5VS
+RTCVCC
+3V_STB
+1.5VS
+1.5VS
+3VS+5VS
+3V_STB+5VALW
+1.5VS
+3VS
+3VS
+3V_STB
+1.5VS
+1.5VS
+1.5VS_DMIPLLR
+3VS
+1.5VS
+3VS
+VCCP
+3V_STB
+1.5VS
+3VS
+VCCP
+3V_STB
+3V_STB
+1.5VS_DMIPLL
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
IFTXX M/B LA-3541P SchematicCustom
22 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Place closely pin AG28 within 100mlis.
Place closely pinD28,T28,AD28.
Place closely pin AG5.
Place closely pin AG9.
C362
0.1U_0402_16V4Z
@1
2
C378
0.1U_0402_16V4Z
1
2
C379
0.1U_0402_16V4Z
1
2
C386
0.1U_0402_16V4Z
1
2
R299
0_0805_5%
1 2
C38
40.
1U_0
402_
16V
4Z
1
2
T15PAD
R303
10_0402_5%
12
C391
0.1U_0402_16V4Z
1
2
C398
0.1U_0402_16V4Z
1
2
C349 0.1U_0402_16V4Z
1 2
C401
0.1U_0402_16V4Z
1
2
C363
1U_0603_10V4Z
1
2
C35
00.
1U_0
402_
16V
4Z
1
2
C348
0.1U_0402_16V4Z
1
2
C35
40.
1U_0
402_
16V
4Z
1
2
U29F
ICH7_BGA652~D
V5REF[1]G10
V5REF[2]AD17
V5REF_SusF6
Vcc1_5_B[1]AA22Vcc1_5_B[2]AA23Vcc1_5_B[3]AB22Vcc1_5_B[4]AB23Vcc1_5_B[5]AC23Vcc1_5_B[6]AC24Vcc1_5_B[7]AC25Vcc1_5_B[8]AC26Vcc1_5_B[9]AD26Vcc1_5_B[10]AD27Vcc1_5_B[11]AD28Vcc1_5_B[12]D26Vcc1_5_B[13]D27Vcc1_5_B[14]D28Vcc1_5_B[15]E24Vcc1_5_B[16]E25Vcc1_5_B[17]E26Vcc1_5_B[18]F23Vcc1_5_B[19]F24Vcc1_5_B[20]G22Vcc1_5_B[21]G23Vcc1_5_B[22]H22Vcc1_5_B[23]H23Vcc1_5_B[24]J22Vcc1_5_B[25]J23Vcc1_5_B[26]K22Vcc1_5_B[27]K23Vcc1_5_B[28]L22Vcc1_5_B[29]L23Vcc1_5_B[30]M22Vcc1_5_B[31]M23Vcc1_5_B[32]N22Vcc1_5_B[33]N23Vcc1_5_B[34]P22Vcc1_5_B[35]P23Vcc1_5_B[36]R22Vcc1_5_B[37]R23Vcc1_5_B[38]R24Vcc1_5_B[39]R25
Vcc1_5_B[41]T22Vcc1_5_B[42]T23Vcc1_5_B[43]T26Vcc1_5_B[44]T27Vcc1_5_B[45]T28Vcc1_5_B[46]U22Vcc1_5_B[47]U23Vcc1_5_B[48]V22Vcc1_5_B[49]V23Vcc1_5_B[50]W22
Vcc1_5_B[52]Y22Vcc1_5_B[53]Y23
Vcc1_5_B[51]W23
Vcc1_5_B[40]R26
Vcc3_3[1]B27
VccDMIPLLAG28
VccSATAPLLAD2
Vcc3_3[2]AH11
Vcc1_05[1] L11Vcc1_05[2] L12Vcc1_05[3] L14Vcc1_05[4] L16
Vcc1_05[6] L18Vcc1_05[5] L17
Vcc1_05[7] M11Vcc1_05[8] M18Vcc1_05[9] P11
Vcc1_05[10] P18Vcc1_05[11] T11Vcc1_05[12] T18Vcc1_05[13] U11Vcc1_05[14] U18Vcc1_05[15] V11Vcc1_05[16] V12Vcc1_05[17] V14Vcc1_05[18] V16Vcc1_05[19] V17Vcc1_05[20] V18
Vcc3_3 / VccHDA U6
VccSus3_3/VccSusHDA R7
V_CPU_IO[1] AE23V_CPU_IO[2] AE26V_CPU_IO[3] AH26
Vcc3_3[3] AA7Vcc3_3[4] AB12Vcc3_3[5] AB20Vcc3_3[6] AC16Vcc3_3[7] AD13Vcc3_3[8] AD18Vcc3_3[9] AG12
Vcc3_3[10] AG15Vcc3_3[11] AG19
Vcc3_3[12] A5
Vcc3_3[14] B16Vcc3_3[15] B7Vcc3_3[16] C10
Vcc3_3[13] B13
Vcc3_3[17] D15Vcc3_3[18] F9Vcc3_3[19] G11Vcc3_3[20] G12
VccRTC W5
VccSus3_3[1] P7
VccSus3_3[2] A24
VccSus3_3[4] D19VccSus3_3[5] D22VccSus3_3[6] G19
VccSus3_3[3] C24
VccSus3_3[7] K3VccSus3_3[8] K4VccSus3_3[9] K5
VccSus3_3[10] K6VccSus3_3[11] L1
Vcc1_5_A[19] AB17Vcc1_5_A[20] AC17
Vcc1_5_A[21] T7Vcc1_5_A[22] F17Vcc1_5_A[23] G17
Vcc1_5_A[24] AB8Vcc1_5_A[25] AC8
VccSus1_05[1] K7
Vcc1_5_A[1]AB7Vcc1_5_A[2]AC6Vcc1_5_A[3]AC7Vcc1_5_A[4]AD6Vcc1_5_A[5]AE6Vcc1_5_A[6]AF5Vcc1_5_A[7]AF6Vcc1_5_A[8]AG5Vcc1_5_A[9]AH5
Vcc1_5_A[10]AB10Vcc1_5_A[11]AB9Vcc1_5_A[12]AC10Vcc1_5_A[13]AD10Vcc1_5_A[14]AE10Vcc1_5_A[15]AF10Vcc1_5_A[16]AF9Vcc1_5_A[17]AG9Vcc1_5_A[18]AH9
VccSus3_3[19]E3
VccUSBPLLC1
VccSus1_05/VccLAN1_05[1]AA2VccSus1_05/VccLAN1_05[2]Y7
VccSus3_3/VccLAN3_3[1]V5VccSus3_3/VccLAN3_3[2]V1VccSus3_3/VccLAN3_3[3]W2VccSus3_3/VccLAN3_3[4]W7
Vcc3_3[21] G16
VccSus3_3[12] L2VccSus3_3[13] L3VccSus3_3[14] L6VccSus3_3[15] L7VccSus3_3[16] M6VccSus3_3[17] M7VccSus3_3[18] N7
VccSus1_05[2] C28VccSus1_05[3] G20
Vcc1_5_A[26] A1Vcc1_5_A[27] H6Vcc1_5_A[28] H7Vcc1_5_A[29] J6Vcc1_5_A[30] J7
C356
0.1U_0402_16V4Z
1
2
T43PAD
C3594.7U_0805_10V4Z
1 2
C372
0.1U_0402_16V4Z
1
2
D15
RB751V-40TE17_SOD323-2 1
2+ C351
220U_B2_2.5VM_R35
1
2
C361
0.1U_0402_16V4Z
1
2
U29E
ICH7_BGA652~D
VSS[0]A4VSS[1]A23VSS[2]B1VSS[3]B8VSS[4]B11VSS[5]B14VSS[6]B17VSS[7]B20VSS[8]B26VSS[9]B28VSS[10]C2VSS[11]C6VSS[12]C27VSS[13]D10VSS[14]D13VSS[15]D18VSS[16]D21VSS[17]D24VSS[18]E1VSS[19]E2VSS[21]E4VSS[22]E8VSS[23]E15VSS[24]F3VSS[25]F4VSS[26]F5VSS[27]F12VSS[28]F27VSS[29]F28VSS[30]G1VSS[31]G2VSS[32]G5VSS[33]G6VSS[34]G9VSS[35]G14VSS[36]G18VSS[37]G21VSS[38]G24VSS[39]G25VSS[40]G26VSS[41]H3VSS[42]H4VSS[43]H5VSS[44]H24VSS[45]H27VSS[46]H28VSS[47]J1VSS[48]J2VSS[49]J5VSS[50]J24VSS[51]J25VSS[52]J26VSS[53]K24VSS[54]K27VSS[55]K28VSS[56]L13VSS[57]L15VSS[58]L24VSS[59]L25VSS[60]L26VSS[61]M3VSS[62]M4VSS[63]M5VSS[64]M12VSS[65]M13VSS[66]M14VSS[67]M15VSS[68]M16VSS[69]M17VSS[70]M24VSS[71]M27VSS[72]M28VSS[73]N1VSS[74]N2VSS[75]N5VSS[76]N6VSS[77]N11VSS[78]N12VSS[79]N13VSS[80]N14VSS[81]N15VSS[82]N16VSS[83]N17VSS[84]N18VSS[85]N24VSS[86]N25VSS[87]N26VSS[88]P3VSS[89]P4VSS[90]P12VSS[91]P13VSS[92]P14VSS[93]P15VSS[94]P16VSS[95]P17VSS[96]P24VSS[97]P27
VSS[98] P28VSS[99] R1
VSS[100] R11VSS[101] R12VSS[102] R13VSS[103] R14VSS[104] R15VSS[105] R16VSS[106] R17VSS[107] R18VSS[108] T6VSS[109] T12VSS[110] T13VSS[111] T14VSS[112] T15VSS[113] T16VSS[114] T17VSS[115] U4VSS[116] U12VSS[117] U13VSS[118] U14VSS[119] U15VSS[120] U16VSS[121] U17VSS[122] U24VSS[123] U25VSS[124] U26VSS[125] V2VSS[126] V13VSS[127] V15VSS[128] V24VSS[129] V27VSS[130] V28VSS[131] W6VSS[132] W24VSS[133] W25VSS[134] W26VSS[135] Y3VSS[136] Y24VSS[137] Y27VSS[138] Y28VSS[139] AA1VSS[140] AA24VSS[141] AA25VSS[142] AA26VSS[143] AB4VSS[144] AB6VSS[145] AB11VSS[146] AB14VSS[147] AB16VSS[148] AB19VSS[149] AB21VSS[150] AB24VSS[151] AB27VSS[152] AB28VSS[153] AC2VSS[154] AC5VSS[155] AC9VSS[156] AC11VSS[157] AD1VSS[158] AD3VSS[159] AD4VSS[160] AD7VSS[161] AD8VSS[162] AD11VSS[163] AD15VSS[164] AD19VSS[165] AD23VSS[166] AE2VSS[167] AE4VSS[168] AE8VSS[169] AE11VSS[170] AE13VSS[171] AE18VSS[172] AE21VSS[173] AE24VSS[174] AE25VSS[175] AF2VSS[176] AF4VSS[177] AF8VSS[178] AF11VSS[179] AF27VSS[180] AF28VSS[181] AG1VSS[182] AG3VSS[183] AG7VSS[184] AG11VSS[185] AG14VSS[186] AG17VSS[187] AG20VSS[188] AG25VSS[189] AH1VSS[190] AH3VSS[191] AH7VSS[192] AH12VSS[193] AH23VSS[194] AH27
C380
0.1U_0402_16V4Z
1
2
C403
0.1U_0402_16V4Z
1
2
C3530.1U_0402_16V4Z
1 2C
382
10U
_080
5_10
V4Z
1
2
C352
0.1U_0402_16V4Z
1
2
T47 PAD
R277
0.5_0805_1%
1 2
C383
0.1U_0402_16V4Z
1
2
C38
10.
1U_0
402_
16V
4Z
1
2
C37
5
0.1U
_040
2_16
V4Z
1
2
T46PAD
C37
30.
1U_0
402_
16V
4Z
1
2
C374
0.1U_0402_16V4Z
1
2
C357
0.1U_0402_16V4Z
1
2
R295
100_0402_5%
12
C376
0.1U_0402_16V4Z
1
2
T45 PAD
C355
0.1U_0402_16V4Z
1 2
C39
90.
01U
_040
2_16
V7K
1
2
D16
RB751V-40TE17_SOD323-2
@
12
C377
1U_0603_10V4Z
1
2
C38
80.
1U_0
402_
16V
4Z
1
2
+C340220U_B2_2.5VM_R35
1
2
C339
0.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
USB20_N1
WLAN_ACTIVE
USB20_P1
BT_ACTIVEBTON_LED
BT_ACTIVEWLAN_ACTIVE
WL_OFF#
WLAN_LED#
WLAN_CLKREQ#
PLT_RST_BUF#
ICH_PCIE_WAKE# +3VS_WLAN
+3V_WLAN
WLAN_LED#
CLK_PCIE_WLAN<15>
PCIE_PTX_C_IRX_P2<21>PCIE_PTX_C_IRX_N2<21>
PCIE_ITX_C_PRX_N2<21>PCIE_ITX_C_PRX_P2<21>
ICH_PCIE_WAKE#<21,24,29>
WLAN_CLKREQ#<15>
BT_LED#<34>
USB20_N1<21>USB20_P1<21>
BT_OFF#<31>
CLK_PCIE_WLAN#<15>
D_CK_SCLK <13,14,15>
PLT_RST_BUF# <7,16,19,21,24,27,29>WL_OFF# <31>
D_CK_SDATA <13,14,15>
USB20_P3 <21>USB20_N3 <21>
WLAN_BLUE_LED# <34>
+3VS_WLAN+3V_WLAN
+3VS
+1.5VS
+1.5VS
+5VS
+3VS
+5VS
+3VS_BT
+3VS
+3VS+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
Mini-Card/3G/FeliCa/FP
23 46Friday, May 18, 2007
2006/08/05 2007/08/05Compal Electronics, Inc.
Mini-Express Card for WLANMini-Express Card for 3G Or TV Tuner
2005/09/27 modified.Base on OPTION GTM351E Datasheet Rev0.1
Vcc 3.3V +/- 8%Peak Icc 2750mAwith max supply droop 50mAAverage Icc 1000mA
(WWAN_LED#)
BT MODULE CONN
R874 0_0402_5%WLAN@1 2
G
DS
Q8
AO3413_SOT23
BT@
2
13
R9810K_0402_1%BT@
12
C365
4.7U_0805_10V4ZWLAN@
1
2
R305 0_0402_5%@ 1 2
JP6
MOLEX_53780-0870ME@
1122334455667788GND19GND210
G
D
S
Q432N7002KW_SOT323-3
WLAN@
2
13
R9410K_0402_5%BT@
12
R875100K_0402_5%WLAN@
12
C60
0.1U_0402_16V4Z
BT@12
JP18
FOX_AS0B226-S56N-7FME@
1133557799111113131515171719192121232325252727292931313333353537373939414143434545474749495151
GND153
2 24 46 68 8
10 1012 1214 1416 1618 1820 2022 2224 2426 2628 2830 3032 3234 3436 3638 3840 4042 4244 4446 4648 4850 5052 52
GND2 54
R306 0_0402_5%@ 1 2
C368
0.01U_0402_25V7K WLAN@
1
2
Q9DTC114EKA_SC59-3BT@
2
13
R873 0_0402_5%@1 2
C370
0.1U_0402_16V4ZWLAN@
1
2
R500 0_0402_5%@ 1 2
R288
100K_0402_5%
@1 2
Q7DTC124EK_SC59
BT@
2
13
C367
0.1U_0402_16V4ZWLAN@
1
2
R871 0_0805_5%WLAN@
1 2
C364
4.7U_0805_10V4ZWLAN@
1
2
10K
47K
Q41DTA114YKAT146_SOT23-3
WLAN@
2
13
C369
0.1U_0402_16V4ZWLAN@
1
2
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PERST#
CPUSB#
CPUSB#
HDA_SYNC_MDC
CPUSB#
SUSP#
PERST#
PLT_RST_BUF#
SYSON
HDA_RST_MDC#AZ_SDIN3
USB_OC#2 ICH_PCIE_WAKE#<21,23,29>
USB20_P2<21>USB20_N2<21>
CLK_PCIE_EXP#<15>CLK_PCIE_EXP<15>
PCIE_PTX_C_IRX_N1<21>
PCIE_ITX_C_PRX_N1<21>PCIE_ITX_C_PRX_P1<21>
PCIE_PTX_C_IRX_P1<21>
HDA_RST_MDC#<20> HDA_BITCLK_MDC <20>HDA_SDIN1<20>
HDA_SDOUT_MDC<20>
HDA_SYNC_MDC<20>
ICH_SMBDATA<15,21,29>ICH_SMBCLK<15,21,29>
PLT_RST_BUF#<7,16,19,21,23,27,29>
SUSP#<16,31,36,40,42,43>
CPUSB#<21>
SYSON<31,36,42>
EXP_CLKREQ#<15>
USB_OC#2 <21>
+3VALW_CARD1
+3VS_CARD1
+1.5VS_CARD1
+3VALW_CARD1
+3VS_CARD1
+1.5VS_CARD1
+3V_STB
+1.5VS
+3VALW
+3VS
+3VALW
+1.5VS_CARD1
+3VALW_CARD1
+3VS_CARD1
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
NEW CARD & USB ConnectorB
24 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
60mils
40mil
40mil
Imax = 1.35A
Imax = 0.75A
Imax = 0.275A
New Card Socket (Left/TOP)
(NEW)
MDC CONN.
Express Card Power Switch
C223 0.1U_0402_16V4Z12
U11
R5538_QFN20
3.3Vin23.3Vin4 3.3Vout 3
3.3Vout 5
SYSRST#6
SHDN#20
STBY#1
PERST# 8
OC# 19
RCLKEN18
AUX_IN17 AUX_OUT 15
CPPE#10
CPUSB#9
NC 16
GND 7
1.5Vin121.5Vin14 1.5Vout 11
1.5Vout 13
R200 100K_0402_5%12
C210
10U_0805_10V4Z
@1
2
C213
10U_0805_10V4Z
1
2
R47510K_0402_5%
MDC@
C212 0.1U_0402_16V4Z12
C56022P_0402_50V8J@
1
2
C211
0.1U_0402_16V4Z
1
2
Connector for MDC Rev1.5
JP10
ACES_88018-124GME@
GND11IAC_SDATA_OUT3GND25IAC_SYNC7IAC_SDATA_IN9IAC_RESET#11
RES0 2RES1 43.3V 6
GND3 8GND4 10
IAC_BITCLK 12
GN
D13
GN
D14
GN
D15
GN
D16
GN
D17
GN
D18
R48110_0402_5%@
12
C202
10U_0805_10V4Z
1
2
C222 0.1U_0402_16V4Z12
C214
0.1U_0402_16V4Z
1
2
C201
0.1U_0402_16V4Z
1
2
R47433_0402_5%
MDC@1 2
JP9
FOX_1CH4110CME@
GND1USB_D-2USB_D+3CPUSB#4RSV5RSV6SMB_CLK7SMB_DATA8+1.5V9+1.5V10WAKE#11+3.3VAUX12PERST#13+3.3V14+3.3V15CLKREQ#16CPPE#17REFCLK-18REFCLK+19GND20PERn021PERp022GND23PETn024PETp025GND26
GND27GND28 GND 29
GND 30
C559
1U_0805_25V4Z
MDC@1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
MONO_IN1 MONO_IN
EAPD
HP_L
MONO_IN
LINE_OUTL
JACK_PLUG
EXT_MIC
HDA_SDIN0
C_HP_OUTR
HP_L
250_SDIN
HDA_BITCLK_AUDIO
EAPD
LINE_OUTR
HP_R
HP_R
C_HP_OUTL
EAPD
C_MIC
GPIO
C_LINE_OUTL
C_LINE_OUTR
LINE_OUTR
LINE_OUTL
GNDAGNDA GNDA
GPIO
BEEP#<31>
SB_SPKR<21>
LINE_OUTR <26>
JACK_PLUG_MIC<26>
HDA_SDOUT_AUDIO<20>
HP_R<26>
LINE_OUTL <26>
HDA_SYNC_AUDIO<20>
INT_MIC<26>
HDA_SDIN0 <20>
HDA_BITCLK_AUDIO <20>
JACK_PLUG<26>
EAPD<26,31>
EXT_MIC<26>
HP_L<26>
HDA_RST_AUDIO#<20>
+VDDA+VDDA
+5VS +5VAMP
+VDDC
+AVDD_AC97
+VDDA
+MIC1_VREFO_L
+MIC2_VREFO
+VDDA
+AUD_VREF
+3VS
+VDDA
+3VS
+MIC1_VREFO_L+MIC2_VREFO +AUD_VREF
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
IEL10 LA-3451P 0.2
ALC861 VD CodecCustom
25 46Friday, May 18, 2007
2006/08/04 2006/10/06Compal Electronics, Inc.
RST
EC_MUTE 12sec
DOS mode
Window mode
DOS mode
AC97 Codec
60mil4.85V
(output = 250 mA)28.7K for Module Design (VDDA = 4.702)
40mil
GND GNDA
RST
EC_MUTE 12sec
ACPI
Driver initialDOS mode
ALC262
ALC861D
SUB WOOFER SUPPORT
10mil
10mil10mil
10mil 10mil 10mil
R21410K_0402_1%@
12
C271 1U_0603_10V4Z12
R21622_0402_5%@
1 2
C280
10U_1206_10V4Z
1
2
C567
10U_0805_10V4Z
1
2
C5610.1U_0402_16V4Z
@1
2
R21710K_0402_1%
@
12
C2630.1U_0402_16V4Z
@1
2
L17
FBMA-L11-201209-221LMA30T_08051 2
R236
560_0402_5%
1 2
C56910U_0805_10V4Z
1
2
R227
560_0402_5%
1 2
C256 22P_0402_50V8J@
1 2
U15
SI9182DH-AD_MSOP8
VIN4
SD8
VOUT 5
GND 3
SENSE or ADJ 6
ERROR7 CNOISE 1
DELAY2
C552 4.7U_0603_6.3V6K
1 2
C273
1U_0603_10V4Z
12
C551 1U_0603_10V4Z@1 2
L40CHB1608U301_0603
1 2
C27810U_0805_10V4Z
1
2
C564 2.2U_0603_6.3V6K
1 2
C272470P_0402_50V7K
1 2
C557 1U_0603_10V4Z@1 2
C279
1U_0603_10V4Z
12
C267
0.1U_0402_16V4Z@
1
2
R49251K_0603_1%
12C572 680P_0402_50V7K
R467 20K_0402_1%
1 2
C259
10U_0805_10V4Z
1
2
C565 1U_0603_10V4Z1 2
R471 20K_0402_1%
12
R23010K_0402_1%
12
R238 20K_0402_5%
1 2
R23239.2K_0402_1%
1 2
C
BE
Q262SC2411KT146_SOT23-3
1
2
3
R213 0_0402_5% @1 2
R493150K_0603_1%
12
R22910K_0402_1%
12
U13
ALC861-VD-GR_LQFP48
LINE2_L14
LINE2_R15
MIC2_R17
MIC2_L16
LINE1_L23
LINE1_R24
CD_L18
CD_R20
CD_GND19
MIC1_L21
MIC1_R22
SENSE A13
PCBEEP12
FRONT_OUT_L 35
FRONT_OUT_R 36
NC 37
RESET#11
SYNC10
BIT_CLK 6
SDATA_OUT5
SDATA_IN 8
GPIO02GPIO13
NC 29
MIC2_VREFO 30
MIC1_VREFO_L 28
VREF 27
DVD
D1
1
DVD
D2
9
AVD
D1
25
AVD
D2
38
MIC1_VREFO_R 32
SIDESURR_OUT_R 46
EAPD47
SPDIFO48
DVSS14DVSS27
LINE2_VREFO 31
NC 33
SENSE B34
CEN_OUT 43
LFE_OUT 44
SIDESURR_OUT_L 45
JDREF 40
AVSS1 26AVSS2 42
SURR_OUT_L 39
SURR_OUT_R 41
C566 1U_0603_10V4Z1 2
C549 4.7U_0603_6.3V6K
1 2
C578
0.1U_0402_16V4Z
1
2
C556 2.2U_0603_6.3V6K
1 2
R21533_0402_5%
1 2
L37 0_0603_5%1 2
C553 2.2U_0603_6.3V6K
1 2
C257
0.1U_0402_16V4Z
1
2
C555
0.1U_0402_16V4Z
1
2
C260
0.1U_0402_16V4Z
1
2
C2640.1U_0402_16V4Z
@1
2
R463 0_0603_5%
1 2
R24510K_0402_1%
12
C261 1000P_0402_50V7K@1 2
D11
RB751V_SOD323
21 G
D
S
Q24BSS138LT1G_SOT23-3
@2
13
C285
1U_0603_10V4Z
12
R24210K_0402_1%
12
C573 680P_0402_50V7K
R212 0_0402_5%
1 2
R218CHB1608U301_0603
1 2
C563 2.2U_0603_6.3V6K
1 2
C258
0.1U_0402_16V4Z
1
2
R231
10K_0402_5%@
12
R482 0_0603_5%
1 2
R466 0_0603_5%
1 2
L16FBMA-L11-201209-221LMA30T_0805
@ 1 2
C270 10U_0805_10V4Z12
C262 1000P_0402_50V7K@1 2
R228 10K_0402_5%@1 2
R239 20K_0402_5%
1 2
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
AMP_CP+
AMP_EN#
HP_L
HP_LOUT
SPKR+
SPKL+SPKL-
SPKR-
VOL_AMP
HP_R
AMP_CP-
HP_ENHP_ROUT
AMP_BIAS
INR_AINL_A
INL_HINR_H
CVSS
EAPD
SPKR-SPKR+SPKL-SPKL+
INT_MIC
GNDA
EXT_MIC
GNDA
GNDA
GNDA
GNDA
HP_ROUT
HP_LOUT
JACK_PLUG_MIC
JACK_PLUG
SPK_L1+SPK_L1-SPK_R1+SPK_R1-
GNDA
PR-OUT
PL-OUT
GNDA
EXT_MIC_L-2
EXT_MIC_L-2
JACK_PLUGJACK_PLUG_MIC
PL-OUTPR-OUT
EC_MUTE#
EC_MUTE# VOL_AMP
LINE_OUTR<25>
LINE_OUTL<25>
HP_L<25>
HP_R<25>
EC_MUTE#<31>
EAPD<25,31>
INT_MIC <25>
EXT_MIC<25>
JACK_PLUG_MIC<25>
JACK_PLUG<25>
+5VAMP
+MIC2_VREFO
+MIC1_VREFO_L
+AUD_VREF
+5VAMP
+5VAMP
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
AMP/VR/Audio Jack/MICCustom
26 46Monday, May 21, 2007
Compal Electronics, Inc.2007/08/052006/08/05
fo=1/(2*3.14*R*C)=106HzR=1.5K / C= 1uF
APA2056 SPK/HP Amplifier
W=40mil
IN_A Gain = 10dB (Internal Speaker)IN_H Gain = 0dB (Headphone)
Place 1U cap between pin 1 and 29/5 ANPEC Suggest
Speaker Conn.20mil
INT MIC
SpeakerSpeakerHeadphone
End or Begain
Audio Jack
EXT MIC
C4
22P_0402_50V8J@
1
2
C3
22P_0402_50V8J@
1
2
C548
10P_0402_50V8J@
1
2
R2430_0402_5%
1 2
C546
10P_0402_50V8J
@
1
2
C269 1U_0402_6.3V4Z
1 2
R2 0_0402_5% 1 2
L38 FBM-11-160808-700T_06031 2
R254 100K_0402_5%
1 2
C275
10U
_080
5_10
V4Z
1
2
R4801K_0402_5%
12
R240 1.5K_0402_1%@1 2
C61
2
0.1U
_040
2_16
V4Z
@
R234 0_0402_5%@12
MIC1
WM-64PCY_2P 45@
12
R4653K_0402_5%
12
C1
22P_0402_50V8J@
1
2
L44 BLM15BB121SN1D_04021 2
R10_0402_5%@
12
G
D
SQ44
2N70
02_S
OT2
3
@
2
13
R4903K_0402_5%
12
C54247P_0402_50V8J
1
2
C2
22P_0402_50V8J@
1
2
R2470_0402_5%
1 2
R253 1.5K_0402_1%@1 2
C277
0.1U
_040
2_16
V4Z
1
2
C290
1U_0402_6.3V4Z
1
2
C547
10P_0402_50V8J@
1
2
C57447P_0402_50V8J
1
2
C268
1U_0402_6.3V4Z
1
2
R476 47_0402_5% 1 2
R226 100K_0402_5%
1 2
R477 47_0402_5% 1 2
JP2
ACES_87213-0400GME@
11 22 33 44GND 5GND 6
R87751K_0402_5%
12
R4 0_0402_5% 1 2
U16
APA2057RI-TRL_TSSOP28
INR_A3
PVD
D20
BEEP28
HVD
D19
LOUT- 9
PVD
D10
CVD
D11
LOUT+ 8/AMP EN27
HP EN24
VDD
1
CP+12
HP_L 18
ROUT+ 22
INR_H4
CP-14
SET/SD26
BIAS25
INL_H6
INL_A5
HP_R 17
ROUT- 21
GND 2PGND 23PGND 7CGND 13
CVSS 15VSS 16
GND 29
R488 39K_0402_5% 1 2
R491 39K_0402_5% 1 2
L36 FBM-11-160808-700T_06031 2
R5 0_0402_5% 1 2
R4731K_0402_5%
12
JP27
ACES_88028-1210MME@
11335577991111
2 24 46 68 8
10 1012 12
G113 G2 14G4 16G6 18G315
G517
R3 0_0402_5% 1 2
R233 0_0402_5% 12
C282 2.2U_0603_6.3V6K
R50
512
0K_0
402_
5%
@
12
C288 0.1U_0402_16V4Z
12
L39 FBM-11-160808-700T_06031 2
A
A
B
B
C
C
D
D
E
E
F
F
G
G
H
H
1 1
2 2
3 3
4 4
IDE_DD[0..15]
IDE_DA[0..2]
IDE_DA2IDE_DA1IDE_DA0
IDE_DIORDY
IDE_DD7
IDE_IRQ
IDE_DD14IDE_DD13IDE_DD3
IDE_DIOW#
IDE_DD0
IDE_DD5IDE_DD4
IDE_DD1IDE_DD2
IDE_LED#
IDE_DIOR#
IDE_DD8
IDE_DCS1#
IDE_DD6
IDE_PDIAG#
IDE_DDACK#
IDE_CSEL
SATA_ITX_C_DRX_P0SATA_ITX_C_DRX_N0
IDE_DD15
IDE_DD12IDE_DD11IDE_DD10
IDE_DDREQ
IDE_DCS3#
IDE_DD9
SATA_DTX_C_IRX_N0
SATA_DTX_C_IRX_P0
SATA_DTX_IRX_N0
SATA_DTX_IRX_P0
DRIVE_LED#SATA_LED#
IDE_LED#
IDE_DD[0..15]<20>
IDE_DA[0..2]<20>
IDE_DIOW#<20>IDE_DDACK# <20>
IDE_DDREQ <20>
IDE_DCS3# <20>
IDE_IRQ<20>
IDE_DIOR# <20>
IDE_DCS1#<20>
IDE_DIORDY<20>
SATA_ITX_C_DRX_P0<20>SATA_ITX_C_DRX_N0<20>
SATA_DTX_C_IRX_P0<20>
SATA_DTX_C_IRX_N0<20>
SATA_LED#<20>DRIVE_LED# <32>
IDERST_CD#<21>PLT_RST_BUF#19,21,23,24,29>
+5VS
+5VS+5VS +5VS
+5VS
+5VS
+3VS
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
HDD & ODD ConnectorB
27 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Placea caps. near ODD CONN.
IDE_CSELGrounding for Master (When use SATA HDD)Open or High for Slaver (Normal)
(NEW) Change Library(NEW)
SATA HDD Conn.
R206 470_0402_5% 1 2
C540
10U_0805_10V4Z@
1
2
C299
1U_0603_10V4Z
1
2
R210100K_0402_5%
1 2
C302
10U_0805_10V4Z
@1
2
R287 33_0402_5%
1 2
C295
0.1U_0402_16V4Z
1
2
C300
10U_0805_10V4Z
1
2
JP28
OCTEK_CDR-50DY1GME@
11 2 233 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 50
C312 1000P_0402_50V7K 1 2
C541
10U_0805_10V4Z
1
2
R314 0_0402_5%@ 1 2
C311 1000P_0402_50V7K 1 2
C249
1U_0603_10V4Z
1
2
JP14
SUYIN_127043FB022S338ZR_RVME@
GND1A+2A-3GND4B-5B+6GND7
V338V339V3310GND11GND12GND13V514V515V516GND17Reserved18GND19V1220V1221V1222
C247
0.1U_0402_16V4Z
1
2C248
1000P_0402_50V7K
1
2
C296
1000P_0402_50V7K
1
2
U12
DAP202U_SOT323-3
2
31
R209 100K_0402_5%
12
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
SDCMDSDWP#SD_MS_CLK
MSCD#
MSBS
SD_MS_DATA0
SD_DATA3
SD_MS_DATA1SD_DATA2
SD_MS_DATA0
MS_DATA3_SD_DATA6MS_DATA2_SD_DATA7
SD_MS_DATA1
SD_MS_DATA1SD_MS_DATA0
SD_DATA2SD_DATA3
SD_MS_CLK
SDWP#
SDCMD
SDCD#
MSBS
MS_DATA3_SD_DATA6
MS_DATA2_SD_DATA7RST#
RST#
MODE SEL
MODE SEL
XTLO
XTLI
XTLIXTLO
MSCD# SDCD#
SD_MS_CLK MSCLK
SDCLK
SDPWR0_MSPWR
USB20_N5
SDPWR0_MSPWR
USB20_P5USB20_P5<21>USB20_N5<21>
+3VS +VCC_3IN1
+VCC_3IN1
+5VS
+5VALW
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
1394+3 in 1 Card Custom
28 46Friday, May 18, 2007
2006/08/04 2006/10/06Compal Electronics, Inc.
40mil
3 in 1 Card Reader
Used 9701 by 10K
reserved power circuit
R4330_0402_5%CARD@
12
C53
81U
_060
3_10
V4Z
CAR
D@
1
2
C515 18P_0402_50V8J CARD@
C5261U_0603_16V4Z
CARD@
1
2
R4540_0402_5%
CARD@1 2
R501100K_0402_5%
CARD@
12
R496 0_0402_5%@ 1 2
R459
10_0402_5%@
12
R437100K_0402_5%
CARD@
12
RTS5158-GR_LQFP48_7x7
U25 CARD@
XD_D5/MS_BS/CF_A2_SP5 25SD_DAT1/XD_D3/MS_D1/CF_IORDY_SP6 26SD_DAT0/XD_D6/MS_D0/CF_RST#_SP7 27SD_DAT7/XD_D2/MS_D2/CF_IOWR#_SP8 28MS_INS#/CF_IORD#_SP9 29
CF_CS0# 30
SD_DAT6/XD_D7/MS_D3/CF_D15_SP10 31
DGND32
D3V333
SD_CLK/XD_D1/MS_CLK/CF_D7_SP11 34SD_DAT5/XD_D0/CF_D14_SP12 35
SD_CMD 36
AV_PLL1
RREF2
A3V33
DM4DP5
AGND6
A3V37
VBUS8
CARD_3V39
VREG 10D3V311
DGND12
CF_CD# 13
GPIO014
CF_D10 15CF_D9 16CF_D2 17
CF_D8/SM_CD#_SP0 18CF_D1/XD_CD#_SP1 19CF_D0/SM_WPM#/XD_WP_SP2 20CF_A0/SD_CD#_SP3 21
CF_DMACK# 22
CF_A1/XD_D4_SP4 23
CF_DMARQ 24
SD_DAT4/XD_WP#/CF_D6_SP13 37XD_RDY/CF_D13_SP14 38SD_DAT3/XD_WE#/CF_D5_SP15 39SD_DAT2/XD_RE#/CF_D12_SP16 40XD_ALE/CF_D4_SP17 41XD_CE#/CF_D11_SP18 42XD_CLE/CF_SP19 43
RST#44MODE_SEL45
AGND46
XTLI47XTLO48
R46
215
0K_0
402_
5%
@
12
C5310.1U_0402_16V4Z
CARD@
1
2
C511 18P_0402_50V8J CARD@
U26
RT9701CB_SOT25
@
VIN3VIN/CE4 VOUT 1
VOUT 5
GND2
R4380_0402_5%
CARD@12
C523
1U_0603_16V4ZCARD@
1 2
JP26
PROCO_MDR019-C0-1202ME@
GND23 GND22
SDIO_MS18BS_MS20
VSS_MS21
INS_MS16
VSS_SD8
SCLK_MS14
DAT1_SD10DAT2_SD2
CMD_SD4 WP_SD11
VCC_MS13
VDD_SD6
CD_SD1
RESERVED_MS17 RESERVED_MS15
VCC_MS19
CLK_SD7
DAT0_SD9
CD/DAT3_SD3
VSS_MS12
VSS_SD5
C5320.1U_0402_16V4Z CARD@
1
2
R497
0_0402_5%
CARD@1 2
C53
50.
1U_0
402_
16V
4Z
@
1
2
R458 22_0402_5%CARD@
1 2
C53710P_0402_50V8J
@
R43610K_0402_5%CARD@
12
C53610P_0402_50V8J
@
C5130.1U_0402_16V4Z@
1
2
C580 0.1U_0402_16V4Z CARD@1 2
R457
10_0402_5%@
12
R4476.19K_0402_1%
CARD@
12
C514
1U_0402_6.3V4ZCARD@
1
2
R446 22_0402_5%CARD@
1 2
Y2
12MHZ_16P_6X12000012
CARD@ 12
R495 0_0402_5%CARD@
1 2
A
A
B
B
C
C
D
D
E
E
4 4
3 3
2 2
1 1
LAN_CLK
CTL25
SI
XTALI
XTALO
CTL12
CTL12
PCIE_GND
REG_GND
CBE#1
+LAN_BIASVDD
+LAN_BIASVDD
PCIE_MRX_C_LTX_P3
PCIE_MRX_C_LTX_N3
LAN_TX0+LAN_RX1-
LAN_TX2-
LAN_TX0-
LAN_TX3-LAN_TX2+
LAN_TX3+
LAN_RX1+
XTALI
XTALO
CS#
LAN_CLK
LAN_DATASI
CS#
CTL25
LAN_DATALAN_CLKLAN_WP
REG_GND
PCIE_GND
LAN_WP
EN_WOL
CLK_PCIE_LAN#<15>
CLK_PCIE_LAN<15>
LAN_TX0- <30>
LAN_RX1- <30>
ICH_PCIE_WAKE#<21,23,24>
LAN_TX0+ <30>
LAN_RX1+ <30>
PLT_RST_BUF#<7,16,19,21,23,24,27>
CLKREQ_LAN#<15>
ACTIVITY# <30>
LINKLED# <30>
ICH_SMBDATA<15,21,24>
ICH_SMBCLK<15,21,24>
LAN_WAKE#<31>
EN_WOL<31>
PCIE_ITX_C_PRX_P3<21>
PCIE_PTX_C_IRX_P3<21>
PCIE_ITX_C_PRX_N3<21>
PCIE_PTX_C_IRX_N3<21>
+3VALW_VDDIO
+2.5V_LAN
+1.2V_LAN
+AVDDL
+PCIE_PLLVDD
+PCIE_VDD
+GPHY_PLLVDD
+1.2V_LAN
+XTALVDD
+2.5V_LAN
+LAN_AVDD
+PCIE_VDD
+1.2V_LAN
+2.5V_LAN
+3VALW_VDDIO+XTALVDD
+1.2V_LAN
+PCIE_PLLVDD
+AVDDL
+GPHY_PLLVDD
+LAN_AVDD
+3VS
+3VALW_VDDIO
+3VALW
+2.5V_LAN+3VALW_VDDIO
+3VALW_VDDIO
+3VALW_VDDIO
+VSB
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
IEL20 LA-3471P 0.1
BCM5787M-GLANCustom
29 46Friday, May 18, 2007
2006/08/04 2006/10/06Compal Electronics, Inc.
close to each of the pins 38, 45, and 52
(CLKREQ#) and (ENERGY_DET) areonly supported in BCM5787M
Layout Notice : Filter place as closechip as possible.
Notice : 4.7u 6.3V capactor Thickness 1.25mm
Layout Notice : Place as closechip as possible.Layout Notice : Filter place as close
chip as possible.
No CIS Symbol
Place closed to L14 & K14
SMBus to support ASF
Layout Notice : 1.2V filter. Place as closechip as possible.
Layout Notice : Place as closechip as possible.
Close to U87
Pin 24 conect to C1339 Pin1
Pin16 conect to C1206 Pin1
4.7uF
U30 C test change to 3413
C50
20.
1U_0
402_
16V4
Z
1
2
L29 FBM-L11-160808-601LMT_060312
C50
30.
1U_0
402_
16V4
Z
1
2
R416 4.7K_0402_5%@12
C46
00.
1U_0
402_
16V4
Z
1
2
R357 1K_0402_1%12
C50
50.
1U_0
402_
16V4
Z
1
2
C49
8
10U
_080
5_10
V4Z
1
2 C61
322
00P_
0402
_25V
7K
1
2
L28 FBM-L11-160808-601LMT_060312
C5080.1U_0402_16V4Z
1 2
C4434.7U_0805_6.3V6K
1
2
R502 0_0402_5%@1 2
C4750.1U_0402_16V4Z
1
2
C496
0.1U_0402_16V4Z
1
2
C47
60.
1U_0
402_
16V4
Z
1
2
R424 0_0402_5%1 2
C4780.1U_0402_10V7K
C455
0.1U_0402_16V4Z
1
2
C4500.1U_0402_16V4Z
1
2
L27 FBM-L11-160808-601LMT_060312
C510
0.1U_0402_16V4Z
1
2
R425 0_0402_5% 1 2
C4594.7U_0805_6.3V6K 1
2
Q33
MMJT9435T1G_SOT223
1
23
4
U87
VDDIO 6VDDIO 15VDDIO 19VDDIO 56VDDIO 61
VDDP 17VDDP 68
VDDC 5VDDC 13VDDC 20VDDC 34VDDC 55VDDC 60
VMAIN_PRSNT53
XTALI21
XTALO22
XTALVDD 23
VAUX_PRSNT54
UART_MODE9
AVDD 38AVDD 45AVDD 52
AVDDL 39AVDDL 44AVDDL 46AVDDL 51
BIASVDD 36PCIE_PLLVDD 30
PCIE_VDD 27PCIE_VDD 33
CLKREQ11
CS 62
ENERGY_DET59
GPHY_PLLVDD35
GPIO_0(SERIAL_DO)4
GPIO_1(SERIAL_DI)7
GPIO_28
LINKLED 2
LOW PWR3
PCIE_REFCLK_N28
PCIE_REFCLK_P29
PCIE_RXD_N32
PCIE_RXD_P31
PCIE_TXD_N25
PCIE_TXD_P26
PERST10
WAKE12
RDAC 37
REG_GND16
REGCTL12 14REGCTL25 18
SCLK(EECLK) 65SI 63
SMB_CLK58
SMB_DATA57
SO(EEDATA) 64
SPD1000LED 67SPD100LED 1
TRAFFICLED 66
TRD0_N 41TRD0_P 40TRD1_N 42TRD1_P 43TRD2_N 48TRD2_P 47TRD3_N 49TRD3_P 50
PCIE_GND24 GN
D69
R174
33K_0402_5%
1 2
Y1
25MHZ_20P
1 2
C4700.1U_0402_16V4Z 1
2
R380 1K_0402_5% 1 2
Q31MBT35200MT1G_TSOP6
3
41 2 5 6
C1320.1U_0603_25V7K
1
2
C509
10U_0805_10V4Z
1
2
R1664.7K_0402_5%
12
C504
0.1U_0402_16V4Z
1
2
C4534.7U_0805_6.3V6K
1
2
R1654.7K_0402_5%
12
C46
84.
7U_0
805_
10V4
Z
C1160.1U_0402_16V4Z
1 2
R422 200_0603_1%
12
R409 4.7K_0402_5%@1 2
G
D
SQ112N7002_SOT23
2
13
L30 FBM-L11-160808-601LMT_060312
U7
AT24C02_SO8
A0 1A1 2NC 3
GND 4
VCC8WP7SCL6SDA5
C4520.1U_0402_16V4Z 1
2
C48
10.
1U_0
402_
16V4
Z
1
2
R383 0_0402_5%@1 2
C45
64.
7U_0
805_
6.3V
6K
1
2
L31 FBM-L11-160808-601LMT_060312
C50
70.
1U_0
402_
16V4
Z
1
2
C4394.7U_0805_6.3V6K
1
2
C50
60.
1U_0
402_
16V4
Z
1
2
C512 4.7U_0603_6.3V6K
1 2
C48
60.
1U_0
402_
16V4
Z
1
2
R371 1K_0402_5% 1 2
C4510.1U_0402_16V4Z 1
2
C50
127
P_0
402_
50V8
J
1
2
R431 0_0402_5%1 2
C4840.1U_0402_10V7K
R427 0_0402_5%@1 2
L15FBM-L11-321611-260-LMT_1206
@
1 2
C49
527
P_0
402_
50V8
J
1
2
L35 FBM-L11-160808-601LMT_060312
C45
70.
1U_0
402_
16V4
Z
1
2
U30
AO4468_SO8
S 1S 2S 3G 4
D8D7D6D5
R426 4.7K_0402_5%1 2
R394 0_0402_5%@1 2
C4490.1U_0402_16V4Z1
2
L33 FBM-L11-160808-601LMT_060312
R419 4.7K_0402_5%1 2
C46
10.
01U
_040
2_25
V7K
1
2
C4880.1U_0402_16V4Z
1
2
C516 0.1U_0402_16V4Z 1 2R420 0_0402_5%@1 2
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RJ45_PR
MDO3-
MDO1+
MDO3+
MDO0+
LANGND
MDO1-
MDO2-
MDO0-
LAN_RX1+
LAN_RX1-
LAN_TX0-
LAN_TX0+
MDO0-
MDO1+
TCT
TCT
MCT0
MCT1
MDO1-
MDO0+
LAN_RX1+LAN_RX1-
LAN_TX0+LAN_TX0-
MDO2+
ACTIVITY#
LINKLED#LINKLED#<29>
LAN_RX1+<29>LAN_RX1-<29>
LAN_TX0-<29>LAN_TX0+<29>
ACTIVITY#<29>
+3VALW_VDDIO
+2.5V_LAN
+3VALW_VDDIO
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
LAN CONTROLLERCustom
30 46Friday, May 18, 2007
2006/08/04 2006/10/06Compal Electronics, Inc.
near LAN controller
10mil
10mil
Lan Conn.
Change T1 from SP050001210 to SP050001210
Change C468,C470,C473,C474,C475,C476 from 0.01uF to 0.1uF
R170 300_0402_5%1 2
R3310_0402_5%
12 JP21
TYCO_2-1734819-5ME@
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
Green LED+9
Green LED-10
Amber LED+11
Amber LED-12
SHLD4 16
SHLD3 15
SHLD2 14
SHLD1 13
R868 300_0402_5%@1 2
C413 0.1U_0402_16V4Z
1 2
R375 49.9_0402_1%12
C428 0.1U_0402_16V4Z
1 2
C4460.1U_0402_16V4Z1 2
R17875_0402_5%
12
R17575_0402_5%
12
T24
350uH_NS0013LF
RD+1RD-2CT3
CT6TD+7TD-8 TX- 9TX+ 10CT 11
CT 14RX- 15RX+ 16
NC4NC5 NC 13
NC 12
R867 300_0402_5%1 2
C616 220P_0402_50V7K@ 1 2
C618 220P_0402_50V7K@ 1 2
R866 300_0402_5%@1 2
C4470.1U_0402_16V4Z1 2
C61568P_0402_50V8K
@
12
R374 49.9_0402_1%12
C151
1000P_1206_2KV7K
1 2
R372 49.9_0402_1%12
R373 49.9_0402_1%12
C61768P_0402_50V8K
@
12
EC_SMB_DA1EC_SMB_CK1
KSO[0..15]
KSI[0..7]
EC_SMB_DA1
EC_SMB_CK1
EC_SMB_DA2
TP_DATA
TP_CLK
SPI_CS#
SPI_SIFWR#SPI_SI FRD#SPI_SO
SPI_CLK
SPI_SO
FSEL#SPICS#
SPI_CLK_R
SPI_CS#SPI_SO
SPI_SI
SPI_CLK_R
SKU_ID BRD_ID
EC_SMB_CK2
UMA_DES
USB_ON
FSEL#SPICS#
EC_SMB_DA2EC_SMB_CK2EC_SMB_DA1
KSI5
KSO15
XCLKI
CAPS_LED#
KSI3
EC_TX_P80_DATA
EC_SCI#
SPI_CLK
DAC_BRIG
BRD_ID
KSO14
LPC_AD0
KSO9
INVT_PWM
SUSP#
XCLKO
SKU_ID
EC
AG
ND
BATT_OVP
KSI7KSI6
KSO2
KSO0
LPC_AD2LPC_AD3
EC_LID_OUT#
TP_DATA
FAN_SPEED1
EC_SMI#
KSI0
EC_RST# UMA_DES
EN_FAN1
KSO13
KSO10
ACOFF
LID_SW#
PM_SLP_S3#
ECAGND
EC_ON
SYSON
KSO1
EC_RX_P80_CLK
BEEP#
KSO3
CHARGE_LED1#
IREF
KSI4
KSI2
KSO12
KSO8
KSO6
EC_THERM#
BKOFF#
TP_CLK
KSO5
FWR#SPI_SI
CHARGE_LED0#
KSO16
KSO7
LPC_AD1
KSO11
KSO4
PM_SLP_S5#
EC_MUTE#
EC_SMB_CK1
BATT_TEMP
KSI1
PBTN_OUT#
FRD#SPI_SO
SPI_CLK_R
ICH_POKICH_POK_EC
CLK_PCI_LPC<15>
KB_RST#<20>
KSO[0..15]<33>
KSI[0..7]<32,33>
EC_SMB_DA2<4>EC_SMB_CK2<4>
NUM_LED#<32>PWR_LED#<34>
PM_SLP_S3#<21>PM_SLP_S5#<21>EC_SMI#<21>
SUSP#<16,24,36,40,42,43>PBTN_OUT#<21>
GATEA20<20>
LPC_FRAME#<20>
LPC_AD2<20>LPC_AD1<20>
LPC_AD3<20>
LPC_AD0<20>
PCI_RST#<19>
EC_SCI#<21>
EC_RX_P80_CLK<13,14,33>EC_TX_P80_DATA<13,14,33>
BATT_OVP <40>BATT_TEMP <39>
DAC_BRIG <17>
TP_DATA <33>TP_CLK <33>
EC_THERM#<4,21>
ON/OFF#<32>
INVT_PWM <17>BEEP# <25>
ACOFF <38,40>
FAN_SPEED1<4>
LID_SW#<32>
EC_MUTE# <26>
LAN_WAKE#<29>
PCI_PME#<19>
SERIRQ<21> EN_WOL <29>
BT_OFF# <23>
ICH_POK <7,21>
EC_SMB_CK1<39>
EAPD <25,26>
CAPS_LED# <32>
ADP_I <40>
IREF <40>
VR_ON <44>
KILL_SW# <35>
CHARGE_LED1# <34>
PM_SLP_S4# <21>
EN_FAN1 <4>
EC_SMB_DA1<39>
EC_RSMRST# <21>
ACIN <21,38>
BKOFF# <17>
STB <36>
USB_ON <35>
SYSON <24,36,42>NOVO# <32>
KSO16<32>
EC_ON <32>
SCROLL_LED# <32>
EC_LID_OUT# <21>
CHARGE_LED0# <34>
ENBKL <17>
WL_OFF# <23>
FSTCHG <40>KSO17<32>
+5VALW
+5VALW
+3VALW+EC_AVCC
+3VALW
+3VALW+3VALW
+3VALW +EC_AVCC
+3VALW
+5VALW
+3VS
+3VALW
+5VS
+3VALW
+3VALW
+3VALW
+3V_STB
+3VALW
+3VALW
+3VALW
+3VS
+3VS
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
IGT30 LA-3571P 0.1
BIOS & EC I/O PortCustom
31 46Friday, May 18, 2007
2006/08/04 2006/10/06Compal Electronics, Inc.
Analog Board ID definition,Please see page 3.
KB925 SPI STRAP PIN
20mils8M SPI ROM
7
6
ID01
2345
IHL00/IGT30 UMA
IHL00/IGT30 VGA
IHLV3 UMA
IHLV2 VGA
UMA_DES
0V
0.25V
3.30V
2.20V
Vab
R01 (EVT)
R03 (PVT)R02 (DVT)
R10A (MP)7
R57/45(Ra)=100K Ohm
6
ID0
8.2K18K
R01 (EVT)
33KR03 (PVT)
56K100K200KNC
0V0.25V0.50V0.82V1.19V1.65V2.20V3.30V
R02 (DVT)
R10A (MP)
R54/42(Rb) VabBRD ID01
2345
IHL
IHL00
V2
IGT30
3/
R51
56K_
0402
_5%
@
12
R506 10K_0402_5%@1 2
R507 0_0402_5%@1 2
R22 10K_0402_5%
1 2
C19
15P_
0402
_50V
8J
C293
0.1U_0402_16V4Z
1
2
RB751V_SOD323D5 21
C40
1000P_0402_50V7K
1
2
R872 10K_0402_5%
1 2
U4
AT24C16AN-10SU-2.7_SO8
A0 1A1 2
SDA5 SCL6
VCC8
A2 3GND 4
WP7
R43 4.7K_0402_5%1 2
R49 4.7K_0402_5%1 2
R259 0_0402_5%
12
U18
SST25LF080A_SO8-200mil
S1
VCC8
Q 2
HOLD7
VSS 4
D5
C6
W3
C23
0.1U_0402_16V4Z
1
2
R52 10K_0402_5%
12
R16 0_0402_5%@
1 2
G
DS
Q12N7002_SOT23
@
2
13
R65100K_0402_1%
12
C48
1000P_0402_50V7K
1
2
R19 15_0402_5%
12
C6091U_0402_6.3V4Z@
1
2
R48 4.7K_0402_5%1 2
C35
22P_0402_50V8J@
12
JP11
E&T_2941-G08N-00E~DME@
11 2 233 4 455 6 677 8 8
C57
0.1U_0402_16V4Z1
2
C46
1000P_0402_50V7K
1
2
R63100K_0402_1%
12
R45100K_0402_1%
12
C610
10P_0402_25V8K@
12
R38 10_0402_5%@12
X1
32.768K_1TJS125BJ4A421P
OU
T4
IN1
NC
3
NC
2
C20
15P
_040
2_50
V8J
R260 0_0402_5%
12
R50100K_0402_1%
@
12
R54
33K_
0402
_5%
12
R42
200K_0402_5%GM@
R876 15_0402_5%@
12
R23 10K_0402_5%
12
L8
FBM-11-160808-601-T_0603
1 2
R34 4.7K_0402_5%1 2
L7 FBM-11-160808-601-T_0603
1 2
LPC & MISC
Int. K/B Matrix
SM Bus
GPIO
GPIO
AD Input
PWM Output
DA Output
PS2 Interface
SPI Device Interface
SPI Flash ROM
GPO
GPI
U1
KB926QFA1_LQFP128
GA20/GPIO001KBRST#/GPIO012SERIRQ#3LFRAME#4LAD35
PM_SLP_S3#/GPIO046
LAD27LAD18
VCC
9
LAD010
GN
D11
PCICLK12PCIRST#/GPIO0513
PM_SLP_S5#/GPIO0714EC_SMI#/GPIO0815LID_SW#/GPIO0A16SUSP#/GPIO0B17PBTN_OUT#/GPIO0C18EC_PME#/GPIO0D19
SCI#/GPIO0E20
INVT_PWM/PWM1/GPIO0F 21
VCC
22
BEEP#/PWM2/GPIO10 23
GN
D24
EC_THERM#/GPIO1125
FANPWM1/GPIO12 26ACOFF/FANPWM2/GPIO13 27
FAN_SPEED1/FANFB1/GPIO1428FANFB2/GPIO1529EC_TX/GPIO1630EC_RX/GPIO1731ON_OFF/GPIO1832
VCC
33
PWR_LED#/GPIO1934
GN
D35
NUMLED#/GPIO1A36
ECRST#37
CLKRUN#/GPIO1D38
KSO0/GPIO2039KSO1/GPIO2140KSO2/GPIO2241KSO3/GPIO2342KSO4/GPIO2443KSO5/GPIO2544KSO6/GPIO2645KSO7/GPIO2746KSO8/GPIO2847KSO9/GPIO2948KSO10/GPIO2A49KSO11/GPIO2B50KSO12/GPIO2C51KSO13/GPIO2D52KSO14/GPIO2E53KSO15/GPIO2F54
KSI0/GPIO3055KSI1/GPIO3156KSI2/GPIO3257KSI3/GPIO3358KSI4/GPIO3459KSI5/GPIO3560KSI6/GPIO3661KSI7/GPIO3762
BATT_TEMP/AD0/GPIO38 63BATT_OVP/AD1/GPIO39 64
ADP_I/AD2/GPIO3A 65AD3/GPIO3B 66
AVC
C67
DAC_BRIG/DA0/GPIO3C 68
AGN
D69
EN_DFAN1/DA1/GPIO3D 70IREF/DA2/GPIO3E 71
DA3/GPIO3F 72
CIR_RX/GPIO40 73CIR_RLC_TX/GPIO41 74
AD4/GPIO42 75SELIO2#/AD5/GPIO43 76
SCL1/GPIO4477SDA1/GPIO4578SCL2/GPIO4679SDA2/GPIO4780
KSO16/GPIO4881KSO17/GPIO4982
PSCLK1/GPIO4A 83PSDAT1/GPIO4B 84PSCLK2/GPIO4C 85PSDAT2/GPIO4D 86
TP_CLK/PSCLK3/GPIO4E 87TP_DATA/PSDAT3/GPIO4F 88
FSTCHG/SELIO#/GPIO50 89BATT_CHGI_LED#/GPIO52 90
CAPS_LED#/GPIO53 91BATT_LOW_LED#/GPIO54 92
SUSP_LED#/GPIO55 93
GN
D94
SYSON/GPIO56 95
VCC
96
SDICS#/GPXOA00 97SDICLK/GPXOA01 98SDIDO/GPXOA02 99
EC_RSMRST#/GPXO03 100EC_LID_OUT#/GPXO04 101
EC_ON/GPXO05 102EC_SWI#/GPXO06 103
ICH_PWROK/GPXO06 104BKOFF#/GPXO08 105
WL_OFF#/GPXO09 106GPXO10 107GPXO11 108
SDIDI/GPXID0 109
PM_SLP_S4#/GPXID1 110
VCC
111
ENBKL/GPXID2 112
GN
D11
3
GPXID3 114GPXID4 115GPXID5 116GPXID6 117GPXID7 118
SPIDI/RD# 119SPIDO/WR# 120
VR_ON/XCLK32K/GPIO57 121
XCLK1122XCLK0123 V18R 124
VCC
125
SPICLK/GPIO58 126
AC_IN/GPIO59 127
SPICS# 128
C590.1U_0402_16V4Z1 2
R36 4.7K_0402_5%1 2
C22
0.1U_0402_16V4Z
1
2
R21 10K_0402_5%
12
R59 47K_0402_5%1 2
C440.1U_0402_16V4Z 1
2
R44 4.7K_0402_5%1 2
C21
0.1U_0402_16V4Z
1
2
C25
0.1U_0402_16V4Z
1
2
R40 10K_0402_5%@1 2
R42
8.2K
_040
2_5%
PM@
12
R26 4.7K_0402_5%1 2
R57100K_0402_1%
12
R4710K_0402_5%
12
R257 0_0402_5%
12
hexa
inf@
hotm
ail.co
m
ON/OFFBTN#ON/OFF#
EC_ON
51_ON#
51_ON#NOVO_BTN#
NOVO#
NUM_LED#
ON/OFFBTN#SCROLL_LED#
CAPS_LED#DRIVE_LED#
NOVO_BTN#
KSO17KSI2KSI0 KSO16
NOVO_BTN#
ON/OFFBTN#
ON/OFF# <31>
51_ON# <38>
EC_ON<31>
51_ON#<38>
NOVO#<31>
DRIVE_LED#<27>CAPS_LED#<31>NUM_LED#<31>
SCROLL_LED#<31>
KSI2<31,33>
KSI0<31,33>
KSO17<31>
LID_SW# <31>
KSO16<31>
+3VALW
+5VALW
+3VALW
+5VS+5VALW
+3VALW
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
BIOS, I/O Port & K/B ConnectorB
32 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
TOP Side
Bottom Side
ON/OFF switch
Power Button
Switch Board Conn.
MUTE# KSI 0 & KSO16USER# KSI 2 & KSO17
LID Switch
D23
PSOT24C_SOT23
2 31
C2890.1U_0402_16V4Z
1
2
SW1
SMT1-05_4P
@3
2
1
4
56
C291
1000P_0402_50V7K
1
2
R10 0_0402_5%@1 2
D24
PSOT24C_SOT23
2 31
J1 JOPEN@12
R241 0_0402_5%1 2
C276
10P
_040
2_50
V8J
1
2
D4
DAN202U_SC70
2
31
JP4ACES_88716-1601-01
ME@
44
77
1010
1313
11
66
22
33
55
88
99
1111
1212
1414
1515
1616
GN
D17
GN
D18
D14
CH751H-40_SC76
21
D13
RLZ20A_LL34
12
R11 0_0402_5%@ 1 2
U14
A3212ELHLT-T_SOT23W-3
VDD
2
OUTPUT 3
GN
D1
J3 JOPEN@12
D12
DAN202U_SC70
2
31
R15
100K_0402_5%
12
R24447K_0402_5%
12
D22
PSOT24C_SOT23
2 31
R221100K_0402_5%
12
G
D
S
Q27
2N7002_SOT23
2
13
R258
10K_0402_5%
12
R255
100K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
KSO[0..15]
KSI[0..7]
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO6KSO8KSO7KSO4KSO2KSI0KSO1KSO5KSI3KSI2KSO0KSI5KSI4KSO9KSI6KSI7KSI1
KSO15KSO10KSO11KSO14KSO13KSO12KSO3
TP_DATA
TP_CLK
EC_TX_P80_DATAEC_RX_P80_CLK
TP_CLKTP_DATA
KSO[0..15] <31>
KSI[0..7] <31,32>
TP_CLK<31>TP_DATA<31>
EC_RX_P80_CLK<13,14,31>EC_TX_P80_DATA<13,14,31>
+5VS
+3VALW
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
EC ENE KB910L(Reserved)B
33 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
INT_KBD Conn.
Update Footprint
To TP/B Conn.
EC DEBUG PORT
For IHL00
C77 100P_0402_50V8J@1 2
JP8
ACES_87151-0807GME@
1122334455667788
C73 100P_0402_50V8J@1 2
C85 100P_0402_50V8J@1 2
C117
0.1U_0402_16V4Z
C74 100P_0402_50V8J@1 2
C62 100P_0402_50V8J@1 2
C69 100P_0402_50V8J@1 2
C78 100P_0402_50V8J@1 2
C67 100P_0402_50V8J@1 2
C65 100P_0402_50V8J@1 2
C80 100P_0402_50V8J@1 2
JP7
ACES_85202-24051ME@
112233445566778899101011111212131314141515161617171818191920202121222223232424G125G226
C64 100P_0402_50V8J@1 2
C75 100P_0402_50V8J@1 2
C61 100P_0402_50V8J@1 2
C68 100P_0402_50V8J@1 2
C70 100P_0402_50V8J@1 2
C84 100P_0402_50V8J@1 2
C63 100P_0402_50V8J@1 2
C76 100P_0402_50V8J@1 2
C79 100P_0402_50V8J@1 2
C81 100P_0402_50V8J@1 2
C83 100P_0402_50V8J@1 2
D10
PSOT24C_SOT23@
2 31
C66 100P_0402_50V8J@1 2
C86 100P_0402_50V8J@1 2
C82 100P_0402_50V8J@1 2
JP12
ACES_85205-0400ME@
11223344
hexa
inf@
hotm
ail.co
m
PWR_LED# <31>
BT_LED# <23>
WLAN_BLUE_LED# <23>
CHARGE_LED1# <31>
CHARGE_LED0# <31>
+3VALW
+5VALW
+3VS
+5VS
+5VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
MDC/CIR & LEDB
34 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
Blue&Amber
Amber
Blue
Blue
Amber
LED
R252
300_0402_5%
BT@1 2
R250
300_0402_5%1 2
R248
300_0402_5%1 2
R251
300_0402_5%WLAN@
1 2
R249300_0402_5%1 2
B
A
LED2HT-297UD/CB _BLUE/AMB_0603
LED@
2 1
4 3
LED3HT-191NB5-DT_BLUE_0603
12
B
A
LED1HT-297UD/CB _BLUE/AMB_0603
2 1
4 3
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+USB_VCCC
USB20_N0USB20_P0
USB_ON
KILL_SW#
+USB_VCCC KILL_SW#
USB20_N4USB20_P4
USB20_P7USB20_N7
USB20_N6
+USB_VCCA
USB20_P6
USB20_P0
USB20_P6 USB20_N0
USB20_N6USB_OC#4 <21>
USB_ON<31>
USB_ON<31>
USB_OC#0 <21>
USB_OC#6 <21>
USB20_N6<21>USB20_P6<21>
USB20_N0<21>USB20_P0<21>
KILL_SW# <31>
USB20_N4 <21>USB20_P4 <21>
USB20_N7 <21>USB20_P7 <21>
USB_OC#7 <21>
+USB_VCCC
+USB_VCCC+5VALW
+USB_VCCA
+5VALW+USB_VCCA
+USB_VCCA
+3VALW
+3VS+USB_VCCC
+USB_VCCC
+USB_VCCA
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
Power OK, Reset and RTC Circuit, TPB
35 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
W=80mils
USB Conn.
W=80mils
W=80mils
USB CONN. 1
USB CONN. 2
Kill SWITCH
W=80mils
C301
4.7U_0805_10V4Z
1
2
C18
470P_0402_50V7K@
1
2
JP24
SUYIN_020173MR004G579ZRME@
VCC1D-2D+3GND4
GND15GND26GND37GND48
D17
CM1293-04SO_SOT23-6
@
CH36
Vp5
CH44
CH2 3
Vn 2
CH1 1
+ C462
220U_V_6.3VM_R25
1
2
C5001000P_0402_50V7K@
1
2
+ C497150U_Y_6.3VM
1
2
U24
G545C1P1U_SO8
GND1IN2
FLG 5OUT 6
OUT 8
IN3EN#4
OUT 7
C294
0.1U_0402_16V4Z@
1
2
JP5
ACES_87213-1000GME@
1 12 23 34 45 56 67 78 89 910 10
GND1 11GND2 12
C473
470P_0402_50V7K
1
2
C528
470P_0402_50V7K
1
2
U17
G545C1P1U_SO8
GND1IN2
FLG 5OUT 6
OUT 8
IN3EN#4
OUT 7
D2DAN217_SC59
@ 231
C527 0.1U_0402_16V4Z
12
C499
470P_0402_50V7K@
1
2
JP22
SUYIN_020173MR004G579ZRME@
VCC1D-2D+3GND4
GND15GND26GND37GND48
R7
100K_0402_5%
12
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SUSPSUSP
SYSON
SUSP
SUSP
1.8VS_GATE
SUSP
5VS_GATE
SUSP SUSP SUSP SUSP SYSON#
SUSP
STB
SYSON#
SUSPSUSP<43>
SYSON<24,31,42>
SUSP#<16,24,31,40,42,43>
STB<31>
+5VALW
+5VALW
+5VALW
+3VALW +1.8V+3VS
+VSB
+1.8VS
+VSB
+5VS
+1.5VS +2.5VS +VCCP +1.8V+0.9VS
+VSB
+3VALW +3V_STB
+VSB
RTCVREF
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
DC InterfaceB
36 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
+3VALW TO +3VS+5VALW TO +5VS
+1.8V to +1.8VS
+3VALW to +3V Transfer
C229
10U_0805_10V4Z
1
2
G
D
S Q282N7002_SOT23
2
13
R203
470_0603_5%
12
U28
AO4468_SO8
S 1S 2S 3G 4
D8D7D6D5
R50810K_0402_5%
12
G
D
S Q172N7002_SOT23PM@
2
13
R137470_0603_5%
12
G
D
S Q102N7002_SOT23
2
13
R191470_0603_5%
12
Q22
DTC124EK_SC59
2
13
C185
1U_0603_10V4ZPM@
1
2
R235470_0603_5%
12
C571
10U_0805_10V4Z
1
2
R48320K_0402_5%
1 2
U9
AO4468_SO8PM@
S 1S 2S 3G 4
D8D7D6D5
C545
10U_0805_10V4Z
@
1
2
R20247K_0402_5%
1 2
R222100K_0402_5%
@
12
G
D
SQ18
2N7002_SOT23
2
13
G
D
S
Q36BSS138LT1G_SOT23-3@
2
13
R484
470_0603_5%
12
C227
10U_0805_10V4Z
1
2
C189
0.1U_0603_25V7KPM@
1
2
C539
10U_0805_10V4Z@
1
2
C226
1U_0603_10V4Z
1
2
G
D
S Q192N7002_SOT23
2
13
R193
470_0603_5%PM@
12
C215
10U_0805_10V4Z
1
2
G
D
SQ37
2N7002_SOT23
2
13
C191
10U_0805_10V4ZPM@
1
2
C568
0.1U_0603_25V7K
1
2
C184
10U_0805_10V4ZPM@
1
2
G
D
S Q202N7002_SOT23
2
13
G
D
S Q382N7002_SOT23
2
13
C190
10U_0805_10V4ZPM@
1
2
R224100K_0402_5%
@
12
G
D
SQ152N7002_SOT23PM@
2
13
C579
1U_0603_10V4Z
1
2
G
D
S Q162N7002_SOT23
2
13
G
D
S Q252N7002_SOT23
2
13
C209
0.1U_0603_25V7K
1
2
R211470_0603_5%
12
R46433K_0402_5%@
12
J4PAD-OPEN 3x3m
@
1 2
R225100K_0402_5%
12
R262470_0603_5%
12
C577
10U_0805_10V4Z
1
2
C5440.1U_0603_25V7K@
1
2
U10
AO4468_SO8
S 1S 2S 3G 4
D8D7D6D5
C575
10U_0805_10V4Z
1
2
R192180K_0402_5%PM@
G
D S
Q352N7002KW_SOT323-3
@
2
1 3
C543
0.1U_0402_16V4Z@
1
2
U27
AO4468_SO8
@
S 1S 2S 3G 4
D8D7D6D5
R223100K_0402_5%@
12
Q23
DTC124EK_SC59
2
13
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3691P 0.1
FAN & Screw HoleB
37 46Friday, May 18, 2007
2006/08/18 2007/8/18Compal Electronics, Inc.
FM5
1
H7H
@
1
H29H
@
1
H5H
@
1
FM2
1
H8H
@
1
H14H
@
1
H21H
@
1
CF6
1
H17H
@
1 CF8
1
H19H
@
1
CF1
1
H23H
@
1
FM6
1
H28H
@
1
H24H
@
1
H25H
@
1
FM3
1
H9H
@
1
CF3
1
H15H
@
1
H18H
@
1
H11H
@
1
H27H
@
1 CF5
1
H4H
@
1
H20H
@
1
H26H
@
1 CF2
1
H22H
@
1
FM4
1
H12H
@
1
H3H
@
1
H13H
@
1
H10H
@
1
H16H
@
1
CF7
1
H2H
@
1 CF4
1
H1H
@
1
H6H
@
1
FM1
1
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
PR
G++
CHGRTCP
PACIN
ACOFF<31,40>
ACON<40>MAINPWON<39,41>
PACIN <40>
PACIN <40>
ACIN <21,31>
51_ON#<32>
+CHGRTC
B+
VIN
RTCVREF
VIN
VL
VS
+5VALWP
+3VALWP
+5VALW
+3VALW
+5VALWP
+1.8VP +1.8V
+0.9VS+0.9VSP
+VCCP+VCCPP
+1.5VS+1.5VSP
+VSBP +VSB
RTCVREFBATT+
VIN
VIN
RTCVREF
VS
VS
ADPIN
+2.5VS+2.5VSP
VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
DCIN/DECTORB
38 46Friday, May 18, 2007
2005/10/17 2006/10/17Compal Electronics, Inc.
3.3V
Precharge detector Min. typ. Max.
H-->L 14.589V 14.84V 15.243V L-->H 15.562V 15.97V 16.388V
ACIN
(16A,800mils ,Via NO.= 24)
(6A,240mils ,Via NO.= 12)
(7A,280mils ,Via NO.=14) (8A,320mils ,Via NO.= 16)
(0.3A,40mils ,Via NO.= 2)
(2A,80mils ,Via NO.= 4)
BATT ONLY
L-->H 7.196V 7.349V 7.505V
Precharge detector Min. typ. Max.
H-->L 6.138V 6.214V 6.359V
Vin Detector
High 18.764 17.901 17.063Low 17.745 16.9 16.033.3V
(6A,240mils ,Via NO.=12) (1A,40mils ,Via NO.= 2)
DC030005Q00
PQ3DTC115EUA_SC70-3
2
13
PJP1
JST_B4B-EH-A(LF)(SN)
1 1
3 3
4 4
2 2
PU1ALM393DG_SO8
+3
-2 O 1
P8
G4
PC
110
00P
_040
2_50
V7K
12
PJ2PAD-OPEN 3x3m
21
PU2
G920AT24U_SOT89-3
IN 2
GND
1
OUT3
PR
1949
9K_0
402_
1%
12
PR3147K_0402_1%
12
PR182.2M_0402_5%
12
PR
2719
1K_0
402_
1%
12
PD2
LL4148_LL34-2
12
PC
410
00P
_040
2_50
V7K
12
PR61M_0402_1%
1 2
PC
110.
1U_0
603_
25V
7K
12
PC50.01U_0402_25V7K@1 2
PC
1310
00P
_040
2_50
V7K
12
PR
1084
.5K
_040
2_1%
12
PC
310
0P_0
402_
50V
8J
12
PR
910
0K_0
402_
5%
12
PD5
RB751V-40_SOD323-2
12
PR
2068
_120
6_5%
1
2
PJ3 PAD-OPEN 3x3m1 2
PR2922K_0402_1%
1 2
PQ4TP0610K-T1-E3_SOT23-3
2
13
PJ6PAD-OPEN 3x3m
1 2
PR1322K_0402_1%
1 2
PD6
BAS40CW_SOT323-3
2
31
PQ1TP0610K-T1-E3_SOT23-3
2
13
PR
1110
K_0
402_
1%
12
G
D
S
PQ5
2N7002W-T/R7_SOT323-3
2
13
PD3
GLZ4.3B_LL34-2
12
PR
3266
.5K
_040
2_1%
@
12
PC
610
00P
_040
2_50
V7K
12
PJ7PAD-OPEN 3x3m
1 2
PC
140.
01U
_040
2_25
V7K
12
PR25200_0805_5%
12
PC
210
0P_0
402_
50V
8J
12
PC
70.
1U_0
402_
16V
7K
12
PC
100.
22U
_120
6_25
V7K
12
PR
110
_120
6_5%
12
PC
120.
1U_0
603_
25V
7K
12
PR71K_1206_5%
1 2
PJ4PAD-OPEN 3x3m
1 2
PJ5PAD-OPEN 3x3m
1 2
PR
1520
K_0
402_
1%
12
PR
810
0K_0
402_
5%
12
PJ8
JUMP_43X7911 2 2
PR31K_1206_5%
1 2
PR
2168
_120
6_5%
12
PC
84.
7U_0
805_
6.3V
6K
12
PR23560_0603_5%
1 2
PR21K_1206_5%
1 2
PR410K_0402_1% @1 2
PD
1R
LZ24
B_L
L341
2
PC
91U
_080
5_25
V4Z
12
PR3034K_0402_1%
12
PR
2610
0K_0
402_
5%
12
PR1210K_0402_1%
1 2
PL11FBMA-L11-322513-201LMA40T_1210
1 2
PR1710K_0402_1%
12
PR
1610
K_0
402_
1%
12
PR51K_1206_5%
1 2
PR24560_0603_5%
1 2
PR
2849
9K_0
402_
1%
12
PR
2210
0K_0
402_
1%
12
PD4LL4148_LL34-2
12
PJ10PAD-OPEN 3x3m
1 2
PU1BLM393DG_SO8
+ 5
- 6O7
P8
G4
PQ2DTC115EUA_SC70-3
2
13
PR
1410
0K_0
402_
5%
12
PQ6DTC115EUA_SC70-3
2
13
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
TM_REF1
TS
SMCSMD
B/IID
GND
BATT++
MAINPWON <38,41>
BATT_TEMP <31>
EC_SMB_CK1 <31>
EC_SMB_DA1 <31>
SPOK<41>
ALI/MH# <40>
B+ +VSBP
VL
VL
VL
VS
VL
VS
+3VALWP
BATT++
BATT+
+3VALWP
+3VALWP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
BATTERY CONN. / OTPB
39 46Friday, May 18, 2007
2005/10/17 2006/10/17Compal Electronics, Inc.
Recovery at 70 degree CCPU thermal protection at 85 degree CPH1 under CPU botten side :
DC040003600
IHL00 LA-3691P
PC
1910
00P
_040
2_50
V7K
12
PR351K_0402_1% 1
2
PR
3815
0K_0
402_
1%
12
PL12HCB4532KF-800T90_1812
1 2
PQ7TP0610K-T1-E3_SOT23-3
2
13
PR
4010
0_04
02_1
%
12
PR
4615
0K_0
402_
1%
12
PC
230.
1U_0
402_
16V
7K
12
PU3ALM393DG_SO8
+3
-2 O 1
P8
G4
PC
170.
01U
_060
3_50
V7K
12
PH
110
0K_0
603_
1%_T
H11
-4H
104F
T
12
PR39442K_0603_1%
1 2
PR4269.8K_0603_1%
1 2
PR4822K_0402_1%
1 2
PR
361K
_040
2_5%
1
2
PR
3710
.5K
_040
2_1%
12
PR
4710
0K_0
402_
5%
12
PC
1610
00P
_060
3_50
V7K
12
PR34
100K_0402_5%@
1 2
PC
220.
1U_0
603_
25V
7K
12
PU3BLM393DG_SO8
+5
-6 O 7
P8
G4
PR
4110
0_04
02_1
%
12
PC
201U
_060
3_6.
3V6M
12
PR43150K_0402_1%
12
PR446.49K_0402_1%
1 2
G
D
S
PQ8
2N7002W-T/R7_SOT323-3
2
13
PR500_0402_5%@
1 2
PR
451K
_040
2_1%
12
PJ20
JUMP_43X79
11 2 2
PJP2
SUYIN_200275MR009G180ZR
1 1
3 34 45 56 6
9 9
2 2
7 78 8
G1 10G2 11
PC
210.
22U
_120
6_25
V7K
12
PC
180.
1U_0
603_
25V
7K
12
PR33100K_0402_5%
1 2
PR
4910
0K_0
402_
5%
12
PC
1510
00P
_060
3_50
V7K
12
hexa
inf@
hotm
ail.co
m
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
CHG
PACIN
ACON
CSIP CSIN
CSOPDH_CHG
LX_CHG
6251VDDP
6251VREF
6251DC_IN
CSON
6251VDD
6251VREF
BST_CHG
DL_CHG
6251VREF
6251DC_IN
FSTCHG
CSON
CELLS
6251_EN
6251VDD
6251_EN
CSON
6251VREF
BST_CHGA
CELLS6251VDD
CSIP
CSOP
CSIN
CSON
IREF<31>
ACON<38>
PACIN<38>
ADP_I<31>
ACOFF<31,38>
ACOFF <31,38>
BATT_OVP<31>
PACIN <38>
CHGSEL
SUSP# <16,24,31,36,42,43>
FSTCHG<31>
ALI/MH#<39>
VIN
VIN
BATT+
P2 P3
B+
CHG_B+
BATT+VS
VIN
BATT+
VIN
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
CHARGER
40 46Friday, May 18, 2007
Compal Electronics, Inc.2007/05/182006/05/18
CC=0.6~3.4A
IREF=0.5832V~3.3VIREF=0.972*Icharge
Iinput=(1/0.02)(0.05*Vaclm/2.39+0.05)where Vaclm=0.5535V, Iinput=3.079Awhere Vaclm=0.6667V, Iinput=4.263A
ADP_I = 19.9*Iadapter*Rsense
OVP voltage :LI-3S :13.50V--BATT-OVP=1.5V
BATT-OVP=0.111*BATT+
65W, Iadapter=0~3.42A, Current sense=0.02ohm, PR69=39.2K, CP=3.079A90W, Iadapter=0~4.74A, Current Sense=0.015ohm, PR69=28.7K, CP=4.263A
CP mode
If this area float, Charge voltage is 4.2V/cellVCHLM=0.24V~1.36V
BATT Type Charging Voltage (0x15) ALI/MH#
4800mAH 3S pack 16800mV
2400mAH 4S pack 12600mV
CV mode
HIGH
LOW 16.8V
12.60V
LI-4S :18V--BATT-OVP=2.0V
PR60150K_0402_1%
12
PQ19
SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC
2722
00P
_040
2_50
V7K
12
PC370.01U_0402_25V7K
12
PQ9AO4407_SO8
365
78
2
4
1
PC410.1U_0603_25V7K
12
PQ17SI4800BDY-T1-E3_SO8
<BOM Structure>
S1
S2
S3
G4
D8
D7
D6
D5
PR75340K_0402_1%
12
PQ14DTC115EUA_SC70-3
2
13
PR5847K_0402_5%
1 2
PC366800P_0402_25V7K
12
PC
2410
U_1
206_
25V
6M
12
PQ45DTC115EUA_SC70-3
2
13
PR68
2.2_0603_5%
1 2
PC312.2U_0603_6.3V6K
12
PR74100K_0402_1%@
12
PC1560.1U_0402_16V7K
12
PU4
ISL6251AHAZ-T_QSOP24
EN3
CELLS4
VDD1
ACSET2
ICOMP5
VCOMP6
CHLIM9
ACPRN 23
CSIP 19
UGATE 17
PHASE 18
BOOT 16
PGND 13GND12
ICM7
VREF8
VADJ11
DCIN 24
CSIN 20
ACLIM10
LGATE 14
VDDP 15
CSOP 21
CSON 22
PR5247K_0402_1%
12
PC32
0.1U_0603_25V7K
12
PU5A
LM358ADR_SO8
+ 3
- 201
P8
G4
PR7710K_0402_1%
1 2
PC480.01U_0402_25V7K
12
PR210100K_0402_1%
12
PD10
RB751V-40_SOD323-2
12
PD81SS355_SOD323-2
1 2
PJ12
JUMP_43X11811 2 2
PD16
BAS40CW_SOT323-3
2
31
PR64100_0402_1%
1 2
PR61 20_0603_5%
1 2
PR7210K_0402_1%
12
PR7039.2K_0402_1%
1 2
PC
2510
U_1
206_
25V
6M
12
PQ10AO4407_SO8
3 65
78
2
4
1
EB
C PQ44
2SC2411KT146_SOT23-3@
23
1
PR5447K_0402_1%
1 2
G
D
S
PQ16
2N7002W-T/R7_SOT323-3
2
13
PR
208
100K
_040
2_1%
12
PC
2956
00P
_040
2_25
V7K
12
PC
157
0.01
U_0
402_
25V
7K
12
PQ20
DTC115EUA_SC70-3
2
13
PC
460.
01U
_040
2_25
V7K
12
PR67143K_0402_1%
12
PC34680P_0402_50V7K@
1 2
PC
330.
1U_0
603_
25V
7K
12
PQ11AO4407_SO8
3 65
78
2
4
1
PC
470.
01U
_040
2_25
V7K
@
12
PR73274K_0402_1%@
1 2
PR56200K_0402_1%
1 2
G
D
S
PQ15
2N7002W-T/R7_SOT323-3
2
13
PR53200K_0402_1%
12
PR69100K_0402_1%
12
PR78105K_0402_1%
12
PQ42TP0610K-T1-E3_SOT23-3
2
13 PD7
1SS355_SOD323-2
1 2
PR5710K_0402_5%
12
PR209100K_0402_1%
1 2
PQ43DTC115EUA_SC70-3
2
13
PC
4210
U_1
206_
25V
6M
12
PQ21
SI2301BDS-T1-E3_SOT23-3@2
13
PR76499K_0402_1%
12
PC39100P_0402_50V8J
1
2
PR6310K_0402_1%
12
PC400.1U_0402_16V7K
12
PD9
1SS355_SOD323-2
1 2
PR2202.2_0603_5%
1 2
PC350.047U_0603_25V7M
12
PC380.1U_0603_25V7K
12
PC
4310
U_1
206_
25V
6M
12
PC
44
0.01
U_0
402_
25V
7K
12
PC30
0.1U_0603_25V7K
12
PQ13DTC115EUA_SC70-3
2
13
PR6622K_0402_1% 1 2
G
D
S
PQ18
2N7002W-T/R7_SOT323-3
2
13
PQ12DTA144EUA_SC70-3 2
13
PR510.02_2512_1%
1
3
4
2
PR21920_0603_5%
1 2
PR650.02_2512_1%
1
3
4
2P
R59
100K
_040
2_1%
12
PC454.7U_0805_6.3V6K
12
PR21120K_0402_1%
12
PL110U_LF919AS-100M-P3_4.5A_20%
1 2
PC
260.
1U_0
603_
25V
7K
12
PR714.7_0603_5%
1 2
PC
280.
1U_0
603_
25V
7K
12
PR5510K_0402_1%
12
PR62 20_0603_5%
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
8734_VREF
LX5
LX3
BST3A
BST3BBST5B
DH5
BST5A
DH3
3HG
DL3
DL5
5HG
MAINPWON <38,39>
SPOK<39>
B+++
+3VALWP
VL
+5VALWP
B+
VL
8734_VREF
VS
B+++
B+++
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
+5VALWP/+3VALWPCustom
41 46Friday, May 18, 2007
2005/10/17 2006/10/17Compal Electronics, Inc.
+3.3V Ipeak = 6.66A ~ 10A
+5V Ipeak = 6.66A ~ 10A
VFB=2V
PQ
25S
I481
0BD
Y-T
1-E
3_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PR
8520
0K_0
402_
1%
12
PR
790_
0603
_5%
12
PC490.1U_0402_16V7K
<BOM Structure>
1 2
PL2
10U
H_1
164A
Y-1
00M
=P3_
4.7A
_20%
<BOM Structure>
12
+
PC
6233
0U_D
3L_6
.3V
M_R
25M
1
2PR
9610
0K_0
402_
5%
12
PR
870_
0603
_5%
12
PQ
22S
I480
0BD
Y-T
1-E
3_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PC500.1U_0402_16V7K
1 2
PR
8849
9K_0
402_
1%
12
PR9347K_0402_1%
1 2
PC
640.
047U
_060
3_16
V7K
12
PR830_0603_5%
1 2
PZD1
GLZ5.1B_LL34-2
1 2
PC
600.
047U
_060
3_16
V7K
12
PC
51
10U
_120
6_25
V6M
12
PC
520.
1U_0
402_
16V
7K
12
PR910_0402_5%
1 2
PR
9010
.5K
_040
2_1%
12
PR
804.
7_12
06_5
% 12
PC
610.
22U
_060
3_16
V7K
12
PR
8949
9K_0
402_
1%
12
PQ
23S
I480
0BD
Y-T
1-E
3_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PR9847K_0402_1%
1 2
PR
8247
_040
2_5%
12
PU7
MAX8734AEEI+_QSOP28
LX515DL519
BST514
DH516
OUT521FB59
SHDN#6ON54
GN
D23
ILIM5 11
DH3 26
LX3 27
TON
13
DL3 24
OUT3 22
FB3 7PGOOD 2SKIP#12
ON33
REF8
PR
O#
10V
CC
17
V+
20
ILIM3 5
BST3 28
LDO
325
LD05
18
N.C.1
PR
9910
K_0
402_
1%
12
PR
8620
0K_0
402_
1%
12
PC
580.
1U_0
603_
25V
7K
12P
C56
4.7U
_080
5_6.
3V6K
12
PJ13JUMP_43X118
11
22
PC
54
10U
_120
6_25
V6M
12
PC
651U
_060
3_6.
3V6M
12
PR
956.
81K
_040
2_1%
12
PL3
10U
H_1
164A
Y-1
00M
=P3_
4.7A
_20%
12
PR
970_
0402
_5%
12
PC
5322
00P
_040
2_50
V7K
12
PC
571U
_080
5_16
V7K
12
PR940_0402_5%
12
PD11
BAW56W_SOT323-3
1
3 2
PR
926.
81K
_040
2_1%
12
PQ
24S
I481
0BD
Y-T
1-E
3_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PC
551U
_080
5_25
V4Z
12 P
R84
0_06
03_5
%
12
PR
814.
7_12
06_5
%
@
12
PC
63
4.7U
_080
5_6.
3V6K
12
+
PC
5915
0U_D
2_6.
3VM
1
2
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LX_1.8V
DH_1.8V-1
DH_1.8V
DH_1.05V
DL_1.8V
BST_1.05V
BST_1.8V
ILIM_1.05V
LX_1.05V
ILIM_1.8V
FB_1.8V
FB_1.05V
Vout_1.8V
Vout_1.05V
PGOOD1_1.8V
B+_1.8/1.05
B+_1.8/1.05
VCCA_1.05V
VCCA_1.05V
VCCA_1.8V
+5VALW
+5VALW
FB_1.8V
BST_1.05V-1BST_1.8V-1
Vout_1.8V
FB_1.05V
Vout_1.05V
PGOOD2_1.05V
VCCA_1.8V
DH_1.05V-1
DL_1.05V
SYSON<24,31,36>
SUSP#<16,24,31,36,40,43>
+VCCPP
+1.8VP
B+B+_1.8/1.05
B+_1.8/1.05
+5VALW
+5VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
+VCCPP/+1.8VP
Custom
42 46Friday, May 18, 2007
2007/01/16 2008/01/16Compal Electronics, Inc.
VFB=0.5V
Maximum continuous current=>6A
Maximum continuous current=>6A
OCP==>8.273A~14.106A
OCP==>17.029A~30.641A
Max:11.5 mOhm
FDS6670AS:Rds(on)=>Typ:9 mOhm
VFB=0.5V
Vo=VFB*(1+PR122/PR127)=1.805V
Ton=(3.3E-12*(PR121+37K)*(Vout/VBat))+50ns
Iocp=Ivalley+ Iripple� �/2
Ivalleymin=10E-6*(PR120/Rds(ON)max*1.5)
Iripple=(vin-vout)*(Ton/L)=5.467A, 1/2 Iripple=2.734A.
Max:27 mOhm
AO4916 Rds(on)=>Typ:21 mOhm
VFB=0.5V
Vo=VFB*(1+PR129/PR130)=1.5V
Ton=(3.3E-12*(PR125+37K)*(Vout/VBat))+50ns
Iocp=Ivalley+ Iripple� �/2
Ivalleymin=9*10u*(29.4K/0.027*1.4)=7A
Iripple=(vin-vout)*(Ton/L)=2.546A, 1/2Iriiple=1.273A
Close to IC Side
Differential routing of feedback to VSSA2 and VOUT2 PIN
Close to IC Side
Differential routing of feedback
to VSSA1 and VOUT1 PIN
Ipeak=12.17A, Imax=8.519A
=3.3*10e-12*(820K+37K)*(1.8/19)+50ns=0.3179us
Ivalleymax=10E-6*(PR120/Rds(ON)typ*1.2)
Ipeak=5.16A, Imax=3.612A
=0.3201us
Ivalleymax=11*E-6*(29.4K/0.021*1.1)=12.833A
=9*10e-6*(27.4K/0.0115*1.5)=14.295A>11.73*1.2=14.076A
=11*10e-6*(27.4K/0.009*1.2)=27.907A.
PL41.8UH_1164AY-1R8N=P3_9.5A_30%
1 2PR109
34K_0402_1%
1 2
PL51.8UH_1164AY-1R8N=P3_9.5A_30%
1 2
PQ28SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PR10710K_0402_1%
12
+
PC
7133
0U_D
2_2V
_Y
1
2
PQ29SI4810BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC832.2U_0603_6.3V6K
12
PC80
1U_0603_10V6K1 2
+
PC
8522
0U_D
2_4V
Y_R
15M
1
2
PC
874.
7U_1
206_
25V
6K
12
PQ26
SI4800BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PR
106
11K
_040
2_1%
12
PC
664.
7U_1
206_
25V
6K1
2
PD12
BAW56W_SOT323-3
1
32
PC82
0.1U_0603_25V7K
1 2
PR10110_0603_5%
12
PQ27SI4810BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PU8
SC413TSTRT_TSSOP28
DL12
VDDP13
LX15
DH16
PGD1 27
TON1 23
FB1 26
VCCA1 25
EN/PSV28
TON29
VOUT210
VCCA211
FB212
VSSA214
PGND11
PGD213
VOUT1 24
VSSA1 28
EN/PSV1 22
BST2 21
DH2 20
VDDP2 17
LX2 19
ILIM2 18
DL2 16
PGND2 15
ILIM14
BST17
PC1680.1U_0402_16V7K@1
2
+
PC
6933
0U_D
2_2V
_Y
@
1
2
PC72
0.1U_0603_25V7K
1 2PR108
0_0402_5%
1 2
PR112
820K_0402_5%12
PC781U_0603_10V6K
12
PC7433P_0402_50V8K
12
PC700.1U_0402_16V7K 1
2
PC841000P_0402_50V7K
1 2
PR1020_0402_5%
1 2
PR100100K_0402_5%
@
12
PR
122
26.1
K_0
402_
1%
12
PR11010_0603_5%
12
PC
901U
_060
3_10
V6K
12
PR113100K_0402_5%
@
12
PR114 27.4K_0402_1%
1 2
PC681000P_0402_50V7K
12
PR10356K_0402_5%
1 2
PR12110K_0402_1%
12
PR1190_0402_5%
1 2
PJ14
JUMP_43X118
11 2 2
PC
864.
7U_1
206_
25V
6K
12
PC8933P_0402_50V8K
12
PC
674.
7U_1
206_
25V
6K12
PC
911U
_060
3_10
V6K
12
PR1161M_0402_5%
12
PR1240_0402_5%
1 2
PR115
0_0402_5%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PGOOD2_1.5V
DH_1.5V
BST_1.5V
ILIM_1.5V
LX_1.5V Vout_1.5V
FB_1.5V
Vout_1.5V
B+_1.5VSP
VCCA_1.5V
VCCA_1.5V
+5VALW
FB_1.5V
BST_1.5V-1
DL_1.5V
SUSP#<16,24,31,36,40,42>
SUSP<36>
SUSP#<16,24,31,36,40,42>
B+_1.5VSP
+1.5VSP
B+
+5VALW
+5VALW
+3VALW
+0.9VSP
+1.8V
+5VS
+3VS
+2.5VSP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
1.5VSP/2.5VSP/0.9VSP
Custom
43 46Friday, May 18, 2007
2005/10/17 2006/10/17Compal Electronics, Inc.
Vo=VFB*(1+PR146/PR147)=1.05V
The current rating of +1.05VSP include +VCC_GFX current.
=9*10E-6*(26.1K/(0.0115*1.5))=13.617A
Ivalleymax=11*10E-6*(PR145/Rds(ON)min*1.2)
=11*10E-6*(26.1K/(0.009*1.3))=20.076A
VFB=0.5V
Maximum continuous current=>6A
OCP==>15.763A~22.222A
Max:11.5 mOhm
SI4810BDY:Rds(on)=>Typ:9mOhm
VFB=0.5V, Ipeak=14.02A, Imax=9.814A
Ton=(3.3E-12*(PR142+37K)*(Vout/VBat))+50ns=0.2391us
Iocp=Ivalley+ Iripple /2� �
Ivalleymin=9*10E-6*(PR145/Rds(ON)max*1.5)
Iripple=(vin-vout)*(Ton/L)=4.292A, 1/2Iripple=2.146A
Close to IC Side
Differential routing of feedback to VSSA2 and VOUT2 PIN
PR207
0_0402_5%
1 2
PL61.8UH_1164AY-1R8N=P3_9.5A_30%
1 2
PC155
0.01U_0402_25V7K
12
PC1660.1U_0402_16V7K@
12
PC15910U_0805_6.3V6M
12
PC
934.
7U_1
206_
25V6
K
12
PR
132
20K_
0402
_1%
12
PR12710_0603_5%
12
PC1670.1U_0402_16V7K
12
PC10133P_0402_50V8K
12
PC16522U_1206_6.3V6M
12
G
D
S
PQ41
2N7002W-T/R7_SOT323-3<BOM Structure>
2
13
PU13
APL5913-KAC-TRL_SO8
VIN9
EN8
VCNTL6VIN5
POK7
GN
D1
FB 2
VOUT 4VOUT 3
+
PC
9647
0U_D
2_2.
5VM 1
2
PJ19JUMP_43X118
11
22
PR2151K_0402_1%
12
PC
111
4.7U
_120
6_25
V6K
12
PC154 1U_0603_6.3V6M
12
PU9SC411MLTRT_MLPQ16_4X4
FB3
PGD4
VOUT1
VCCA2
NC
5
VSSA
6
VDDP 9
BST
13
DH 12
PGN
D7
DL
8
LX 11
ILIM 10
NC
14
EN/P
SV15
TON
16
TP17
PJ15
JUMP_43X118
11 2 2
PQ30
SI4
800B
DY
-T1-
E3_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PC1621U_0603_6.3V6M
12
PR21247K_0402_5%
1 2
PR13310K_0402_1%
12
PJ18JUMP_43X79
11
22
PC100
0.1U_0603_25V7K
1 2
PR205
2.15K_0402_1%
12
RT9173DPSP_SO8
PU14
GND2
VIN1
REFEN3
VOUT4
NC 5
VCNTL 6
NC 7
NC 8
GND 9
PQ31SI4810BDY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5PR128
26.1K_0402_1%
1 2
PC1630.1U_0402_16V7K
12 P
C99
1U_0
603_
10V6
K
12
PC1600.1U_0402_16V7K @
12
PC16110U_0805_6.3V6M
12
PC1641000P_0402_50V7K
12
PR126
0_0603_5%
1 2
PC972.2U_0603_6.3V6K
12 PD14
1SS355_SOD323-2 1
2
PR2061K_0402_1%
12
PR2040_0402_5%
1 2
PR2031K_0402_1%
12
PC
158
22U
_120
6_6.
3V6M
12
PC1081U_0603_10V6K
12
PR214100K_0402_5%
12
PR2131M_0402_5%
12
hexa
inf@
hotm
ail.co
m
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC
BST1_CPU BSTM1_CPU
BS
TM2_
CP
U
CCI_CPU
+CPU_CORE
DH1__CPU-1
5VS1
CSP1__CPU
CSP2_CPU
CSN2__CPU
CSN1_CPU
FB_CPU
DH1_CPU-2
DH2_CPU-1
BST2_CPU
DL1__CPU
LX2_CPU
DL2__CPU
DL2__CPU
CPU_VCC_SENSE
DL1__CPU
VSSSENSE
LX1__CPU
DH2_CPU-2
CPU_VID6<5>
CPU_VID0<5>
CPU_VID1<5>
CPU_VID2<5>
CPU_VID3<5>
CPU_VID4<5>
CPU_VID5<5>
POUT
CLK_ENABLE#<15>
H_PROCHOT#<4>
VR_ON<31>
PM_DPRSLPVR<7,21>
H_PSI#<5>
VGATE<15,21>
H_DPRSTP#<4,20>
VCCSENSE<5>
VSSSENSE<5>
+5VS
CPU_B+
CPU_B+
+CPU_CORE
B+
+3VS
+3VS
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.1
+CPU_CORECustom
44 46Friday, May 18, 2007
2005/10/17 2006/10/17Compal Electronics, Inc.
NTC
NTC
NTC
NTC
PR18210K_0402_1%
12
PC1510.1U_0402_16V7K
12
PR184 3.92K_0402_1%
1 2
PR1883K_0603_1%@
1 2
PQ39
SI4856DY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC
150
2200
P_0
402_
50V
7K
12
PR171 0_0402_5%
1 2
PR15710_0402_5%
12
PR202 0_0402_5%
1 2
PC138 0.22U_0603_16V7K
1 2
PC
145
0.22
U_0
603_
16V
7K
12
PR19810_0402_5%@
12
PR
199
4.7_
1206
_5%
12
PC141 0.022U_0402_16V7K 1 2
PQ35SI7686DP-T1-E3_SO8
35
2
4
1
PR162 0_0402_5%
12
PR177 0_0402_5%
1 2
PR173 71.5K_0402_1%
12
PC1424700P_0402_25V7K @
12
PR1960_0603_5%
1 2
PC
132
2200
P_0
402_
50V
7K
12
PR1832K_0402_1%@
12
PR19356_0402_5%
@
12
PC1341U_0603_6.3V6M
12
PR160100K_0402_5%
1 2
PR185 100_0402_1%
1 2
PR181 3K_0603_1%@1 2
PR195 0_0402_5%
1 2
PR
170
2.1K
_040
2_1%
12
PR
172
10_0
402_
5%
@
12
PR1860_0402_5%
1 2
PR2013.48K_0402_1%
1 2
PU12
MAX8770GTL+_TQFN40<BOM Structure>
FB 12
CSP2 14
GND 18
CCV9
CCI 10REF11
CSP1 17
CSN2 15
CSN1 16
CLKEN1
BST2 20
GNDS 13
DPRSTP40
D233
D132
D031 BST1 30
Vcc19
TIME7
THRM6
VRHOT5
POUT4
PSI3
PWRGD2
TON 8
PGND2 23
VDD 25
DL2 24
DL1 26
DH2 21
PGND1 27
D637
D435
D536
D334
LX2 22
LX1 28
DH1 29
DPRSLPVR39
SHDN38
TP41
PR197 10K_0402_1%
1 2
PR
158
200K
_040
2_1%
12
PR165 0_0402_5%
12
PC1352.2U_0603_6.3V6K
12
PR
200
2.1K
_040
2_1%
12
PC
146
10U
_120
6_25
V6M
12
PH2
10KB_0603_5%_ERTJ1VR103J
1 2
PR19210K_0402_5%@
12
PL90.36H_ETQP4LR36WFC_24A_20%
12
PC
148
10U
_120
6_25
V6M
12
PR
180
0_06
03_5
%
12
PQ
36
SI4
856D
Y-T
1-E
3_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PR164 0_0402_5%
12
PR
169
4.7_
1206
_5%
12
PR156
0_1206_5%
12
PR166 0_0402_5%
12
PR15913K_0402_5%
12
PC
129
10U
_120
6_25
V6M
12
PR179 0_0402_5%
1 2
PR1610_0603_5%
1 2
PC
149
0.1U
_060
3_25
V7K
12
PC
128
10U
_120
6_25
V6M
12
PR1780_0402_5%
12
PC
127
0.01
U_0
402_
25V
7K
12
PR1890_0402_5%
@1 2
PC
130
10U
_120
6_25
V6M
12
PL100.36H_ETQP4LR36WFC_24A_20%
12
PR176 0_0402_5%
1 2
PQ38SI7686DP-T1-E3_SO8
35
2
4
1
PR168 0_0402_5%
12
PC153 0.22U_0603_16V7K
1 2
PR1743.48K_0402_1%
1 2
PR167 0_0402_5%
12
PR19120K_0402_1%
1 2
PC140 0.22U_0603_16V7K
1 2
PC
137
680P
_060
3_50
V7K
12
PQ
40S
I485
6DY
-T1-
E3_
SO
8
S1
S2
S3
G4
D8
D7
D6
D5
PR1873K_0603_1%@
1 2
PH3
10KB_0603_5%_ERTJ1VR103J
1 2
PQ
37S
I485
6DY
-T1-
E3_
SO
8
S1
S2
S3
G4
D8
D7
D6
D5
PC
152
680P
_060
3_50
V7K
12
PC1360.22U_0603_16V7K
1 2
PC144470P_0603_50V8J
1 2
PL8HCB4532KF-800T90_1812 1 2
PR1630_0603_5%
1 2
PR1900_0402_5%
1 2
PC13947P_0402_50V8J
12
PC
131
0.1U
_060
3_25
V7K
12
PC143
4700P_0402_25V7K
@1
2
PC
147
10U
_120
6_25
V6M
12
PR175 499_0402_1%
1 2
PR194100_0402_1%
12
+
PC
133
220U
_25V
_M 1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
Title
Size Document Number Rev
Date: Sheet o f
HW PIR
45 46Friday, May 18, 2007
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 1 of 1
Rev. PG# Modify ListFixed IssueItem
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
1
2
0.2 P.35
0.2
0.2
0.2
0.2
0.2
0.2
3
4
5
6
7 0.2
8
9 0.2
10
11 0.2
12 0.2
13 0.2
14
15 1.0
16
17 1.0
1.0
1.0
18 0.2
19
20 0.2
0.2
USB port 2 and 4 can't workChange U17 P/N SA005280110 to SA00001H600
Change Y4 and X1 to SJ132P7K220Change symbol P.20.31
CRT wave P.10 Change L41 to R878 and reserve C619
To meet INTEL SPEC Change C148.C442.C171.C400.C606.C607 from 2200P to 22N
Delete R71,74P.17Delete reserve
P.35 Delete JP5 PIN3FACTORY REQUEST
P.18 Remove C7To meet CRT SPEC
P.28 Change C511;515 from 27p to 18pTune frequency
EMI Request change C632 to 2.2nF Remove R441,R145,C6,12,13,change L2,3,4 to SM01000AL00
Delete C171
EMI Request P.30 LAN RX TX change0.2
EMI Request ADD D22;23;24P.32
EMI Request P.4 Delete ITP_BPM0-5 and R515
Change R276 from 10k to 1k ohm C341 from 1000p to 100pP.4FAN issue
P.21USB issueChange USB port 2 to NEW card port 7 to USB
Remove LPC debug connect Remove JP13,R265,R441,R145
Change R322 to 22 ohm
ADD T48 AND R515 AND JP9 29,30 pin to GND
RemoveC26,31,314,315
ESD Request and reserve
P.33
P.6Power improve
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B B
A A
Title
Size Document Number Rev
Date: Sheet o f
IHL00 0.2
PIR (PWR)
Compal Electronics, Inc.
46 46Friday, May 18, 2007
Version change list (P.I.R. List) Page 1 of 2 for PWR
Reason for change Rev. PG# Modify List Date PhaseFixed IssueItem
1
2
3
LA-3581P
Power sequence update for 1.5VS. HW request.
0.2 6
1.Add the PC163 0.1u_0402_16V.
03/20/07 DVT
0.2 04/09/07 PVT2.Change the PR212 from O to 47K.
+1.5VSP output voltage is 2V. BOM error for +1.5VSP output.
6
1.Change the PR132 for 30K to 20K.
Power sequence update for +VCCPP.HW request. 0.2
1.Add the PC97 0.1u_0402_16V.
2.Change the PR103 from O to 56K.5
4 Reduce the overshoot on P2 point. IFL01 issue. 1.Add the PR1 10_1206 and PD1 RZ24B.0.2 1
04/09/07
04/09/07
PVT
PVT
5 Symbol issue. DFB team request. 1/30.2 1.Change the symbol for the PZD1,PD2,PD3,PD4 and PQ21. 04/09/07 PVT
6 Noise issue for idle. Noise issue for idle. 0.2 1.Change the PC133 from 100U to 220U 25V. 04/09/07 PVT7